Patent
US 10,971,451INTERCONNECT STRUCTURE HAVING NANOCRYSTALLINE GRAPHENE CAP LAYER AND ELECTRONIC DEVICE INCLUDING THE INTERCONNECT STRUCTURE
Kyung-Eun Byun
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 10,971,451Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1, wherein one of the trenches 121 a is f o rmed not to reach the substrate 110 and the other is formed to reach the substrate 11 0. [0044] The conductive …
FIGS. 2A to 2C are example views of Raman spectrums representing typical crystalline graphene, nan o crystalline graphene, and an amorphous carb o n layer, …
FIG. 3B, the upper surface of the dielectric layer 121, the upper surface of the barrier layer 126, and the upper surface of the conductive wiring 125 are …
FIG. 4 is a view of an electronic device 2 00 including an interconnect structure 22 0 according to another example embodiment. Hereinafter, different content …
FIG. 5, the electronic device 300 includes the substrate 110 and the interconnect structure 320 provided on the substrate 110. The interconnect structure 320 …
FIG. 6 is a view of an electronic device 4 00 including an interconnect structure 42 0 according to another example embodiment. Hereinafter, different content …
FIG. 7, wherein o ne of the trenches 121a is f o rmed not to reach the substrate 110 and the other is formed to reach the substrate 110. [0096] The conductive …
FIG. 8 is a view of an electronic device 600 including an interconnect structure 62 0 according to another example embodiment. Hereinafter, different content …
FIG. 9 is a view of an electronic device including an interconnect structure according to another example embodiment. DETAILED DESCRIPTION [0036] Reference …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
An interconnect structure comprising: a dielectric layer including at least one trench; a conductive wiring filling an inside of the at least one trench; and a cap layer on at least one surface of the conductive wiring, the cap layer including nanocrystalline graphene, the nanocrystalline graphene including nano- sized crystals, an upper surface of the dielectric layer being level with an upper surface of the conductive wiring, a lower surface of the cap layer, or both the upper surface of the conductive wiring and the lower surface of the cap layer[[.]], wherein a ratio of carbon having an sp 2 bonding structure to total carbon in the nanocrystalline graphene is in a range from about 50 % to about 99 %, the nanocrystalline graphene comprises hydrogen of 1 at% to 20 at%, and a density of the nanocrystalline graphene is 1.6 g/cc to 2.1 g/cc. Currently amended
The interconnect structure of claim 1, wherein the nano-sized crystals have a size of about 0.5 nm to about 100 nm. Original
The interconnect structure of claim 1, further comprising: a substrate, wherein the dielectric layer is on the substrate. Original
The interconnect structure of claim 1, wherein the conductive wiring includes one of a metal, a metal alloy, or a combination thereof. Original
The interconnect structure of claim 1, further comprising: a barrier layer, wherein the barrier layer covers the conductive wiring in the at least one trench. Original
- 5. Canceled
Canceled
An electronic device comprising: a substrate; and an interconnect structure on the substrate, the interconnect structure including a dielectric layer, a conductive wiring, and a cap layer, the dielectric layer provided including at least one trench, the conductive wiring filling an inside of the at least one trench, and the cap layer on at least one surface of the conductive wiring, the cap layer including nanocrystalline graphene, the nanocrystalline graphene including nano- sized crystals, an upper surface of the dielectric layer being level with an upper surface of the conductive wiring, a lower surface of the cap layer, or both the upper surface of the conductive wiring and the lower surface of the cap layer[[.]], wherein a ratio of carbon having an sp 2 bonding structure to total carbon in the nanocrystalline graphene is in a range from about 50 % to about 99 %, the nanocrystalline graphene comprises hydrogen of 1 at% to 20 at%, and a density of the nanocrystalline graphene is 1.6 g/cc to 2.1 g/cc. Currently amended
The electronic device of claim 19, wherein the interconnect structure further includes a barrier layer, and the barrier layer covers the conductive wiring in the at least one trench. Original
An interconnect structure comprising: a conductive wiring including a side surface, a bottom surface, and an upper surface; a barrier layer surrounding the side surface and the bottom surface of the conductive wiring; a cap layer on the upper surface of the conductive wiring, the cap layer including nanocrystalline graphene, the nanocrystalline graphene including nano- sized crystals; and a dielectric layer surrounding the side surface of the conductive wiring, an upper surface of the dielectric layer being level with an upper surface of the conductive wiring, a lower surface of the cap layer, or both the upper surface of the conductive wiring and the lower surface of the cap layer[[.]], wherein a ratio of carbon having an sp 2 bonding structure to total carbon in the nanocrystalline graphene is in a range from about 50 % to about 99 %, the nanocrystalline graphene comprises h y drogen of 1 at% to 20 at%, and a density of the nanocrystalline graphene is 1.6 g/cc to 2.1 g/cc. Currently amended
The interconnect structure of claim 21, wherein a width of the cap layer is different than a width of the conductive wiring. Original
The interconnect structure of claim 21, wherein a width of the cap layer and a width of the conductive wiring are equal. Original
The interconnect structure of claim 21, wherein the cap layer surrounds the side surface of the conductive wiring. Original
The interconnect structure of claim 21, further comprising: the barrier layer is between the side surface of the conductive wiring and the dielectric layer, and a thickness of the barrier layer is less than or equal to a thickness of the dielectric layer. Previously presented
Layer stacks claimed or described, ordered top of device to substrate.
interconnect structure
electronic device with interconnect structure
Materials described outside the worked examples.
nanocrystalline graphene
conductive wiring metal or metal alloy
copper
Cu
Measurements and analyses referenced in the patent, with their drawing references.
FIGS. 2A to 2C are example views of Raman spectrums representing typical crystalline graphene, nan o crystalline graphene, and an amorphous carb o n layer, …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
ratio of carbon having sp2 bonding structure to total carbon in nanocrystalline graphene | 50–99 % | nanocrystalline graphene |
hydrogen content in nanocrystalline graphene | 1–20 at% |
Patent
Atlas literature
Patent
US 10,971,451Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1, wherein one of the trenches 121 a is f o rmed not to reach the substrate 110 and the other is formed to reach the substrate 11 0. [0044] The conductive …
FIGS. 2A to 2C are example views of Raman spectrums representing typical crystalline graphene, nan o crystalline graphene, and an amorphous carb o n layer, …
FIG. 3B, the upper surface of the dielectric layer 121, the upper surface of the barrier layer 126, and the upper surface of the conductive wiring 125 are …
FIG. 4 is a view of an electronic device 2 00 including an interconnect structure 22 0 according to another example embodiment. Hereinafter, different content …
FIG. 5, the electronic device 300 includes the substrate 110 and the interconnect structure 320 provided on the substrate 110. The interconnect structure 320 …
FIG. 6 is a view of an electronic device 4 00 including an interconnect structure 42 0 according to another example embodiment. Hereinafter, different content …
FIG. 7, wherein o ne of the trenches 121a is f o rmed not to reach the substrate 110 and the other is formed to reach the substrate 110. [0096] The conductive …
FIG. 8 is a view of an electronic device 600 including an interconnect structure 62 0 according to another example embodiment. Hereinafter, different content …
FIG. 9 is a view of an electronic device including an interconnect structure according to another example embodiment. DETAILED DESCRIPTION [0036] Reference …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
An interconnect structure comprising: a dielectric layer including at least one trench; a conductive wiring filling an inside of the at least one trench; and a cap layer on at least one surface of the conductive wiring, the cap layer including nanocrystalline graphene, the nanocrystalline graphene including nano- sized crystals, an upper surface of the dielectric layer being level with an upper surface of the conductive wiring, a lower surface of the cap layer, or both the upper surface of the conductive wiring and the lower surface of the cap layer[[.]], wherein a ratio of carbon having an sp 2 bonding structure to total carbon in the nanocrystalline graphene is in a range from about 50 % to about 99 %, the nanocrystalline graphene comprises hydrogen of 1 at% to 20 at%, and a density of the nanocrystalline graphene is 1.6 g/cc to 2.1 g/cc. Currently amended
The interconnect structure of claim 1, wherein the nano-sized crystals have a size of about 0.5 nm to about 100 nm. Original
The interconnect structure of claim 1, further comprising: a substrate, wherein the dielectric layer is on the substrate. Original
The interconnect structure of claim 1, wherein the conductive wiring includes one of a metal, a metal alloy, or a combination thereof. Original
The interconnect structure of claim 1, further comprising: a barrier layer, wherein the barrier layer covers the conductive wiring in the at least one trench. Original
- 5. Canceled
Canceled
An electronic device comprising: a substrate; and an interconnect structure on the substrate, the interconnect structure including a dielectric layer, a conductive wiring, and a cap layer, the dielectric layer provided including at least one trench, the conductive wiring filling an inside of the at least one trench, and the cap layer on at least one surface of the conductive wiring, the cap layer including nanocrystalline graphene, the nanocrystalline graphene including nano- sized crystals, an upper surface of the dielectric layer being level with an upper surface of the conductive wiring, a lower surface of the cap layer, or both the upper surface of the conductive wiring and the lower surface of the cap layer[[.]], wherein a ratio of carbon having an sp 2 bonding structure to total carbon in the nanocrystalline graphene is in a range from about 50 % to about 99 %, the nanocrystalline graphene comprises hydrogen of 1 at% to 20 at%, and a density of the nanocrystalline graphene is 1.6 g/cc to 2.1 g/cc. Currently amended
The electronic device of claim 19, wherein the interconnect structure further includes a barrier layer, and the barrier layer covers the conductive wiring in the at least one trench. Original
An interconnect structure comprising: a conductive wiring including a side surface, a bottom surface, and an upper surface; a barrier layer surrounding the side surface and the bottom surface of the conductive wiring; a cap layer on the upper surface of the conductive wiring, the cap layer including nanocrystalline graphene, the nanocrystalline graphene including nano- sized crystals; and a dielectric layer surrounding the side surface of the conductive wiring, an upper surface of the dielectric layer being level with an upper surface of the conductive wiring, a lower surface of the cap layer, or both the upper surface of the conductive wiring and the lower surface of the cap layer[[.]], wherein a ratio of carbon having an sp 2 bonding structure to total carbon in the nanocrystalline graphene is in a range from about 50 % to about 99 %, the nanocrystalline graphene comprises h y drogen of 1 at% to 20 at%, and a density of the nanocrystalline graphene is 1.6 g/cc to 2.1 g/cc. Currently amended
The interconnect structure of claim 21, wherein a width of the cap layer is different than a width of the conductive wiring. Original
The interconnect structure of claim 21, wherein a width of the cap layer and a width of the conductive wiring are equal. Original
The interconnect structure of claim 21, wherein the cap layer surrounds the side surface of the conductive wiring. Original
The interconnect structure of claim 21, further comprising: the barrier layer is between the side surface of the conductive wiring and the dielectric layer, and a thickness of the barrier layer is less than or equal to a thickness of the dielectric layer. Previously presented
Layer stacks claimed or described, ordered top of device to substrate.
interconnect structure
electronic device with interconnect structure
Materials described outside the worked examples.
nanocrystalline graphene
conductive wiring metal or metal alloy
copper
Cu
Measurements and analyses referenced in the patent, with their drawing references.
FIGS. 2A to 2C are example views of Raman spectrums representing typical crystalline graphene, nan o crystalline graphene, and an amorphous carb o n layer, …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
ratio of carbon having sp2 bonding structure to total carbon in nanocrystalline graphene | 50–99 % | nanocrystalline graphene |
hydrogen content in nanocrystalline graphene | 1–20 at% |
Patent
Atlas literature
Patent
US 10,971,451Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1, wherein one of the trenches 121 a is f o rmed not to reach the substrate 110 and the other is formed to reach the substrate 11 0. [0044] The conductive …
FIGS. 2A to 2C are example views of Raman spectrums representing typical crystalline graphene, nan o crystalline graphene, and an amorphous carb o n layer, …
FIG. 3B, the upper surface of the dielectric layer 121, the upper surface of the barrier layer 126, and the upper surface of the conductive wiring 125 are …
FIG. 4 is a view of an electronic device 2 00 including an interconnect structure 22 0 according to another example embodiment. Hereinafter, different content …
FIG. 5, the electronic device 300 includes the substrate 110 and the interconnect structure 320 provided on the substrate 110. The interconnect structure 320 …
FIG. 6 is a view of an electronic device 4 00 including an interconnect structure 42 0 according to another example embodiment. Hereinafter, different content …
FIG. 7, wherein o ne of the trenches 121a is f o rmed not to reach the substrate 110 and the other is formed to reach the substrate 110. [0096] The conductive …
FIG. 8 is a view of an electronic device 600 including an interconnect structure 62 0 according to another example embodiment. Hereinafter, different content …
FIG. 9 is a view of an electronic device including an interconnect structure according to another example embodiment. DETAILED DESCRIPTION [0036] Reference …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
An interconnect structure comprising: a dielectric layer including at least one trench; a conductive wiring filling an inside of the at least one trench; and a cap layer on at least one surface of the conductive wiring, the cap layer including nanocrystalline graphene, the nanocrystalline graphene including nano- sized crystals, an upper surface of the dielectric layer being level with an upper surface of the conductive wiring, a lower surface of the cap layer, or both the upper surface of the conductive wiring and the lower surface of the cap layer[[.]], wherein a ratio of carbon having an sp 2 bonding structure to total carbon in the nanocrystalline graphene is in a range from about 50 % to about 99 %, the nanocrystalline graphene comprises hydrogen of 1 at% to 20 at%, and a density of the nanocrystalline graphene is 1.6 g/cc to 2.1 g/cc. Currently amended
The interconnect structure of claim 1, wherein the nano-sized crystals have a size of about 0.5 nm to about 100 nm. Original
The interconnect structure of claim 1, further comprising: a substrate, wherein the dielectric layer is on the substrate. Original
The interconnect structure of claim 1, wherein the conductive wiring includes one of a metal, a metal alloy, or a combination thereof. Original
The interconnect structure of claim 1, further comprising: a barrier layer, wherein the barrier layer covers the conductive wiring in the at least one trench. Original
- 5. Canceled
Canceled
An electronic device comprising: a substrate; and an interconnect structure on the substrate, the interconnect structure including a dielectric layer, a conductive wiring, and a cap layer, the dielectric layer provided including at least one trench, the conductive wiring filling an inside of the at least one trench, and the cap layer on at least one surface of the conductive wiring, the cap layer including nanocrystalline graphene, the nanocrystalline graphene including nano- sized crystals, an upper surface of the dielectric layer being level with an upper surface of the conductive wiring, a lower surface of the cap layer, or both the upper surface of the conductive wiring and the lower surface of the cap layer[[.]], wherein a ratio of carbon having an sp 2 bonding structure to total carbon in the nanocrystalline graphene is in a range from about 50 % to about 99 %, the nanocrystalline graphene comprises hydrogen of 1 at% to 20 at%, and a density of the nanocrystalline graphene is 1.6 g/cc to 2.1 g/cc. Currently amended
The electronic device of claim 19, wherein the interconnect structure further includes a barrier layer, and the barrier layer covers the conductive wiring in the at least one trench. Original
An interconnect structure comprising: a conductive wiring including a side surface, a bottom surface, and an upper surface; a barrier layer surrounding the side surface and the bottom surface of the conductive wiring; a cap layer on the upper surface of the conductive wiring, the cap layer including nanocrystalline graphene, the nanocrystalline graphene including nano- sized crystals; and a dielectric layer surrounding the side surface of the conductive wiring, an upper surface of the dielectric layer being level with an upper surface of the conductive wiring, a lower surface of the cap layer, or both the upper surface of the conductive wiring and the lower surface of the cap layer[[.]], wherein a ratio of carbon having an sp 2 bonding structure to total carbon in the nanocrystalline graphene is in a range from about 50 % to about 99 %, the nanocrystalline graphene comprises h y drogen of 1 at% to 20 at%, and a density of the nanocrystalline graphene is 1.6 g/cc to 2.1 g/cc. Currently amended
The interconnect structure of claim 21, wherein a width of the cap layer is different than a width of the conductive wiring. Original
The interconnect structure of claim 21, wherein a width of the cap layer and a width of the conductive wiring are equal. Original
The interconnect structure of claim 21, wherein the cap layer surrounds the side surface of the conductive wiring. Original
The interconnect structure of claim 21, further comprising: the barrier layer is between the side surface of the conductive wiring and the dielectric layer, and a thickness of the barrier layer is less than or equal to a thickness of the dielectric layer. Previously presented
Layer stacks claimed or described, ordered top of device to substrate.
interconnect structure
electronic device with interconnect structure
Materials described outside the worked examples.
nanocrystalline graphene
conductive wiring metal or metal alloy
copper
Cu
Measurements and analyses referenced in the patent, with their drawing references.
FIGS. 2A to 2C are example views of Raman spectrums representing typical crystalline graphene, nan o crystalline graphene, and an amorphous carb o n layer, …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
ratio of carbon having sp2 bonding structure to total carbon in nanocrystalline graphene | 50–99 % | nanocrystalline graphene |
hydrogen content in nanocrystalline graphene | 1–20 at% |
Patent
Atlas literature
Patent
US 10,971,451Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1, wherein one of the trenches 121 a is f o rmed not to reach the substrate 110 and the other is formed to reach the substrate 11 0. [0044] The conductive …
FIGS. 2A to 2C are example views of Raman spectrums representing typical crystalline graphene, nan o crystalline graphene, and an amorphous carb o n layer, …
FIG. 3B, the upper surface of the dielectric layer 121, the upper surface of the barrier layer 126, and the upper surface of the conductive wiring 125 are …
FIG. 4 is a view of an electronic device 2 00 including an interconnect structure 22 0 according to another example embodiment. Hereinafter, different content …
FIG. 5, the electronic device 300 includes the substrate 110 and the interconnect structure 320 provided on the substrate 110. The interconnect structure 320 …
FIG. 6 is a view of an electronic device 4 00 including an interconnect structure 42 0 according to another example embodiment. Hereinafter, different content …
FIG. 7, wherein o ne of the trenches 121a is f o rmed not to reach the substrate 110 and the other is formed to reach the substrate 110. [0096] The conductive …
FIG. 8 is a view of an electronic device 600 including an interconnect structure 62 0 according to another example embodiment. Hereinafter, different content …
FIG. 9 is a view of an electronic device including an interconnect structure according to another example embodiment. DETAILED DESCRIPTION [0036] Reference …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
An interconnect structure comprising: a dielectric layer including at least one trench; a conductive wiring filling an inside of the at least one trench; and a cap layer on at least one surface of the conductive wiring, the cap layer including nanocrystalline graphene, the nanocrystalline graphene including nano- sized crystals, an upper surface of the dielectric layer being level with an upper surface of the conductive wiring, a lower surface of the cap layer, or both the upper surface of the conductive wiring and the lower surface of the cap layer[[.]], wherein a ratio of carbon having an sp 2 bonding structure to total carbon in the nanocrystalline graphene is in a range from about 50 % to about 99 %, the nanocrystalline graphene comprises hydrogen of 1 at% to 20 at%, and a density of the nanocrystalline graphene is 1.6 g/cc to 2.1 g/cc. Currently amended
The interconnect structure of claim 1, wherein the nano-sized crystals have a size of about 0.5 nm to about 100 nm. Original
The interconnect structure of claim 1, further comprising: a substrate, wherein the dielectric layer is on the substrate. Original
The interconnect structure of claim 1, wherein the conductive wiring includes one of a metal, a metal alloy, or a combination thereof. Original
The interconnect structure of claim 1, further comprising: a barrier layer, wherein the barrier layer covers the conductive wiring in the at least one trench. Original
- 5. Canceled
Canceled
An electronic device comprising: a substrate; and an interconnect structure on the substrate, the interconnect structure including a dielectric layer, a conductive wiring, and a cap layer, the dielectric layer provided including at least one trench, the conductive wiring filling an inside of the at least one trench, and the cap layer on at least one surface of the conductive wiring, the cap layer including nanocrystalline graphene, the nanocrystalline graphene including nano- sized crystals, an upper surface of the dielectric layer being level with an upper surface of the conductive wiring, a lower surface of the cap layer, or both the upper surface of the conductive wiring and the lower surface of the cap layer[[.]], wherein a ratio of carbon having an sp 2 bonding structure to total carbon in the nanocrystalline graphene is in a range from about 50 % to about 99 %, the nanocrystalline graphene comprises hydrogen of 1 at% to 20 at%, and a density of the nanocrystalline graphene is 1.6 g/cc to 2.1 g/cc. Currently amended
The electronic device of claim 19, wherein the interconnect structure further includes a barrier layer, and the barrier layer covers the conductive wiring in the at least one trench. Original
An interconnect structure comprising: a conductive wiring including a side surface, a bottom surface, and an upper surface; a barrier layer surrounding the side surface and the bottom surface of the conductive wiring; a cap layer on the upper surface of the conductive wiring, the cap layer including nanocrystalline graphene, the nanocrystalline graphene including nano- sized crystals; and a dielectric layer surrounding the side surface of the conductive wiring, an upper surface of the dielectric layer being level with an upper surface of the conductive wiring, a lower surface of the cap layer, or both the upper surface of the conductive wiring and the lower surface of the cap layer[[.]], wherein a ratio of carbon having an sp 2 bonding structure to total carbon in the nanocrystalline graphene is in a range from about 50 % to about 99 %, the nanocrystalline graphene comprises h y drogen of 1 at% to 20 at%, and a density of the nanocrystalline graphene is 1.6 g/cc to 2.1 g/cc. Currently amended
The interconnect structure of claim 21, wherein a width of the cap layer is different than a width of the conductive wiring. Original
The interconnect structure of claim 21, wherein a width of the cap layer and a width of the conductive wiring are equal. Original
The interconnect structure of claim 21, wherein the cap layer surrounds the side surface of the conductive wiring. Original
The interconnect structure of claim 21, further comprising: the barrier layer is between the side surface of the conductive wiring and the dielectric layer, and a thickness of the barrier layer is less than or equal to a thickness of the dielectric layer. Previously presented
Layer stacks claimed or described, ordered top of device to substrate.
interconnect structure
electronic device with interconnect structure
Materials described outside the worked examples.
nanocrystalline graphene
conductive wiring metal or metal alloy
copper
Cu
Measurements and analyses referenced in the patent, with their drawing references.
FIGS. 2A to 2C are example views of Raman spectrums representing typical crystalline graphene, nan o crystalline graphene, and an amorphous carb o n layer, …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
ratio of carbon having sp2 bonding structure to total carbon in nanocrystalline graphene | 50–99 % | nanocrystalline graphene |
hydrogen content in nanocrystalline graphene | 1–20 at% |
interconnect structure with barrier layer surrounding conductive wiring
ruthenium
Ru
dielectric layer material
nanocrystalline graphene |
density of nanocrystalline graphene | 1.6–2.1 g/cc | nanocrystalline graphene |
size of nano-sized crystals in nanocrystalline graphene | 0.5–100 nm | nanocrystalline graphene |
Thickness | ≥ 120 cm | — |
interconnect structure with barrier layer surrounding conductive wiring
ruthenium
Ru
dielectric layer material
nanocrystalline graphene |
density of nanocrystalline graphene | 1.6–2.1 g/cc | nanocrystalline graphene |
size of nano-sized crystals in nanocrystalline graphene | 0.5–100 nm | nanocrystalline graphene |
Thickness | ≥ 120 cm | — |
interconnect structure with barrier layer surrounding conductive wiring
ruthenium
Ru
dielectric layer material
nanocrystalline graphene |
density of nanocrystalline graphene | 1.6–2.1 g/cc | nanocrystalline graphene |
size of nano-sized crystals in nanocrystalline graphene | 0.5–100 nm | nanocrystalline graphene |
Thickness | ≥ 120 cm | — |
interconnect structure with barrier layer surrounding conductive wiring
ruthenium
Ru
dielectric layer material
nanocrystalline graphene |
density of nanocrystalline graphene | 1.6–2.1 g/cc | nanocrystalline graphene |
size of nano-sized crystals in nanocrystalline graphene | 0.5–100 nm | nanocrystalline graphene |
Thickness | ≥ 120 cm | — |