Patent
US 10,840,338SEMICONDUCTOR DEVICE INCLUDING GRAPHENE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
Keunwook SHIN
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 10,840,338Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional view of a semiconductor device according to some example embodiments; [0027]
FIG. 2 is a photograph of a graphene layer grown, via a plasma-enhanced chemical vapor deposition (PECVD) process, on a surface of a germanium (Ge) …
FIG. 3 is a cross-sectional view of a semiconductor device according to some example embodiments; [0029]
FIG. 4 is a cross-sectional view of a semiconductor device according to some example embodiments; [0030]
FIG. 5 is a cross-sectional view of a semiconductor device according to some example embodiments; [0031]
FIG. 6 is a cross-sectional view of a semiconductor device according to some example embodiments; [0032]
FIG. 7 is a photograph of graphene layers having different thicknesses according to growth times, grown on a surface of a Ge semiconductor layer and on a …
FIG. 8 is a cross-sectional view of a semiconductor device according to some example embodiments; [0034]
FIG. 9 is a cross-sectional view of a semiconductor device according to some example embodiments; and [0035]
FIG. 10 is a cross-sectional view of a semiconductor device according to some example embodiments.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: a semiconductor substrate including an insulator pattern on the semiconductor substrate is one of Si, Ge, Sn, GaAs, GaP, InAs, InP, InSb, GaSb, GaN, InN, A l P, AlAs, or A N; and a graphene layer grown on a surface of the semiconductor substrate, the graphene layer being directly on the surface of the semiconductor substrate and not directly on a surface of the insulator, wherein the semiconductor device does not include graphene directly on the surface of the insulator, and wherein the graphene comprises a hexagonal honeycomb structure, and the hexagonal honeycomb structure extends parallel to the surface of the semiconductor substrate on which the graphene layer is grown. Currently amended
The semiconductor device of claim 1, wherein the semiconductor substrate further includes a doping material. Previously presented
The semiconductor device of claim 1, wherein the insulator includes at least one of silicon oxide (Si O 2), silicon nitride (SiN), silicon oxynitride (SiO xNy), silicon oxycarbide (SiO xCy), germanium oxynitride (GeO xNy), germanium oxycarbide (GeO xCy), aluminum oxide (A 1 2 O 3), hafnium oxide (Hf O 2), or zirconium oxide (Zr O 2), SVG 15807096.05-13-2020.KA₈CT₇TCLXEAPX5.CLM.1.svg 0.14 0.74 Black and white SVG 15807096.05-13-2020.KA₈CT₇TCLXEAPX5.CLM.2.svg 0.14 0.63 Black and white Previously presented
The semiconductor device of claim 1, wherein the insulator is on the semiconductor, and the insulator is an insulating layer Previously presented
The semiconductor device of claim 1, wherein the insulator includes an insulator substrate, and the semiconductor substrate is on the insulator substrate. Previously presented
The semiconductor device of claim 1, wherein the surface of the semiconductor substrate and a surface of the insulator are on a same plane relative to each other or on different planes relative to each other. Previously presented
Canceled
A semiconductor device comprising: a semiconductor substrate including an insulator, wherein the semiconductor substrate is one of Si, Ge, Sn, GaAs, GaP, InAs, InP, InSb, GaSb, GaN, InN, A l P, AlAs, or AN; a first graphene layer grown on a surface of the semiconductor substrate, the first graphene layer being directly on the surface of the semiconductor substrate and not directly on the surface of the insulator, the first graphene having a width in a first direction that is greater than a thickness of the first graphene in a second direction crossing the first direction; and a second graphene layer grown on a surface of the insulator, a thickness of the second graphene layer being different than a thickness of the first graphene layer, the second graphene layer being directly on the surface of the insulator, the second graphene having a width in the first direction that is greater than a thickness of the second graphene in the second direction, the first graphene and the second graphene being parallel to each other such that the width of the first graphene and the width of the second graphene each extend in the first direction, and a lower surface of the insulator is not directly on the first graphene. Previously presented
The semiconductor device of claim 8, wherein the thickness of the first graphene layer is greater than the thickness of the second graphene layer. Original
The semiconductor device of claim 8, wherein the semiconductor substrate further includes a doping material. Previously presented
Canceled
A method of manufacturing a semiconductor device, the method comprising: preparing a substrate, the substrate including an insulator and a semiconductor, the semiconductor including at least one of a group IV material or a group I II -V compound; and growing a first graphene layer on a surface of the semiconductor using a plasma-enhanced chemical vapor deposition (PECVD) process, wherein the semiconductor device does not include graphene directly on the surface of the insulator. Withdrawn
The method of claim 12, wherein the semiconductor further includes a doping material. Withdrawn
The method of claim 12, wherein the growing the first graphene layer does not form a graphene layer on a surface of the insulator. Withdrawn
The method of claim 12, further comprising: growing a second graphene layer on a surface of the insulator using the PECVD process, wherein a thickness of the second graphene layer is different than a thickness of the first graphene layer, the thickness of at least one of the first graphene layer or the second graphene layer depends on a process time of the PECVD process. Withdrawn
The method of claim 12, wherein a source gas for the PECVD process includes a hydrocarbon. Withdrawn
The method of claim 12, wherein a process temperature of the PECVD process is from 300 ° C to 700 °C. Withdrawn
The method of claim 12, wherein a process pressure of the PECVD process is from 10 mTorr to 50 mTorr. Withdrawn
The method of claim 12, wherein a plasma power of the PECVD process is from 50 W to 300 W. Withdrawn
A method of manufacturing a semiconductor device, the method comprising: growing a first graphene layer on a surface of a semiconductor using a plasma- enhanced chemical vapor deposition (PECVD) process, the semiconductor being part of a substrate including an insulator and the semiconductor, and the semiconductor including at least one of a group IV material or a group I II-V compound. Withdrawn
Layer stacks claimed or described, ordered top of device to substrate.
semiconductor device with graphene on semiconductor substrate
semiconductor device with first and second graphene layers
Materials described outside the worked examples.
semiconductor substrate (group IV or III-V)
semiconductor (Si, Ge, Sn, GaAs, GaP, InAs, InP, InSb, GaSb, GaN, InN, AlP, AlAs, AlN)
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
doping material concentration in semiconductor substrate | 1000000000000000–1e+22 cm⁻³ | doping material (B, As, P, Sb, C, Si, Mg) |
— | 50–300 W |
Patent
Atlas literature
Patent
US 10,840,338Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional view of a semiconductor device according to some example embodiments; [0027]
FIG. 2 is a photograph of a graphene layer grown, via a plasma-enhanced chemical vapor deposition (PECVD) process, on a surface of a germanium (Ge) …
FIG. 3 is a cross-sectional view of a semiconductor device according to some example embodiments; [0029]
FIG. 4 is a cross-sectional view of a semiconductor device according to some example embodiments; [0030]
FIG. 5 is a cross-sectional view of a semiconductor device according to some example embodiments; [0031]
FIG. 6 is a cross-sectional view of a semiconductor device according to some example embodiments; [0032]
FIG. 7 is a photograph of graphene layers having different thicknesses according to growth times, grown on a surface of a Ge semiconductor layer and on a …
FIG. 8 is a cross-sectional view of a semiconductor device according to some example embodiments; [0034]
FIG. 9 is a cross-sectional view of a semiconductor device according to some example embodiments; and [0035]
FIG. 10 is a cross-sectional view of a semiconductor device according to some example embodiments.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: a semiconductor substrate including an insulator pattern on the semiconductor substrate is one of Si, Ge, Sn, GaAs, GaP, InAs, InP, InSb, GaSb, GaN, InN, A l P, AlAs, or A N; and a graphene layer grown on a surface of the semiconductor substrate, the graphene layer being directly on the surface of the semiconductor substrate and not directly on a surface of the insulator, wherein the semiconductor device does not include graphene directly on the surface of the insulator, and wherein the graphene comprises a hexagonal honeycomb structure, and the hexagonal honeycomb structure extends parallel to the surface of the semiconductor substrate on which the graphene layer is grown. Currently amended
The semiconductor device of claim 1, wherein the semiconductor substrate further includes a doping material. Previously presented
The semiconductor device of claim 1, wherein the insulator includes at least one of silicon oxide (Si O 2), silicon nitride (SiN), silicon oxynitride (SiO xNy), silicon oxycarbide (SiO xCy), germanium oxynitride (GeO xNy), germanium oxycarbide (GeO xCy), aluminum oxide (A 1 2 O 3), hafnium oxide (Hf O 2), or zirconium oxide (Zr O 2), SVG 15807096.05-13-2020.KA₈CT₇TCLXEAPX5.CLM.1.svg 0.14 0.74 Black and white SVG 15807096.05-13-2020.KA₈CT₇TCLXEAPX5.CLM.2.svg 0.14 0.63 Black and white Previously presented
The semiconductor device of claim 1, wherein the insulator is on the semiconductor, and the insulator is an insulating layer Previously presented
The semiconductor device of claim 1, wherein the insulator includes an insulator substrate, and the semiconductor substrate is on the insulator substrate. Previously presented
The semiconductor device of claim 1, wherein the surface of the semiconductor substrate and a surface of the insulator are on a same plane relative to each other or on different planes relative to each other. Previously presented
Canceled
A semiconductor device comprising: a semiconductor substrate including an insulator, wherein the semiconductor substrate is one of Si, Ge, Sn, GaAs, GaP, InAs, InP, InSb, GaSb, GaN, InN, A l P, AlAs, or AN; a first graphene layer grown on a surface of the semiconductor substrate, the first graphene layer being directly on the surface of the semiconductor substrate and not directly on the surface of the insulator, the first graphene having a width in a first direction that is greater than a thickness of the first graphene in a second direction crossing the first direction; and a second graphene layer grown on a surface of the insulator, a thickness of the second graphene layer being different than a thickness of the first graphene layer, the second graphene layer being directly on the surface of the insulator, the second graphene having a width in the first direction that is greater than a thickness of the second graphene in the second direction, the first graphene and the second graphene being parallel to each other such that the width of the first graphene and the width of the second graphene each extend in the first direction, and a lower surface of the insulator is not directly on the first graphene. Previously presented
The semiconductor device of claim 8, wherein the thickness of the first graphene layer is greater than the thickness of the second graphene layer. Original
The semiconductor device of claim 8, wherein the semiconductor substrate further includes a doping material. Previously presented
Canceled
A method of manufacturing a semiconductor device, the method comprising: preparing a substrate, the substrate including an insulator and a semiconductor, the semiconductor including at least one of a group IV material or a group I II -V compound; and growing a first graphene layer on a surface of the semiconductor using a plasma-enhanced chemical vapor deposition (PECVD) process, wherein the semiconductor device does not include graphene directly on the surface of the insulator. Withdrawn
The method of claim 12, wherein the semiconductor further includes a doping material. Withdrawn
The method of claim 12, wherein the growing the first graphene layer does not form a graphene layer on a surface of the insulator. Withdrawn
The method of claim 12, further comprising: growing a second graphene layer on a surface of the insulator using the PECVD process, wherein a thickness of the second graphene layer is different than a thickness of the first graphene layer, the thickness of at least one of the first graphene layer or the second graphene layer depends on a process time of the PECVD process. Withdrawn
The method of claim 12, wherein a source gas for the PECVD process includes a hydrocarbon. Withdrawn
The method of claim 12, wherein a process temperature of the PECVD process is from 300 ° C to 700 °C. Withdrawn
The method of claim 12, wherein a process pressure of the PECVD process is from 10 mTorr to 50 mTorr. Withdrawn
The method of claim 12, wherein a plasma power of the PECVD process is from 50 W to 300 W. Withdrawn
A method of manufacturing a semiconductor device, the method comprising: growing a first graphene layer on a surface of a semiconductor using a plasma- enhanced chemical vapor deposition (PECVD) process, the semiconductor being part of a substrate including an insulator and the semiconductor, and the semiconductor including at least one of a group IV material or a group I II-V compound. Withdrawn
Layer stacks claimed or described, ordered top of device to substrate.
semiconductor device with graphene on semiconductor substrate
semiconductor device with first and second graphene layers
Materials described outside the worked examples.
semiconductor substrate (group IV or III-V)
semiconductor (Si, Ge, Sn, GaAs, GaP, InAs, InP, InSb, GaSb, GaN, InN, AlP, AlAs, AlN)
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
doping material concentration in semiconductor substrate | 1000000000000000–1e+22 cm⁻³ | doping material (B, As, P, Sb, C, Si, Mg) |
— | 50–300 W |
Patent
Atlas literature
Patent
US 10,840,338Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional view of a semiconductor device according to some example embodiments; [0027]
FIG. 2 is a photograph of a graphene layer grown, via a plasma-enhanced chemical vapor deposition (PECVD) process, on a surface of a germanium (Ge) …
FIG. 3 is a cross-sectional view of a semiconductor device according to some example embodiments; [0029]
FIG. 4 is a cross-sectional view of a semiconductor device according to some example embodiments; [0030]
FIG. 5 is a cross-sectional view of a semiconductor device according to some example embodiments; [0031]
FIG. 6 is a cross-sectional view of a semiconductor device according to some example embodiments; [0032]
FIG. 7 is a photograph of graphene layers having different thicknesses according to growth times, grown on a surface of a Ge semiconductor layer and on a …
FIG. 8 is a cross-sectional view of a semiconductor device according to some example embodiments; [0034]
FIG. 9 is a cross-sectional view of a semiconductor device according to some example embodiments; and [0035]
FIG. 10 is a cross-sectional view of a semiconductor device according to some example embodiments.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: a semiconductor substrate including an insulator pattern on the semiconductor substrate is one of Si, Ge, Sn, GaAs, GaP, InAs, InP, InSb, GaSb, GaN, InN, A l P, AlAs, or A N; and a graphene layer grown on a surface of the semiconductor substrate, the graphene layer being directly on the surface of the semiconductor substrate and not directly on a surface of the insulator, wherein the semiconductor device does not include graphene directly on the surface of the insulator, and wherein the graphene comprises a hexagonal honeycomb structure, and the hexagonal honeycomb structure extends parallel to the surface of the semiconductor substrate on which the graphene layer is grown. Currently amended
The semiconductor device of claim 1, wherein the semiconductor substrate further includes a doping material. Previously presented
The semiconductor device of claim 1, wherein the insulator includes at least one of silicon oxide (Si O 2), silicon nitride (SiN), silicon oxynitride (SiO xNy), silicon oxycarbide (SiO xCy), germanium oxynitride (GeO xNy), germanium oxycarbide (GeO xCy), aluminum oxide (A 1 2 O 3), hafnium oxide (Hf O 2), or zirconium oxide (Zr O 2), SVG 15807096.05-13-2020.KA₈CT₇TCLXEAPX5.CLM.1.svg 0.14 0.74 Black and white SVG 15807096.05-13-2020.KA₈CT₇TCLXEAPX5.CLM.2.svg 0.14 0.63 Black and white Previously presented
The semiconductor device of claim 1, wherein the insulator is on the semiconductor, and the insulator is an insulating layer Previously presented
The semiconductor device of claim 1, wherein the insulator includes an insulator substrate, and the semiconductor substrate is on the insulator substrate. Previously presented
The semiconductor device of claim 1, wherein the surface of the semiconductor substrate and a surface of the insulator are on a same plane relative to each other or on different planes relative to each other. Previously presented
Canceled
A semiconductor device comprising: a semiconductor substrate including an insulator, wherein the semiconductor substrate is one of Si, Ge, Sn, GaAs, GaP, InAs, InP, InSb, GaSb, GaN, InN, A l P, AlAs, or AN; a first graphene layer grown on a surface of the semiconductor substrate, the first graphene layer being directly on the surface of the semiconductor substrate and not directly on the surface of the insulator, the first graphene having a width in a first direction that is greater than a thickness of the first graphene in a second direction crossing the first direction; and a second graphene layer grown on a surface of the insulator, a thickness of the second graphene layer being different than a thickness of the first graphene layer, the second graphene layer being directly on the surface of the insulator, the second graphene having a width in the first direction that is greater than a thickness of the second graphene in the second direction, the first graphene and the second graphene being parallel to each other such that the width of the first graphene and the width of the second graphene each extend in the first direction, and a lower surface of the insulator is not directly on the first graphene. Previously presented
The semiconductor device of claim 8, wherein the thickness of the first graphene layer is greater than the thickness of the second graphene layer. Original
The semiconductor device of claim 8, wherein the semiconductor substrate further includes a doping material. Previously presented
Canceled
A method of manufacturing a semiconductor device, the method comprising: preparing a substrate, the substrate including an insulator and a semiconductor, the semiconductor including at least one of a group IV material or a group I II -V compound; and growing a first graphene layer on a surface of the semiconductor using a plasma-enhanced chemical vapor deposition (PECVD) process, wherein the semiconductor device does not include graphene directly on the surface of the insulator. Withdrawn
The method of claim 12, wherein the semiconductor further includes a doping material. Withdrawn
The method of claim 12, wherein the growing the first graphene layer does not form a graphene layer on a surface of the insulator. Withdrawn
The method of claim 12, further comprising: growing a second graphene layer on a surface of the insulator using the PECVD process, wherein a thickness of the second graphene layer is different than a thickness of the first graphene layer, the thickness of at least one of the first graphene layer or the second graphene layer depends on a process time of the PECVD process. Withdrawn
The method of claim 12, wherein a source gas for the PECVD process includes a hydrocarbon. Withdrawn
The method of claim 12, wherein a process temperature of the PECVD process is from 300 ° C to 700 °C. Withdrawn
The method of claim 12, wherein a process pressure of the PECVD process is from 10 mTorr to 50 mTorr. Withdrawn
The method of claim 12, wherein a plasma power of the PECVD process is from 50 W to 300 W. Withdrawn
A method of manufacturing a semiconductor device, the method comprising: growing a first graphene layer on a surface of a semiconductor using a plasma- enhanced chemical vapor deposition (PECVD) process, the semiconductor being part of a substrate including an insulator and the semiconductor, and the semiconductor including at least one of a group IV material or a group I II-V compound. Withdrawn
Layer stacks claimed or described, ordered top of device to substrate.
semiconductor device with graphene on semiconductor substrate
semiconductor device with first and second graphene layers
Materials described outside the worked examples.
semiconductor substrate (group IV or III-V)
semiconductor (Si, Ge, Sn, GaAs, GaP, InAs, InP, InSb, GaSb, GaN, InN, AlP, AlAs, AlN)
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
doping material concentration in semiconductor substrate | 1000000000000000–1e+22 cm⁻³ | doping material (B, As, P, Sb, C, Si, Mg) |
— | 50–300 W |
Patent
Atlas literature
Patent
US 10,840,338Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional view of a semiconductor device according to some example embodiments; [0027]
FIG. 2 is a photograph of a graphene layer grown, via a plasma-enhanced chemical vapor deposition (PECVD) process, on a surface of a germanium (Ge) …
FIG. 3 is a cross-sectional view of a semiconductor device according to some example embodiments; [0029]
FIG. 4 is a cross-sectional view of a semiconductor device according to some example embodiments; [0030]
FIG. 5 is a cross-sectional view of a semiconductor device according to some example embodiments; [0031]
FIG. 6 is a cross-sectional view of a semiconductor device according to some example embodiments; [0032]
FIG. 7 is a photograph of graphene layers having different thicknesses according to growth times, grown on a surface of a Ge semiconductor layer and on a …
FIG. 8 is a cross-sectional view of a semiconductor device according to some example embodiments; [0034]
FIG. 9 is a cross-sectional view of a semiconductor device according to some example embodiments; and [0035]
FIG. 10 is a cross-sectional view of a semiconductor device according to some example embodiments.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: a semiconductor substrate including an insulator pattern on the semiconductor substrate is one of Si, Ge, Sn, GaAs, GaP, InAs, InP, InSb, GaSb, GaN, InN, A l P, AlAs, or A N; and a graphene layer grown on a surface of the semiconductor substrate, the graphene layer being directly on the surface of the semiconductor substrate and not directly on a surface of the insulator, wherein the semiconductor device does not include graphene directly on the surface of the insulator, and wherein the graphene comprises a hexagonal honeycomb structure, and the hexagonal honeycomb structure extends parallel to the surface of the semiconductor substrate on which the graphene layer is grown. Currently amended
The semiconductor device of claim 1, wherein the semiconductor substrate further includes a doping material. Previously presented
The semiconductor device of claim 1, wherein the insulator includes at least one of silicon oxide (Si O 2), silicon nitride (SiN), silicon oxynitride (SiO xNy), silicon oxycarbide (SiO xCy), germanium oxynitride (GeO xNy), germanium oxycarbide (GeO xCy), aluminum oxide (A 1 2 O 3), hafnium oxide (Hf O 2), or zirconium oxide (Zr O 2), SVG 15807096.05-13-2020.KA₈CT₇TCLXEAPX5.CLM.1.svg 0.14 0.74 Black and white SVG 15807096.05-13-2020.KA₈CT₇TCLXEAPX5.CLM.2.svg 0.14 0.63 Black and white Previously presented
The semiconductor device of claim 1, wherein the insulator is on the semiconductor, and the insulator is an insulating layer Previously presented
The semiconductor device of claim 1, wherein the insulator includes an insulator substrate, and the semiconductor substrate is on the insulator substrate. Previously presented
The semiconductor device of claim 1, wherein the surface of the semiconductor substrate and a surface of the insulator are on a same plane relative to each other or on different planes relative to each other. Previously presented
Canceled
A semiconductor device comprising: a semiconductor substrate including an insulator, wherein the semiconductor substrate is one of Si, Ge, Sn, GaAs, GaP, InAs, InP, InSb, GaSb, GaN, InN, A l P, AlAs, or AN; a first graphene layer grown on a surface of the semiconductor substrate, the first graphene layer being directly on the surface of the semiconductor substrate and not directly on the surface of the insulator, the first graphene having a width in a first direction that is greater than a thickness of the first graphene in a second direction crossing the first direction; and a second graphene layer grown on a surface of the insulator, a thickness of the second graphene layer being different than a thickness of the first graphene layer, the second graphene layer being directly on the surface of the insulator, the second graphene having a width in the first direction that is greater than a thickness of the second graphene in the second direction, the first graphene and the second graphene being parallel to each other such that the width of the first graphene and the width of the second graphene each extend in the first direction, and a lower surface of the insulator is not directly on the first graphene. Previously presented
The semiconductor device of claim 8, wherein the thickness of the first graphene layer is greater than the thickness of the second graphene layer. Original
The semiconductor device of claim 8, wherein the semiconductor substrate further includes a doping material. Previously presented
Canceled
A method of manufacturing a semiconductor device, the method comprising: preparing a substrate, the substrate including an insulator and a semiconductor, the semiconductor including at least one of a group IV material or a group I II -V compound; and growing a first graphene layer on a surface of the semiconductor using a plasma-enhanced chemical vapor deposition (PECVD) process, wherein the semiconductor device does not include graphene directly on the surface of the insulator. Withdrawn
The method of claim 12, wherein the semiconductor further includes a doping material. Withdrawn
The method of claim 12, wherein the growing the first graphene layer does not form a graphene layer on a surface of the insulator. Withdrawn
The method of claim 12, further comprising: growing a second graphene layer on a surface of the insulator using the PECVD process, wherein a thickness of the second graphene layer is different than a thickness of the first graphene layer, the thickness of at least one of the first graphene layer or the second graphene layer depends on a process time of the PECVD process. Withdrawn
The method of claim 12, wherein a source gas for the PECVD process includes a hydrocarbon. Withdrawn
The method of claim 12, wherein a process temperature of the PECVD process is from 300 ° C to 700 °C. Withdrawn
The method of claim 12, wherein a process pressure of the PECVD process is from 10 mTorr to 50 mTorr. Withdrawn
The method of claim 12, wherein a plasma power of the PECVD process is from 50 W to 300 W. Withdrawn
A method of manufacturing a semiconductor device, the method comprising: growing a first graphene layer on a surface of a semiconductor using a plasma- enhanced chemical vapor deposition (PECVD) process, the semiconductor being part of a substrate including an insulator and the semiconductor, and the semiconductor including at least one of a group IV material or a group I II-V compound. Withdrawn
Layer stacks claimed or described, ordered top of device to substrate.
semiconductor device with graphene on semiconductor substrate
semiconductor device with first and second graphene layers
Materials described outside the worked examples.
semiconductor substrate (group IV or III-V)
semiconductor (Si, Ge, Sn, GaAs, GaP, InAs, InP, InSb, GaSb, GaN, InN, AlP, AlAs, AlN)
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
doping material concentration in semiconductor substrate | 1000000000000000–1e+22 cm⁻³ | doping material (B, As, P, Sb, C, Si, Mg) |
— | 50–300 W |
insulator pattern
doping material
insulator (SiO2, SiN, SiOxNy, SiOxCy, GeOxNy, GeOxCy, Al₂O3, HfO2, ZrO₂)
first graphene layer
C
hydrocarbon source gas (methane CH4, acetylene C₂H2, or ethylene C₂H₄)
insulating layer (SiO2, SiN, SiOxNy, SiOxCy, GeOxNy, GeOxCy, Al₂O3, HfO2, ZrO₂)
doping material (B, As, P, Sb, C, Si, Mg)
| — |
Pressure | 10–50 mTorr | — |
Temperature | 300–700 °C | — |
insulator pattern
doping material
insulator (SiO2, SiN, SiOxNy, SiOxCy, GeOxNy, GeOxCy, Al₂O3, HfO2, ZrO₂)
first graphene layer
C
hydrocarbon source gas (methane CH4, acetylene C₂H2, or ethylene C₂H₄)
insulating layer (SiO2, SiN, SiOxNy, SiOxCy, GeOxNy, GeOxCy, Al₂O3, HfO2, ZrO₂)
doping material (B, As, P, Sb, C, Si, Mg)
| — |
Pressure | 10–50 mTorr | — |
Temperature | 300–700 °C | — |
insulator pattern
doping material
insulator (SiO2, SiN, SiOxNy, SiOxCy, GeOxNy, GeOxCy, Al₂O3, HfO2, ZrO₂)
first graphene layer
C
hydrocarbon source gas (methane CH4, acetylene C₂H2, or ethylene C₂H₄)
insulating layer (SiO2, SiN, SiOxNy, SiOxCy, GeOxNy, GeOxCy, Al₂O3, HfO2, ZrO₂)
doping material (B, As, P, Sb, C, Si, Mg)
| — |
Pressure | 10–50 mTorr | — |
Temperature | 300–700 °C | — |
insulator pattern
doping material
insulator (SiO2, SiN, SiOxNy, SiOxCy, GeOxNy, GeOxCy, Al₂O3, HfO2, ZrO₂)
first graphene layer
C
hydrocarbon source gas (methane CH4, acetylene C₂H2, or ethylene C₂H₄)
insulating layer (SiO2, SiN, SiOxNy, SiOxCy, GeOxNy, GeOxCy, Al₂O3, HfO2, ZrO₂)
doping material (B, As, P, Sb, C, Si, Mg)
| — |
Pressure | 10–50 mTorr | — |
Temperature | 300–700 °C | — |