Patent
US 10,615,094High Power Gallium Nitride Devices and Structures
Zhanming Li
US
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US 10,615,094Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1. (curr e ntly a mren ded) A semiconductor device, comprising: a die having four sides and four corners, wherein first and second corners are opposed and third and fourth corners are opposed; first and second electrodes disposed on the die at locations corresponding respectively to the first and second corners, each of the first a n d second electrodes having a bonding pad, a tapered base, and a plurality of tape re d electrode fingers extending from the tapered base; w here i n the bonding pad of each of t he first and second electrodes is located at a respective first and second corner of the die; wherein the tapered base of each of t he first a n d second electrodes decreases i n width in both directions away from its res p ective corner of the die; wherein the p lurality of tapere d electrode fingers of the first and second electrodes are interdigitated and o rieted parallel to an axis defin ed b yt he f irst and secon d co rners af the die; and a c onduct iv e channel between the interdigitated taper ed electrode fingers of the first and second electrodes.
(original) The semiconductor device of claim 1, w herein the die is diamond-shaped. Original
(original) The se micon ductor device of claim 1, wherein the die is square-shaped. Original
(current ly amended) The se m iconductor device of claim 1, wherein the taper ed electrode fingers are o f varying length, the length of the tapered electrode fingers decreasing along the tapered electrodes i n b oth directions away from thei r respective corners of the die. Currently amended
A semiconductor device mat rix, comprising: a ci rc uit b oard: a p i ural ity of conductors disposed on at least one side of the circuit board as interdigitated conductors; at least one electrica l connection point associated with each of the plura li ty of conductors; a plurality of identical or si mila r semiconductor dies according to claim 1, the di e s being arranged in a m atrix comprising n rows X m columns, where n and m are no n- zero inte g ers; the plurality of dies being mounted on the circuit board with electrical c onnections between the electrodes of the dies and the interdigitated conductors of the circuit board; wh ere i n the interdigitated conductors conduct electrical current to and from each o f the dies. Original
(original) The semiconductor device matrix of claim 1 2, wherein the plurality of identical or similar semicondu ct or dies comprise FEBs or l-I EMTs; further comprising a gate conductor disposed on the circuit board between the interdigitated con ductors, for connection to gates of the EET s or HEM Ts. Original
(origina l) The se mic onduc to r device matrix of claim 1 6, wherein the plura l ity of identical or simil ar semiconductor d ie s are m ounted to both sides of the circuit b oard. Original
(cancelled) Canceled
6. (currentl y amern ded) The semiconductor device of c laim 1, wherein each finger of the plurality of tape red e l ectrode f ingers has a base where it extends from an electrode and a tip, and each tape red ele ctrod e finger is wider at the b ase than at the tip,
7. The semiconductor device of clai m 1, wherein the semicondu ct or device is a diode, wherein the first and second e l ectrodes are an anode and a cathode of the diode. Original
9. (ori ginal) The semiconductor device of claim 7, wherein the semiconductor device is a Ga N diode. Original
The semiconductor device matrix of clai m 16, wherein the plurality of identical or similar semiconductor dies are mounted to one side of the circuit b oard. Original
The semiconductor device matrix of clai m 19. wherein the plurality of identica l or similar semiconductor dies are mounted to o n e side of e ach of the two or more circuit boards. Original
The semiconductor device matrix of c laim 19, wherein the pluralit y of identical or similar se m iconductor dies are mounted to both sides of
22, (original) The semiconductor device matrix identica i or similar semiconductor dies are flip-chip circuit b oard. Original
(ori g inal) The semiconductor device matrix wherein the plurality of identical or si m ilar a source o f the MOSFET is connected to gates of each of the two or more circuit boards, Original of clai m 11, wherein the p l urality of mounted or w ire bond mounted o n the of c i aim 11, further comprising a MOSFET; semiconductor die s comprise Ga N HEMTs; wherein the Ga N HEMTs, Original
Layer stacks claimed or described, ordered top of device to substrate.
semiconductor device with interdigitated tapered electrode fingers
GaN diode with interdigitated anode/cathode fingers
Materials described outside the worked examples.
Gallium Nitride
GaN
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,615,094Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1. (curr e ntly a mren ded) A semiconductor device, comprising: a die having four sides and four corners, wherein first and second corners are opposed and third and fourth corners are opposed; first and second electrodes disposed on the die at locations corresponding respectively to the first and second corners, each of the first a n d second electrodes having a bonding pad, a tapered base, and a plurality of tape re d electrode fingers extending from the tapered base; w here i n the bonding pad of each of t he first and second electrodes is located at a respective first and second corner of the die; wherein the tapered base of each of t he first a n d second electrodes decreases i n width in both directions away from its res p ective corner of the die; wherein the p lurality of tapere d electrode fingers of the first and second electrodes are interdigitated and o rieted parallel to an axis defin ed b yt he f irst and secon d co rners af the die; and a c onduct iv e channel between the interdigitated taper ed electrode fingers of the first and second electrodes.
(original) The semiconductor device of claim 1, w herein the die is diamond-shaped. Original
(original) The se micon ductor device of claim 1, wherein the die is square-shaped. Original
(current ly amended) The se m iconductor device of claim 1, wherein the taper ed electrode fingers are o f varying length, the length of the tapered electrode fingers decreasing along the tapered electrodes i n b oth directions away from thei r respective corners of the die. Currently amended
A semiconductor device mat rix, comprising: a ci rc uit b oard: a p i ural ity of conductors disposed on at least one side of the circuit board as interdigitated conductors; at least one electrica l connection point associated with each of the plura li ty of conductors; a plurality of identical or si mila r semiconductor dies according to claim 1, the di e s being arranged in a m atrix comprising n rows X m columns, where n and m are no n- zero inte g ers; the plurality of dies being mounted on the circuit board with electrical c onnections between the electrodes of the dies and the interdigitated conductors of the circuit board; wh ere i n the interdigitated conductors conduct electrical current to and from each o f the dies. Original
(original) The semiconductor device matrix of claim 1 2, wherein the plurality of identical or similar semicondu ct or dies comprise FEBs or l-I EMTs; further comprising a gate conductor disposed on the circuit board between the interdigitated con ductors, for connection to gates of the EET s or HEM Ts. Original
(origina l) The se mic onduc to r device matrix of claim 1 6, wherein the plura l ity of identical or simil ar semiconductor d ie s are m ounted to both sides of the circuit b oard. Original
(cancelled) Canceled
6. (currentl y amern ded) The semiconductor device of c laim 1, wherein each finger of the plurality of tape red e l ectrode f ingers has a base where it extends from an electrode and a tip, and each tape red ele ctrod e finger is wider at the b ase than at the tip,
7. The semiconductor device of clai m 1, wherein the semicondu ct or device is a diode, wherein the first and second e l ectrodes are an anode and a cathode of the diode. Original
9. (ori ginal) The semiconductor device of claim 7, wherein the semiconductor device is a Ga N diode. Original
The semiconductor device matrix of clai m 16, wherein the plurality of identical or similar semiconductor dies are mounted to one side of the circuit b oard. Original
The semiconductor device matrix of clai m 19. wherein the plurality of identica l or similar semiconductor dies are mounted to o n e side of e ach of the two or more circuit boards. Original
The semiconductor device matrix of c laim 19, wherein the pluralit y of identical or similar se m iconductor dies are mounted to both sides of
22, (original) The semiconductor device matrix identica i or similar semiconductor dies are flip-chip circuit b oard. Original
(ori g inal) The semiconductor device matrix wherein the plurality of identical or si m ilar a source o f the MOSFET is connected to gates of each of the two or more circuit boards, Original of clai m 11, wherein the p l urality of mounted or w ire bond mounted o n the of c i aim 11, further comprising a MOSFET; semiconductor die s comprise Ga N HEMTs; wherein the Ga N HEMTs, Original
Layer stacks claimed or described, ordered top of device to substrate.
semiconductor device with interdigitated tapered electrode fingers
GaN diode with interdigitated anode/cathode fingers
Materials described outside the worked examples.
Gallium Nitride
GaN
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,615,094Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1. (curr e ntly a mren ded) A semiconductor device, comprising: a die having four sides and four corners, wherein first and second corners are opposed and third and fourth corners are opposed; first and second electrodes disposed on the die at locations corresponding respectively to the first and second corners, each of the first a n d second electrodes having a bonding pad, a tapered base, and a plurality of tape re d electrode fingers extending from the tapered base; w here i n the bonding pad of each of t he first and second electrodes is located at a respective first and second corner of the die; wherein the tapered base of each of t he first a n d second electrodes decreases i n width in both directions away from its res p ective corner of the die; wherein the p lurality of tapere d electrode fingers of the first and second electrodes are interdigitated and o rieted parallel to an axis defin ed b yt he f irst and secon d co rners af the die; and a c onduct iv e channel between the interdigitated taper ed electrode fingers of the first and second electrodes.
(original) The semiconductor device of claim 1, w herein the die is diamond-shaped. Original
(original) The se micon ductor device of claim 1, wherein the die is square-shaped. Original
(current ly amended) The se m iconductor device of claim 1, wherein the taper ed electrode fingers are o f varying length, the length of the tapered electrode fingers decreasing along the tapered electrodes i n b oth directions away from thei r respective corners of the die. Currently amended
A semiconductor device mat rix, comprising: a ci rc uit b oard: a p i ural ity of conductors disposed on at least one side of the circuit board as interdigitated conductors; at least one electrica l connection point associated with each of the plura li ty of conductors; a plurality of identical or si mila r semiconductor dies according to claim 1, the di e s being arranged in a m atrix comprising n rows X m columns, where n and m are no n- zero inte g ers; the plurality of dies being mounted on the circuit board with electrical c onnections between the electrodes of the dies and the interdigitated conductors of the circuit board; wh ere i n the interdigitated conductors conduct electrical current to and from each o f the dies. Original
(original) The semiconductor device matrix of claim 1 2, wherein the plurality of identical or similar semicondu ct or dies comprise FEBs or l-I EMTs; further comprising a gate conductor disposed on the circuit board between the interdigitated con ductors, for connection to gates of the EET s or HEM Ts. Original
(origina l) The se mic onduc to r device matrix of claim 1 6, wherein the plura l ity of identical or simil ar semiconductor d ie s are m ounted to both sides of the circuit b oard. Original
(cancelled) Canceled
6. (currentl y amern ded) The semiconductor device of c laim 1, wherein each finger of the plurality of tape red e l ectrode f ingers has a base where it extends from an electrode and a tip, and each tape red ele ctrod e finger is wider at the b ase than at the tip,
7. The semiconductor device of clai m 1, wherein the semicondu ct or device is a diode, wherein the first and second e l ectrodes are an anode and a cathode of the diode. Original
9. (ori ginal) The semiconductor device of claim 7, wherein the semiconductor device is a Ga N diode. Original
The semiconductor device matrix of clai m 16, wherein the plurality of identical or similar semiconductor dies are mounted to one side of the circuit b oard. Original
The semiconductor device matrix of clai m 19. wherein the plurality of identica l or similar semiconductor dies are mounted to o n e side of e ach of the two or more circuit boards. Original
The semiconductor device matrix of c laim 19, wherein the pluralit y of identical or similar se m iconductor dies are mounted to both sides of
22, (original) The semiconductor device matrix identica i or similar semiconductor dies are flip-chip circuit b oard. Original
(ori g inal) The semiconductor device matrix wherein the plurality of identical or si m ilar a source o f the MOSFET is connected to gates of each of the two or more circuit boards, Original of clai m 11, wherein the p l urality of mounted or w ire bond mounted o n the of c i aim 11, further comprising a MOSFET; semiconductor die s comprise Ga N HEMTs; wherein the Ga N HEMTs, Original
Layer stacks claimed or described, ordered top of device to substrate.
semiconductor device with interdigitated tapered electrode fingers
GaN diode with interdigitated anode/cathode fingers
Materials described outside the worked examples.
Gallium Nitride
GaN
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,615,094Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1. (curr e ntly a mren ded) A semiconductor device, comprising: a die having four sides and four corners, wherein first and second corners are opposed and third and fourth corners are opposed; first and second electrodes disposed on the die at locations corresponding respectively to the first and second corners, each of the first a n d second electrodes having a bonding pad, a tapered base, and a plurality of tape re d electrode fingers extending from the tapered base; w here i n the bonding pad of each of t he first and second electrodes is located at a respective first and second corner of the die; wherein the tapered base of each of t he first a n d second electrodes decreases i n width in both directions away from its res p ective corner of the die; wherein the p lurality of tapere d electrode fingers of the first and second electrodes are interdigitated and o rieted parallel to an axis defin ed b yt he f irst and secon d co rners af the die; and a c onduct iv e channel between the interdigitated taper ed electrode fingers of the first and second electrodes.
(original) The semiconductor device of claim 1, w herein the die is diamond-shaped. Original
(original) The se micon ductor device of claim 1, wherein the die is square-shaped. Original
(current ly amended) The se m iconductor device of claim 1, wherein the taper ed electrode fingers are o f varying length, the length of the tapered electrode fingers decreasing along the tapered electrodes i n b oth directions away from thei r respective corners of the die. Currently amended
A semiconductor device mat rix, comprising: a ci rc uit b oard: a p i ural ity of conductors disposed on at least one side of the circuit board as interdigitated conductors; at least one electrica l connection point associated with each of the plura li ty of conductors; a plurality of identical or si mila r semiconductor dies according to claim 1, the di e s being arranged in a m atrix comprising n rows X m columns, where n and m are no n- zero inte g ers; the plurality of dies being mounted on the circuit board with electrical c onnections between the electrodes of the dies and the interdigitated conductors of the circuit board; wh ere i n the interdigitated conductors conduct electrical current to and from each o f the dies. Original
(original) The semiconductor device matrix of claim 1 2, wherein the plurality of identical or similar semicondu ct or dies comprise FEBs or l-I EMTs; further comprising a gate conductor disposed on the circuit board between the interdigitated con ductors, for connection to gates of the EET s or HEM Ts. Original
(origina l) The se mic onduc to r device matrix of claim 1 6, wherein the plura l ity of identical or simil ar semiconductor d ie s are m ounted to both sides of the circuit b oard. Original
(cancelled) Canceled
6. (currentl y amern ded) The semiconductor device of c laim 1, wherein each finger of the plurality of tape red e l ectrode f ingers has a base where it extends from an electrode and a tip, and each tape red ele ctrod e finger is wider at the b ase than at the tip,
7. The semiconductor device of clai m 1, wherein the semicondu ct or device is a diode, wherein the first and second e l ectrodes are an anode and a cathode of the diode. Original
9. (ori ginal) The semiconductor device of claim 7, wherein the semiconductor device is a Ga N diode. Original
The semiconductor device matrix of clai m 16, wherein the plurality of identical or similar semiconductor dies are mounted to one side of the circuit b oard. Original
The semiconductor device matrix of clai m 19. wherein the plurality of identica l or similar semiconductor dies are mounted to o n e side of e ach of the two or more circuit boards. Original
The semiconductor device matrix of c laim 19, wherein the pluralit y of identical or similar se m iconductor dies are mounted to both sides of
22, (original) The semiconductor device matrix identica i or similar semiconductor dies are flip-chip circuit b oard. Original
(ori g inal) The semiconductor device matrix wherein the plurality of identical or si m ilar a source o f the MOSFET is connected to gates of each of the two or more circuit boards, Original of clai m 11, wherein the p l urality of mounted or w ire bond mounted o n the of c i aim 11, further comprising a MOSFET; semiconductor die s comprise Ga N HEMTs; wherein the Ga N HEMTs, Original
Layer stacks claimed or described, ordered top of device to substrate.
semiconductor device with interdigitated tapered electrode fingers
GaN diode with interdigitated anode/cathode fingers
Materials described outside the worked examples.
Gallium Nitride
GaN
Related documents with shared materials, methods, properties, or citations.
GaN FET/GaN HEMT with interdigitated drain/source and gate electrode
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METHOD FOR FORMING GALLIUM NITRIDE SEMICONDUCTOR DEVICE WITH IMPROVED FORWARD CONDUCTION
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GaN FET/GaN HEMT with interdigitated drain/source and gate electrode
semiconductor device matrix on circuit board with interdigitated conductors
cascoded GaN HEMT matrix with MOSFET
METHOD FOR FORMING GALLIUM NITRIDE SEMICONDUCTOR DEVICE WITH IMPROVED FORWARD CONDUCTION
GaN FET/GaN HEMT with interdigitated drain/source and gate electrode
semiconductor device matrix on circuit board with interdigitated conductors
cascoded GaN HEMT matrix with MOSFET
METHOD FOR FORMING GALLIUM NITRIDE SEMICONDUCTOR DEVICE WITH IMPROVED FORWARD CONDUCTION