Patent
US 8,431,928PIN STRUCTURES INCLUDING INTRINSIC GALLIUM ARSENIDE, DEVICES INCORPORATING THE SAME, AND RELATED METHODS
Ashutosh Tiwari
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 8,431,928Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 (y axis is counts and the x axis is energy). The spectra confirm the presence of both Ga and As and the absence of organic contaminants in the iGaAs …
FIG. 2. As shown in the figure, the protrusions are characterized by circular cross-sections. The protrusions project away from the 7 Atty. Dkt. No. …
FIG. 3. These studies show that the deposition parameters can be adjusted to provide control over the bandgap of the iGaAs layers.
FIG. 4 shows a plot of the bandgap of eight intrinsic GaAs layers formed under eight different sets of deposition parameters. [0014] FIGs. 5A- B show Raman …
FIG. 5, showing the transverse and longitudinal vibration modes. [0070] Photoluminescence spectra of three different iGaAs layers (B, C, D) formed under the …
FIG. 6 shows a PIN structure having an intrinsic GaAs layer formed according to the methods disclosed herein. [0016]
FIG. 7 shows a schematic of a photovoltaic device. [0017]
FIG. 8 shows a schematic of an apparatus for maintaining the frozen state of a target material for use with pulsed laser assisted chemical vapor deposition …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
(Cancelled.) canceled
The PIN structure of c ~aim4claim 6, wherein the layer of intrinsic GaAs comprises nonoriented polycrystalline intrinsic GaAs.
The PIN structure of Q ~aim4claim 6, wherein the layer of intrinsic GaAs comprises oriented polycrystalline intrinsic GaAs.
(Cancelled.) canceled
(Cancelled.) canceled
A P I N structure comprising: (a) a layer of amorphous n-type silicon; (b) a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon; and (c) a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs, wherein a surface of the layer of intrinsic GaAs comprises a random distribution of protrusions projecting away from the surface of the layer, further wherein the protrusions are characterized by a circular cross-section, and further wherein the protrusions are characterized by an average diameter of about 50 nm or greater and an average height of about 10 nm or greater.
The PIN structure of claim 6, wherein the layer of intrinsic GaAs is both in direct contact with the layer of amorphous n-type silicon and with the layer of amorphous p-type silicon.
(Cancelled.) canceled
The PIN structure of c ~aim4claim 6, wherein the layer of intrinsic GaAs comprises metallic particles embedded within the layer, the metallic particles comprising one or more noble metals.
The PIN structure of claim 8, wherein the noble metals are selected from the group consisting of ruthenium, rhodium, palladium, silver, osmium, iridium, platinum, gold, and combinations thereof.
The PIN structure of claim 8, wherein the average size of the metallic particles is greater than the average size of crystal grains within the layer of intrinsic GaAs.
The PIN structure of claim 8, wherein the areal density of the metallic particles is about 5 x 1 04 c m-2 or greater.
A PIN structure comprising: (a) a layer of amorphous n-type silicon; (b) a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon; and (c) a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs, wherein the layer of intrinsic GaAs comprises metallic particles embedded within the layer, the metallic particles comprising one or more noble metals, and further wherein the metallic particles are characterized by a maximum dimension of about 100 nm or greater.
The PIN structure of claim 11, wherein the layer of intrinsic GaAs is both in direct contact with the layer of amorphous n-type silicon and with the layer of amorphous p- type silicon.
A photovoltaic device comprising: (a) a PIN structure comprising: (i) a layer of amorphous n-type silicon; (ii) a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon; and (iii) a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs, wherein a surface of the la y er of intrinsic GaAs comprises a random distribution of protrusions projecting away from the surface of the la y er, further wherein the protrusions are characterized by a circular cross-section, and further wherein the protrusions are characterized by an average diameter of about 50 nm or greater and an average height of about 10 nm or greater; (b) a first electrode in electrical contact with the layer of amorphous n-type silicon; 3 Atty. Dkt. No.: 00800-0038-03 (c) a second electrode in electrical contact with the layer of amorphous p-type silicon; and (d) a voltage source in electrical contact with the first and second electrodes.
The photovoltaic device of claim 13, wherein the layer of intrinsic GaAs comprises nonoriented polycrystalline intrinsic GaAs.
The photovoltaic device of claim 13, wherein the layer of intrinsic GaAs comprises oriented polycrystalline intrinsic GaAs.
The photovoltaic device of claim 13, wherein the layer of intrinsic GaAs comprises metallic particles embedded within the layer, the metallic particles comprising one or more noble metals.
The photovoltaic device of claim 13, wherein the layer of intrinsic GaAs is both in direct contact with the layer of amorphous n-type silicon and with the layer of amorphous p-type silicon.
(Cancelled.) canceled
(Cancelled.) canceled
(Cancelled.) canceled
A photovoltaic device comprising: (a) a PIN structure comprising: (i) a layer of amorphous n-type silicon; (ii) a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon; and (iii) a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs, wherein the layer of intrinsic GaAs comprises metallic particles embedded within the layer, the metallic particles comprising one or more noble metals, and further wherein the metallic particles are characterized by a maximum dimension of about 100 nm or greater; (b) a first electrode in electrical contact with the layer of amorphous n-type silicon; 4 Atty. Dkt. No.: 00800-0038-03 (c) a second electrode in electrical contact with the layer of amorphous p-type silicon; and (d) a voltage source in electrical contact with the first and second electrodes.
The photovoltaic device of claim 21, wherein the layer of intrinsic GaAs is both in direct contact with the layer of amorphous n-type silicon and with the layer of amorphous p-type silicon.
Layer stacks claimed or described, ordered top of device to substrate.
PIN structure
photovoltaic device
Materials described outside the worked examples.
intrinsic GaAs
GaAs
amorphous n-type silicon
Si
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 3. These studies show that the deposition parameters can be adjusted to provide control over the bandgap of the iGaAs layers.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 100–500 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,431,928Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 (y axis is counts and the x axis is energy). The spectra confirm the presence of both Ga and As and the absence of organic contaminants in the iGaAs …
FIG. 2. As shown in the figure, the protrusions are characterized by circular cross-sections. The protrusions project away from the 7 Atty. Dkt. No. …
FIG. 3. These studies show that the deposition parameters can be adjusted to provide control over the bandgap of the iGaAs layers.
FIG. 4 shows a plot of the bandgap of eight intrinsic GaAs layers formed under eight different sets of deposition parameters. [0014] FIGs. 5A- B show Raman …
FIG. 5, showing the transverse and longitudinal vibration modes. [0070] Photoluminescence spectra of three different iGaAs layers (B, C, D) formed under the …
FIG. 6 shows a PIN structure having an intrinsic GaAs layer formed according to the methods disclosed herein. [0016]
FIG. 7 shows a schematic of a photovoltaic device. [0017]
FIG. 8 shows a schematic of an apparatus for maintaining the frozen state of a target material for use with pulsed laser assisted chemical vapor deposition …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
(Cancelled.) canceled
The PIN structure of c ~aim4claim 6, wherein the layer of intrinsic GaAs comprises nonoriented polycrystalline intrinsic GaAs.
The PIN structure of Q ~aim4claim 6, wherein the layer of intrinsic GaAs comprises oriented polycrystalline intrinsic GaAs.
(Cancelled.) canceled
(Cancelled.) canceled
A P I N structure comprising: (a) a layer of amorphous n-type silicon; (b) a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon; and (c) a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs, wherein a surface of the layer of intrinsic GaAs comprises a random distribution of protrusions projecting away from the surface of the layer, further wherein the protrusions are characterized by a circular cross-section, and further wherein the protrusions are characterized by an average diameter of about 50 nm or greater and an average height of about 10 nm or greater.
The PIN structure of claim 6, wherein the layer of intrinsic GaAs is both in direct contact with the layer of amorphous n-type silicon and with the layer of amorphous p-type silicon.
(Cancelled.) canceled
The PIN structure of c ~aim4claim 6, wherein the layer of intrinsic GaAs comprises metallic particles embedded within the layer, the metallic particles comprising one or more noble metals.
The PIN structure of claim 8, wherein the noble metals are selected from the group consisting of ruthenium, rhodium, palladium, silver, osmium, iridium, platinum, gold, and combinations thereof.
The PIN structure of claim 8, wherein the average size of the metallic particles is greater than the average size of crystal grains within the layer of intrinsic GaAs.
The PIN structure of claim 8, wherein the areal density of the metallic particles is about 5 x 1 04 c m-2 or greater.
A PIN structure comprising: (a) a layer of amorphous n-type silicon; (b) a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon; and (c) a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs, wherein the layer of intrinsic GaAs comprises metallic particles embedded within the layer, the metallic particles comprising one or more noble metals, and further wherein the metallic particles are characterized by a maximum dimension of about 100 nm or greater.
The PIN structure of claim 11, wherein the layer of intrinsic GaAs is both in direct contact with the layer of amorphous n-type silicon and with the layer of amorphous p- type silicon.
A photovoltaic device comprising: (a) a PIN structure comprising: (i) a layer of amorphous n-type silicon; (ii) a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon; and (iii) a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs, wherein a surface of the la y er of intrinsic GaAs comprises a random distribution of protrusions projecting away from the surface of the la y er, further wherein the protrusions are characterized by a circular cross-section, and further wherein the protrusions are characterized by an average diameter of about 50 nm or greater and an average height of about 10 nm or greater; (b) a first electrode in electrical contact with the layer of amorphous n-type silicon; 3 Atty. Dkt. No.: 00800-0038-03 (c) a second electrode in electrical contact with the layer of amorphous p-type silicon; and (d) a voltage source in electrical contact with the first and second electrodes.
The photovoltaic device of claim 13, wherein the layer of intrinsic GaAs comprises nonoriented polycrystalline intrinsic GaAs.
The photovoltaic device of claim 13, wherein the layer of intrinsic GaAs comprises oriented polycrystalline intrinsic GaAs.
The photovoltaic device of claim 13, wherein the layer of intrinsic GaAs comprises metallic particles embedded within the layer, the metallic particles comprising one or more noble metals.
The photovoltaic device of claim 13, wherein the layer of intrinsic GaAs is both in direct contact with the layer of amorphous n-type silicon and with the layer of amorphous p-type silicon.
(Cancelled.) canceled
(Cancelled.) canceled
(Cancelled.) canceled
A photovoltaic device comprising: (a) a PIN structure comprising: (i) a layer of amorphous n-type silicon; (ii) a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon; and (iii) a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs, wherein the layer of intrinsic GaAs comprises metallic particles embedded within the layer, the metallic particles comprising one or more noble metals, and further wherein the metallic particles are characterized by a maximum dimension of about 100 nm or greater; (b) a first electrode in electrical contact with the layer of amorphous n-type silicon; 4 Atty. Dkt. No.: 00800-0038-03 (c) a second electrode in electrical contact with the layer of amorphous p-type silicon; and (d) a voltage source in electrical contact with the first and second electrodes.
The photovoltaic device of claim 21, wherein the layer of intrinsic GaAs is both in direct contact with the layer of amorphous n-type silicon and with the layer of amorphous p-type silicon.
Layer stacks claimed or described, ordered top of device to substrate.
PIN structure
photovoltaic device
Materials described outside the worked examples.
intrinsic GaAs
GaAs
amorphous n-type silicon
Si
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 3. These studies show that the deposition parameters can be adjusted to provide control over the bandgap of the iGaAs layers.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 100–500 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,431,928Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 (y axis is counts and the x axis is energy). The spectra confirm the presence of both Ga and As and the absence of organic contaminants in the iGaAs …
FIG. 2. As shown in the figure, the protrusions are characterized by circular cross-sections. The protrusions project away from the 7 Atty. Dkt. No. …
FIG. 3. These studies show that the deposition parameters can be adjusted to provide control over the bandgap of the iGaAs layers.
FIG. 4 shows a plot of the bandgap of eight intrinsic GaAs layers formed under eight different sets of deposition parameters. [0014] FIGs. 5A- B show Raman …
FIG. 5, showing the transverse and longitudinal vibration modes. [0070] Photoluminescence spectra of three different iGaAs layers (B, C, D) formed under the …
FIG. 6 shows a PIN structure having an intrinsic GaAs layer formed according to the methods disclosed herein. [0016]
FIG. 7 shows a schematic of a photovoltaic device. [0017]
FIG. 8 shows a schematic of an apparatus for maintaining the frozen state of a target material for use with pulsed laser assisted chemical vapor deposition …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
(Cancelled.) canceled
The PIN structure of c ~aim4claim 6, wherein the layer of intrinsic GaAs comprises nonoriented polycrystalline intrinsic GaAs.
The PIN structure of Q ~aim4claim 6, wherein the layer of intrinsic GaAs comprises oriented polycrystalline intrinsic GaAs.
(Cancelled.) canceled
(Cancelled.) canceled
A P I N structure comprising: (a) a layer of amorphous n-type silicon; (b) a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon; and (c) a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs, wherein a surface of the layer of intrinsic GaAs comprises a random distribution of protrusions projecting away from the surface of the layer, further wherein the protrusions are characterized by a circular cross-section, and further wherein the protrusions are characterized by an average diameter of about 50 nm or greater and an average height of about 10 nm or greater.
The PIN structure of claim 6, wherein the layer of intrinsic GaAs is both in direct contact with the layer of amorphous n-type silicon and with the layer of amorphous p-type silicon.
(Cancelled.) canceled
The PIN structure of c ~aim4claim 6, wherein the layer of intrinsic GaAs comprises metallic particles embedded within the layer, the metallic particles comprising one or more noble metals.
The PIN structure of claim 8, wherein the noble metals are selected from the group consisting of ruthenium, rhodium, palladium, silver, osmium, iridium, platinum, gold, and combinations thereof.
The PIN structure of claim 8, wherein the average size of the metallic particles is greater than the average size of crystal grains within the layer of intrinsic GaAs.
The PIN structure of claim 8, wherein the areal density of the metallic particles is about 5 x 1 04 c m-2 or greater.
A PIN structure comprising: (a) a layer of amorphous n-type silicon; (b) a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon; and (c) a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs, wherein the layer of intrinsic GaAs comprises metallic particles embedded within the layer, the metallic particles comprising one or more noble metals, and further wherein the metallic particles are characterized by a maximum dimension of about 100 nm or greater.
The PIN structure of claim 11, wherein the layer of intrinsic GaAs is both in direct contact with the layer of amorphous n-type silicon and with the layer of amorphous p- type silicon.
A photovoltaic device comprising: (a) a PIN structure comprising: (i) a layer of amorphous n-type silicon; (ii) a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon; and (iii) a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs, wherein a surface of the la y er of intrinsic GaAs comprises a random distribution of protrusions projecting away from the surface of the la y er, further wherein the protrusions are characterized by a circular cross-section, and further wherein the protrusions are characterized by an average diameter of about 50 nm or greater and an average height of about 10 nm or greater; (b) a first electrode in electrical contact with the layer of amorphous n-type silicon; 3 Atty. Dkt. No.: 00800-0038-03 (c) a second electrode in electrical contact with the layer of amorphous p-type silicon; and (d) a voltage source in electrical contact with the first and second electrodes.
The photovoltaic device of claim 13, wherein the layer of intrinsic GaAs comprises nonoriented polycrystalline intrinsic GaAs.
The photovoltaic device of claim 13, wherein the layer of intrinsic GaAs comprises oriented polycrystalline intrinsic GaAs.
The photovoltaic device of claim 13, wherein the layer of intrinsic GaAs comprises metallic particles embedded within the layer, the metallic particles comprising one or more noble metals.
The photovoltaic device of claim 13, wherein the layer of intrinsic GaAs is both in direct contact with the layer of amorphous n-type silicon and with the layer of amorphous p-type silicon.
(Cancelled.) canceled
(Cancelled.) canceled
(Cancelled.) canceled
A photovoltaic device comprising: (a) a PIN structure comprising: (i) a layer of amorphous n-type silicon; (ii) a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon; and (iii) a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs, wherein the layer of intrinsic GaAs comprises metallic particles embedded within the layer, the metallic particles comprising one or more noble metals, and further wherein the metallic particles are characterized by a maximum dimension of about 100 nm or greater; (b) a first electrode in electrical contact with the layer of amorphous n-type silicon; 4 Atty. Dkt. No.: 00800-0038-03 (c) a second electrode in electrical contact with the layer of amorphous p-type silicon; and (d) a voltage source in electrical contact with the first and second electrodes.
The photovoltaic device of claim 21, wherein the layer of intrinsic GaAs is both in direct contact with the layer of amorphous n-type silicon and with the layer of amorphous p-type silicon.
Layer stacks claimed or described, ordered top of device to substrate.
PIN structure
photovoltaic device
Materials described outside the worked examples.
intrinsic GaAs
GaAs
amorphous n-type silicon
Si
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 3. These studies show that the deposition parameters can be adjusted to provide control over the bandgap of the iGaAs layers.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 100–500 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,431,928Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 (y axis is counts and the x axis is energy). The spectra confirm the presence of both Ga and As and the absence of organic contaminants in the iGaAs …
FIG. 2. As shown in the figure, the protrusions are characterized by circular cross-sections. The protrusions project away from the 7 Atty. Dkt. No. …
FIG. 3. These studies show that the deposition parameters can be adjusted to provide control over the bandgap of the iGaAs layers.
FIG. 4 shows a plot of the bandgap of eight intrinsic GaAs layers formed under eight different sets of deposition parameters. [0014] FIGs. 5A- B show Raman …
FIG. 5, showing the transverse and longitudinal vibration modes. [0070] Photoluminescence spectra of three different iGaAs layers (B, C, D) formed under the …
FIG. 6 shows a PIN structure having an intrinsic GaAs layer formed according to the methods disclosed herein. [0016]
FIG. 7 shows a schematic of a photovoltaic device. [0017]
FIG. 8 shows a schematic of an apparatus for maintaining the frozen state of a target material for use with pulsed laser assisted chemical vapor deposition …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
(Cancelled.) canceled
The PIN structure of c ~aim4claim 6, wherein the layer of intrinsic GaAs comprises nonoriented polycrystalline intrinsic GaAs.
The PIN structure of Q ~aim4claim 6, wherein the layer of intrinsic GaAs comprises oriented polycrystalline intrinsic GaAs.
(Cancelled.) canceled
(Cancelled.) canceled
A P I N structure comprising: (a) a layer of amorphous n-type silicon; (b) a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon; and (c) a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs, wherein a surface of the layer of intrinsic GaAs comprises a random distribution of protrusions projecting away from the surface of the layer, further wherein the protrusions are characterized by a circular cross-section, and further wherein the protrusions are characterized by an average diameter of about 50 nm or greater and an average height of about 10 nm or greater.
The PIN structure of claim 6, wherein the layer of intrinsic GaAs is both in direct contact with the layer of amorphous n-type silicon and with the layer of amorphous p-type silicon.
(Cancelled.) canceled
The PIN structure of c ~aim4claim 6, wherein the layer of intrinsic GaAs comprises metallic particles embedded within the layer, the metallic particles comprising one or more noble metals.
The PIN structure of claim 8, wherein the noble metals are selected from the group consisting of ruthenium, rhodium, palladium, silver, osmium, iridium, platinum, gold, and combinations thereof.
The PIN structure of claim 8, wherein the average size of the metallic particles is greater than the average size of crystal grains within the layer of intrinsic GaAs.
The PIN structure of claim 8, wherein the areal density of the metallic particles is about 5 x 1 04 c m-2 or greater.
A PIN structure comprising: (a) a layer of amorphous n-type silicon; (b) a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon; and (c) a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs, wherein the layer of intrinsic GaAs comprises metallic particles embedded within the layer, the metallic particles comprising one or more noble metals, and further wherein the metallic particles are characterized by a maximum dimension of about 100 nm or greater.
The PIN structure of claim 11, wherein the layer of intrinsic GaAs is both in direct contact with the layer of amorphous n-type silicon and with the layer of amorphous p- type silicon.
A photovoltaic device comprising: (a) a PIN structure comprising: (i) a layer of amorphous n-type silicon; (ii) a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon; and (iii) a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs, wherein a surface of the la y er of intrinsic GaAs comprises a random distribution of protrusions projecting away from the surface of the la y er, further wherein the protrusions are characterized by a circular cross-section, and further wherein the protrusions are characterized by an average diameter of about 50 nm or greater and an average height of about 10 nm or greater; (b) a first electrode in electrical contact with the layer of amorphous n-type silicon; 3 Atty. Dkt. No.: 00800-0038-03 (c) a second electrode in electrical contact with the layer of amorphous p-type silicon; and (d) a voltage source in electrical contact with the first and second electrodes.
The photovoltaic device of claim 13, wherein the layer of intrinsic GaAs comprises nonoriented polycrystalline intrinsic GaAs.
The photovoltaic device of claim 13, wherein the layer of intrinsic GaAs comprises oriented polycrystalline intrinsic GaAs.
The photovoltaic device of claim 13, wherein the layer of intrinsic GaAs comprises metallic particles embedded within the layer, the metallic particles comprising one or more noble metals.
The photovoltaic device of claim 13, wherein the layer of intrinsic GaAs is both in direct contact with the layer of amorphous n-type silicon and with the layer of amorphous p-type silicon.
(Cancelled.) canceled
(Cancelled.) canceled
(Cancelled.) canceled
A photovoltaic device comprising: (a) a PIN structure comprising: (i) a layer of amorphous n-type silicon; (ii) a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon; and (iii) a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs, wherein the layer of intrinsic GaAs comprises metallic particles embedded within the layer, the metallic particles comprising one or more noble metals, and further wherein the metallic particles are characterized by a maximum dimension of about 100 nm or greater; (b) a first electrode in electrical contact with the layer of amorphous n-type silicon; 4 Atty. Dkt. No.: 00800-0038-03 (c) a second electrode in electrical contact with the layer of amorphous p-type silicon; and (d) a voltage source in electrical contact with the first and second electrodes.
The photovoltaic device of claim 21, wherein the layer of intrinsic GaAs is both in direct contact with the layer of amorphous n-type silicon and with the layer of amorphous p-type silicon.
Layer stacks claimed or described, ordered top of device to substrate.
PIN structure
photovoltaic device
Materials described outside the worked examples.
intrinsic GaAs
GaAs
amorphous n-type silicon
Si
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 3. These studies show that the deposition parameters can be adjusted to provide control over the bandgap of the iGaAs layers.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 100–500 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
noble metal particles
noble metals (Ru, Rh, Pd, Ag, Os, Ir, Pt, Au)
FIG. 4 shows a plot of the bandgap of eight intrinsic GaAs layers formed under eight different sets of deposition parameters. [0014] FIGs. 5A- B show Raman …
FIG. 4 shows a plot of the bandgap of eight intrinsic GaAs layers formed under eight different sets of deposition parameters. [0014] FIGs. 5A- B show Raman …
FIG. 5, showing the transverse and longitudinal vibration modes. [0070] Photoluminescence spectra of three different iGaAs layers (B, C, D) formed under the …
| — |
Thickness | 50–250 nm | — |
Thickness | 50–100 nm | — |
Thickness | 10–500 nm | — |
Thickness | 10–250 nm | — |
Thickness | 10–100 nm | — |
Thickness | 10–50 nm | — |
Thickness | 250–500 nm | — |
— | 1.45–2.4 eV | — |
Temperature | 1–10 °C | — |
Temperature | 5–10 °C | — |
noble metal particles
noble metals (Ru, Rh, Pd, Ag, Os, Ir, Pt, Au)
FIG. 4 shows a plot of the bandgap of eight intrinsic GaAs layers formed under eight different sets of deposition parameters. [0014] FIGs. 5A- B show Raman …
FIG. 4 shows a plot of the bandgap of eight intrinsic GaAs layers formed under eight different sets of deposition parameters. [0014] FIGs. 5A- B show Raman …
FIG. 5, showing the transverse and longitudinal vibration modes. [0070] Photoluminescence spectra of three different iGaAs layers (B, C, D) formed under the …
| — |
Thickness | 50–250 nm | — |
Thickness | 50–100 nm | — |
Thickness | 10–500 nm | — |
Thickness | 10–250 nm | — |
Thickness | 10–100 nm | — |
Thickness | 10–50 nm | — |
Thickness | 250–500 nm | — |
— | 1.45–2.4 eV | — |
Temperature | 1–10 °C | — |
Temperature | 5–10 °C | — |
noble metal particles
noble metals (Ru, Rh, Pd, Ag, Os, Ir, Pt, Au)
FIG. 4 shows a plot of the bandgap of eight intrinsic GaAs layers formed under eight different sets of deposition parameters. [0014] FIGs. 5A- B show Raman …
FIG. 4 shows a plot of the bandgap of eight intrinsic GaAs layers formed under eight different sets of deposition parameters. [0014] FIGs. 5A- B show Raman …
FIG. 5, showing the transverse and longitudinal vibration modes. [0070] Photoluminescence spectra of three different iGaAs layers (B, C, D) formed under the …
| — |
Thickness | 50–250 nm | — |
Thickness | 50–100 nm | — |
Thickness | 10–500 nm | — |
Thickness | 10–250 nm | — |
Thickness | 10–100 nm | — |
Thickness | 10–50 nm | — |
Thickness | 250–500 nm | — |
— | 1.45–2.4 eV | — |
Temperature | 1–10 °C | — |
Temperature | 5–10 °C | — |
noble metal particles
noble metals (Ru, Rh, Pd, Ag, Os, Ir, Pt, Au)
FIG. 4 shows a plot of the bandgap of eight intrinsic GaAs layers formed under eight different sets of deposition parameters. [0014] FIGs. 5A- B show Raman …
FIG. 4 shows a plot of the bandgap of eight intrinsic GaAs layers formed under eight different sets of deposition parameters. [0014] FIGs. 5A- B show Raman …
FIG. 5, showing the transverse and longitudinal vibration modes. [0070] Photoluminescence spectra of three different iGaAs layers (B, C, D) formed under the …
| — |
Thickness | 50–250 nm | — |
Thickness | 50–100 nm | — |
Thickness | 10–500 nm | — |
Thickness | 10–250 nm | — |
Thickness | 10–100 nm | — |
Thickness | 10–50 nm | — |
Thickness | 250–500 nm | — |
— | 1.45–2.4 eV | — |
Temperature | 1–10 °C | — |
Temperature | 5–10 °C | — |