SEMICONDUCTOR WAFER COMPRISING GALLIUM NITRIDE LAYER HAVING ONE OR MORE SILICON NITRIDE INTERLAYER THEREIN

Colin Humphreys

Patent

Atlas literature

Patent

US 9,142,723

SEMICONDUCTOR WAFER COMPRISING GALLIUM NITRIDE LAYER HAVING ONE OR MORE SILICON NITRIDE INTERLAYER THEREIN

Colin Humphreys

Claims

Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.

12 independent · 11 dependent

1
IndependentSiGaNAlxGa₁-xNAlNSiNxsemiconductor wafer (GaN-on-Si)
A semiconductor wafer havin q a diameter of at least 6 inches, comprising: a substrate layer consistin q of silicon and unavoidable impurities; a nd a ﬁrst GaN layer having one or more SiN X interlayers therein; an AIGaN layer between the substrate layer and the ﬁrst GaN layer; and an AIN layer between the substrate layer and the A IGa N layer; wherein the AIGaN layer is com p ositionally q raded so that the amount of aluminum decreases across the thickness of the layer away from the silicon substrate layer; and wherein in the ﬁrst GaN layer at least one SiN X interlayer has GaN penetrated through one or more portions of said SiN X interlayer and p referabl y has a thickness of from 0.5 to 10 nm. currently amended
2
Independent
canceled
3
Independent
canceled
4
Independent
canceled
5
IndependentAlxGa₁-xNsemiconductor wafer (GaN-on-Si)
The semiconductor wafer according to claim 12, comprising two or more AIGaN layers between the substrate layer and the ﬁrst GaN layer, wherein each layer has the formula A IxGa1.x N and the value of x in each layer is from 0.01 to 0.9.
6
IndependentGaNsemiconductor wafer (GaN-on-Si)
The semiconductor wafer according to claim 12, wherein the ﬁrst GaN layer is not intentionally doped. 2 BOUL 3562 PATENT
7
IndependentGaNSiNxsemiconductor wafer (GaN-on-Si)
A semiconductor wafer according to claim 12, wherein the ﬁrst GaN layer has two or more SiN X interlayers therein.
8
IndependentGaNSiNxsemiconductor wafer (GaN-on-Si)
A semiconductor wafer according to claim 12, wherein GaN penetrates through one or more portions of at least one SiN X interlayer to form discrete crystalline structures within the GaN enclosing the SiN X interlayer.
9
IndependentGaNSiNxsemiconductor wafer (GaN-on-Si)
A semiconductor wafer according to claim 12, wherein the GaN penetrates through a plurality of portions of said SiN X interlayer across said interlayer. currently amended
10
Independent
canceled
11
IndependentGaNGaNsemiconductor wafer (GaN-on-Si)
The semiconductor wafer according to claim 12, further comprising a second GaN layer on the ﬁrst GaN layer, wherein the second GaN layer is intentionally doped.
1. 12
  Dependent← claim 11GaNsemiconductor wafer (GaN-on-Si)
  The semiconductor wafer according to claim 11, wherein the second GaN layer is n-doped, preferably with silicon or germanium.
2. 13
  Dependent← claim 11GaNsemiconductor wafer (GaN-on-Si)
  The semiconductor wafer according to claim 11 wherein the second GaN layer is a compositionally graded Si- or Ge-doped GaN layer formed on the ﬁrst GaN layer so that the amount of Si or Ge respectively increases across the thickness of the layer away from the GaN layer.
3. 14
  Dependent← claim 11p-doped semiconductor layersemiconductor wafer (GaN-on-Si)
  The semiconductor wafer according to claim 11, further comprising a p-doped semiconductor layer formed on the second GaN layer.
18
Independent
canceled

Device structures

Layer stacks claimed or described, ordered top of device to substrate.

semiconductor wafer (GaN-on-Si)

p-doped semiconductor layerp-doped semiconductor

multiple quantum wells (MQWs)MQW active layer

GaNn-doped GaN

SiNxSiNx interlayer(s)

GaNbuffer GaN with SiNx interlayers

AlxGa₁-xNtransition layer (graded AlGaN)

Materials

Materials described outside the worked examples.

silicon substrate

Substrate

GaN (first GaN layer)

GaN

Buffer/Template Layer

Process steps

Additional fabrication and treatment steps described in the patent.

Movpe Growth

Step 1

Temperature

900, 1050°C

Process details

notes:Layers sequentially deposited in a single MOVPE chamber; GaN deposited to penetrate through SiNx interlayer portions

method:

Reported properties

Performance values and ranges asserted in the specification or claims.

Property	Value	Material
Thickness	0.5–10 nm	—
Thickness

Why these are connected

Related documents with shared materials, methods, properties, or citations.

SEMICONDUCTOR WAFER COMPRISING GALLIUM NITRIDE LAYER HAVING ONE OR MORE SILICON NITRIDE INTERLAYER THEREIN | Matter42 Literature