Patent
US 9,059,188TAMPER RESISTANT IDENTIFIER WITH CONTACTLESS READING
Christos Dimitrakopoulos
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 9,059,188Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 shows an exemplary graphene resistor parallel configured array 110 forming an on- chip identifier with off-chip reading, in accordance with an embodiment …
FIG. 2 shows an exemplary graphene resistor series configured array 210 forming an on- chip identifier with off-chip reading, in accordance with an embodiment of …
FIG. 3 shows an exemplary graphene resistor series configured array 3 10 forming an on-chip identifier with on-chip reading, in accordance with an embodiment of …
FIG. 4 shows a top view 401 and a cross-section 402 of a chip having a graphene resistor series configured array 410 forming an on-chip identifier with off-chip …
FIG. 5 shows an exemplary configuration 500 for a manufacturing test, in accordance with an embodiment of the present principles; [0014]
FIG. 6 shows an exemplary configuration 600 for chip identification in the field, in accordance with an embodiment of the present principles; [0015]
FIG. 7 shows an exemplary graphene resistor parallel configured array 710 that is applied to an object that needs an identifier, in accordance with an embodiment …
FIG. 8 shows an exemplary graphene resistor series configured array 810 that is applied to an object that needs an identifier, in accordance with an embodiment …
FIG. 9 shows a top view 901 and a cross-section 902 of a chip having a graphene resistor parallel configured array 910 forming an on-chip identifier with off- …
FIG. 10 shows an exemplary configuration 1000 for a manufacturing test, in accordance with an embodiment of the present principles; [0019]
FIG. 11 shows an exemplary configuration 1 100 for identification in the field, in accordance with an embodiment of the present principles; YO R₉₂₀₁₃₀₈₆₇US 1 …
FIG. 12 shows an exemplary graphene resistor parallel configured array configuration 1200, in accordance with an embodiment of the present principles; [0021]
FIG. 13 shows another exemplary graphene resistor parallel configured array configuration 1300, in accordance with an embodiment of the present principles; [0022]
FIG. 14 shows yet another exemplary graphene resistor parallel configured array configuration 1400, in accordance with an embodiment of the present principles; …
FIG. 15 shows yet another exemplary graphene resistor series configured array configuration 1500, in accordance with an embodiment of the present principles; …
FIG. 16 shows a medication identification application using a graphene resistor identifier 1600, in accordance with an embodiment of the present principles; …
FIG. 17 shows a ticket or bill identification application using a graphene resistor identifier 1700, in accordance with an embodiment of the present principles; …
FIG. 18 shows a method 1800 for forming a unique identifier code using a plurality of graphene resistors, in accordance with an embodiment of the present …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
7 [0077] WHAT IS CLAIMED IS:
The method of claim 7, further comprising embedding the plurality of graphene resistors and the bandgap voltage generation circuit or the bandgap current generation circuit into a chip.
The method of claim 7, wherein the method further comprises: multiplexing a plurality of voltages output from the plurality of graphene resistors when the plurality of graphene resistors are in the powered state to provide a single output voltage; and converting the single output voltage to a digital value readable as the unique identification code.
The method of claim 1, wherein each of the plurality of graphene resistors has a temperature independent resistor value and the method further comprises configuring the plurality of graphene resistors as a physical unclonable function. YO R₉₂₀₁₃₀₈₆₇US 1 (163-771) Page 26 of
The method of claim 1, wherein the unique identification code is encoded using respective color values of the plurality of graphene resistors.
The method of claim 11, further comprising placing another coil proximate to and at a different height than the coil, the other coil connected to a bandgap voltage generation circuit to inductively power up the plurality of graphene resistors to read the unique identification code there from.
The method of claim 1, wherein the unique identification code is encoded using respective differences between color values of the plurality of graphene resistors.
The method of claim 1, wherein the unique identification code is encoded using respective source power levels at which respective color changes occur in the plurality of graphene resistors.
The method of claim 1, further comprising coupling a coil to the plurality of graphene resistors for alternating current inductive reading of the unique identification code.
The method of claim 1, further comprising: sweeping an output of the bandgap voltage generation circuit or a bandgap current generation circuit with a ramp signal to reveal a time varying image; and YO R₉₂₀₁₃₀₈₆₇US 1 (163-771) Page 27 of 30 comparing the time vary in g image, as the unique identification code, to a plurality of images stored in an authentication database to authenticate the unique identification code.
An authentication apparatus, comprising: a plurality of graphene resistors, arranged in parallel or series, forming a unique identification code based on respective temperatures emanating from or respective voltages output from the plurality of graphene resistors when the plurality of graphene resistors are in a powered state; and a bandgap voltage generation circuit or a bandgap current generation circuit connected to the plurality of graphene resistors for powering up the plurality of graphene resistors in the powered state.
The authentication apparatus of claim 17, wherein the plurality of graphene resistors and the bandgap voltage generation circuit or the bandgap current generation circuit are embedded into a chip.
The authentication apparatus of claim 17, further comprising a transparent protective layer for covering the plurality of graphene resistors.
The authentication apparatus of claim 17, further comprising: a multiplexer for multiplexing together the respective output voltages to provide a single output voltage; YO R₉₂₀₁₃₀₈₆₇US 1 (163-771) Page 28 of 30 an analog-to-digital converter for converting the single output voltage to a digital value that is contact l essly readable as the unique identification code. YO R₉₂₀₁₃₀₈₆₇US 1 (163-771) Page 29 of
Layer stacks claimed or described, ordered top of device to substrate.
authentication apparatus with graphene resistor array
Materials described outside the worked examples.
graphene
thermochromic film
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
graphene resistor value temperature independence | — | graphene |
Patent
Atlas literature
Patent
US 9,059,188Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 shows an exemplary graphene resistor parallel configured array 110 forming an on- chip identifier with off-chip reading, in accordance with an embodiment …
FIG. 2 shows an exemplary graphene resistor series configured array 210 forming an on- chip identifier with off-chip reading, in accordance with an embodiment of …
FIG. 3 shows an exemplary graphene resistor series configured array 3 10 forming an on-chip identifier with on-chip reading, in accordance with an embodiment of …
FIG. 4 shows a top view 401 and a cross-section 402 of a chip having a graphene resistor series configured array 410 forming an on-chip identifier with off-chip …
FIG. 5 shows an exemplary configuration 500 for a manufacturing test, in accordance with an embodiment of the present principles; [0014]
FIG. 6 shows an exemplary configuration 600 for chip identification in the field, in accordance with an embodiment of the present principles; [0015]
FIG. 7 shows an exemplary graphene resistor parallel configured array 710 that is applied to an object that needs an identifier, in accordance with an embodiment …
FIG. 8 shows an exemplary graphene resistor series configured array 810 that is applied to an object that needs an identifier, in accordance with an embodiment …
FIG. 9 shows a top view 901 and a cross-section 902 of a chip having a graphene resistor parallel configured array 910 forming an on-chip identifier with off- …
FIG. 10 shows an exemplary configuration 1000 for a manufacturing test, in accordance with an embodiment of the present principles; [0019]
FIG. 11 shows an exemplary configuration 1 100 for identification in the field, in accordance with an embodiment of the present principles; YO R₉₂₀₁₃₀₈₆₇US 1 …
FIG. 12 shows an exemplary graphene resistor parallel configured array configuration 1200, in accordance with an embodiment of the present principles; [0021]
FIG. 13 shows another exemplary graphene resistor parallel configured array configuration 1300, in accordance with an embodiment of the present principles; [0022]
FIG. 14 shows yet another exemplary graphene resistor parallel configured array configuration 1400, in accordance with an embodiment of the present principles; …
FIG. 15 shows yet another exemplary graphene resistor series configured array configuration 1500, in accordance with an embodiment of the present principles; …
FIG. 16 shows a medication identification application using a graphene resistor identifier 1600, in accordance with an embodiment of the present principles; …
FIG. 17 shows a ticket or bill identification application using a graphene resistor identifier 1700, in accordance with an embodiment of the present principles; …
FIG. 18 shows a method 1800 for forming a unique identifier code using a plurality of graphene resistors, in accordance with an embodiment of the present …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
7 [0077] WHAT IS CLAIMED IS:
The method of claim 7, further comprising embedding the plurality of graphene resistors and the bandgap voltage generation circuit or the bandgap current generation circuit into a chip.
The method of claim 7, wherein the method further comprises: multiplexing a plurality of voltages output from the plurality of graphene resistors when the plurality of graphene resistors are in the powered state to provide a single output voltage; and converting the single output voltage to a digital value readable as the unique identification code.
The method of claim 1, wherein each of the plurality of graphene resistors has a temperature independent resistor value and the method further comprises configuring the plurality of graphene resistors as a physical unclonable function. YO R₉₂₀₁₃₀₈₆₇US 1 (163-771) Page 26 of
The method of claim 1, wherein the unique identification code is encoded using respective color values of the plurality of graphene resistors.
The method of claim 11, further comprising placing another coil proximate to and at a different height than the coil, the other coil connected to a bandgap voltage generation circuit to inductively power up the plurality of graphene resistors to read the unique identification code there from.
The method of claim 1, wherein the unique identification code is encoded using respective differences between color values of the plurality of graphene resistors.
The method of claim 1, wherein the unique identification code is encoded using respective source power levels at which respective color changes occur in the plurality of graphene resistors.
The method of claim 1, further comprising coupling a coil to the plurality of graphene resistors for alternating current inductive reading of the unique identification code.
The method of claim 1, further comprising: sweeping an output of the bandgap voltage generation circuit or a bandgap current generation circuit with a ramp signal to reveal a time varying image; and YO R₉₂₀₁₃₀₈₆₇US 1 (163-771) Page 27 of 30 comparing the time vary in g image, as the unique identification code, to a plurality of images stored in an authentication database to authenticate the unique identification code.
An authentication apparatus, comprising: a plurality of graphene resistors, arranged in parallel or series, forming a unique identification code based on respective temperatures emanating from or respective voltages output from the plurality of graphene resistors when the plurality of graphene resistors are in a powered state; and a bandgap voltage generation circuit or a bandgap current generation circuit connected to the plurality of graphene resistors for powering up the plurality of graphene resistors in the powered state.
The authentication apparatus of claim 17, wherein the plurality of graphene resistors and the bandgap voltage generation circuit or the bandgap current generation circuit are embedded into a chip.
The authentication apparatus of claim 17, further comprising a transparent protective layer for covering the plurality of graphene resistors.
The authentication apparatus of claim 17, further comprising: a multiplexer for multiplexing together the respective output voltages to provide a single output voltage; YO R₉₂₀₁₃₀₈₆₇US 1 (163-771) Page 28 of 30 an analog-to-digital converter for converting the single output voltage to a digital value that is contact l essly readable as the unique identification code. YO R₉₂₀₁₃₀₈₆₇US 1 (163-771) Page 29 of
Layer stacks claimed or described, ordered top of device to substrate.
authentication apparatus with graphene resistor array
Materials described outside the worked examples.
graphene
thermochromic film
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
graphene resistor value temperature independence | — | graphene |
Patent
Atlas literature
Patent
US 9,059,188Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 shows an exemplary graphene resistor parallel configured array 110 forming an on- chip identifier with off-chip reading, in accordance with an embodiment …
FIG. 2 shows an exemplary graphene resistor series configured array 210 forming an on- chip identifier with off-chip reading, in accordance with an embodiment of …
FIG. 3 shows an exemplary graphene resistor series configured array 3 10 forming an on-chip identifier with on-chip reading, in accordance with an embodiment of …
FIG. 4 shows a top view 401 and a cross-section 402 of a chip having a graphene resistor series configured array 410 forming an on-chip identifier with off-chip …
FIG. 5 shows an exemplary configuration 500 for a manufacturing test, in accordance with an embodiment of the present principles; [0014]
FIG. 6 shows an exemplary configuration 600 for chip identification in the field, in accordance with an embodiment of the present principles; [0015]
FIG. 7 shows an exemplary graphene resistor parallel configured array 710 that is applied to an object that needs an identifier, in accordance with an embodiment …
FIG. 8 shows an exemplary graphene resistor series configured array 810 that is applied to an object that needs an identifier, in accordance with an embodiment …
FIG. 9 shows a top view 901 and a cross-section 902 of a chip having a graphene resistor parallel configured array 910 forming an on-chip identifier with off- …
FIG. 10 shows an exemplary configuration 1000 for a manufacturing test, in accordance with an embodiment of the present principles; [0019]
FIG. 11 shows an exemplary configuration 1 100 for identification in the field, in accordance with an embodiment of the present principles; YO R₉₂₀₁₃₀₈₆₇US 1 …
FIG. 12 shows an exemplary graphene resistor parallel configured array configuration 1200, in accordance with an embodiment of the present principles; [0021]
FIG. 13 shows another exemplary graphene resistor parallel configured array configuration 1300, in accordance with an embodiment of the present principles; [0022]
FIG. 14 shows yet another exemplary graphene resistor parallel configured array configuration 1400, in accordance with an embodiment of the present principles; …
FIG. 15 shows yet another exemplary graphene resistor series configured array configuration 1500, in accordance with an embodiment of the present principles; …
FIG. 16 shows a medication identification application using a graphene resistor identifier 1600, in accordance with an embodiment of the present principles; …
FIG. 17 shows a ticket or bill identification application using a graphene resistor identifier 1700, in accordance with an embodiment of the present principles; …
FIG. 18 shows a method 1800 for forming a unique identifier code using a plurality of graphene resistors, in accordance with an embodiment of the present …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
7 [0077] WHAT IS CLAIMED IS:
The method of claim 7, further comprising embedding the plurality of graphene resistors and the bandgap voltage generation circuit or the bandgap current generation circuit into a chip.
The method of claim 7, wherein the method further comprises: multiplexing a plurality of voltages output from the plurality of graphene resistors when the plurality of graphene resistors are in the powered state to provide a single output voltage; and converting the single output voltage to a digital value readable as the unique identification code.
The method of claim 1, wherein each of the plurality of graphene resistors has a temperature independent resistor value and the method further comprises configuring the plurality of graphene resistors as a physical unclonable function. YO R₉₂₀₁₃₀₈₆₇US 1 (163-771) Page 26 of
The method of claim 1, wherein the unique identification code is encoded using respective color values of the plurality of graphene resistors.
The method of claim 11, further comprising placing another coil proximate to and at a different height than the coil, the other coil connected to a bandgap voltage generation circuit to inductively power up the plurality of graphene resistors to read the unique identification code there from.
The method of claim 1, wherein the unique identification code is encoded using respective differences between color values of the plurality of graphene resistors.
The method of claim 1, wherein the unique identification code is encoded using respective source power levels at which respective color changes occur in the plurality of graphene resistors.
The method of claim 1, further comprising coupling a coil to the plurality of graphene resistors for alternating current inductive reading of the unique identification code.
The method of claim 1, further comprising: sweeping an output of the bandgap voltage generation circuit or a bandgap current generation circuit with a ramp signal to reveal a time varying image; and YO R₉₂₀₁₃₀₈₆₇US 1 (163-771) Page 27 of 30 comparing the time vary in g image, as the unique identification code, to a plurality of images stored in an authentication database to authenticate the unique identification code.
An authentication apparatus, comprising: a plurality of graphene resistors, arranged in parallel or series, forming a unique identification code based on respective temperatures emanating from or respective voltages output from the plurality of graphene resistors when the plurality of graphene resistors are in a powered state; and a bandgap voltage generation circuit or a bandgap current generation circuit connected to the plurality of graphene resistors for powering up the plurality of graphene resistors in the powered state.
The authentication apparatus of claim 17, wherein the plurality of graphene resistors and the bandgap voltage generation circuit or the bandgap current generation circuit are embedded into a chip.
The authentication apparatus of claim 17, further comprising a transparent protective layer for covering the plurality of graphene resistors.
The authentication apparatus of claim 17, further comprising: a multiplexer for multiplexing together the respective output voltages to provide a single output voltage; YO R₉₂₀₁₃₀₈₆₇US 1 (163-771) Page 28 of 30 an analog-to-digital converter for converting the single output voltage to a digital value that is contact l essly readable as the unique identification code. YO R₉₂₀₁₃₀₈₆₇US 1 (163-771) Page 29 of
Layer stacks claimed or described, ordered top of device to substrate.
authentication apparatus with graphene resistor array
Materials described outside the worked examples.
graphene
thermochromic film
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
graphene resistor value temperature independence | — | graphene |
Patent
Atlas literature
Patent
US 9,059,188Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 shows an exemplary graphene resistor parallel configured array 110 forming an on- chip identifier with off-chip reading, in accordance with an embodiment …
FIG. 2 shows an exemplary graphene resistor series configured array 210 forming an on- chip identifier with off-chip reading, in accordance with an embodiment of …
FIG. 3 shows an exemplary graphene resistor series configured array 3 10 forming an on-chip identifier with on-chip reading, in accordance with an embodiment of …
FIG. 4 shows a top view 401 and a cross-section 402 of a chip having a graphene resistor series configured array 410 forming an on-chip identifier with off-chip …
FIG. 5 shows an exemplary configuration 500 for a manufacturing test, in accordance with an embodiment of the present principles; [0014]
FIG. 6 shows an exemplary configuration 600 for chip identification in the field, in accordance with an embodiment of the present principles; [0015]
FIG. 7 shows an exemplary graphene resistor parallel configured array 710 that is applied to an object that needs an identifier, in accordance with an embodiment …
FIG. 8 shows an exemplary graphene resistor series configured array 810 that is applied to an object that needs an identifier, in accordance with an embodiment …
FIG. 9 shows a top view 901 and a cross-section 902 of a chip having a graphene resistor parallel configured array 910 forming an on-chip identifier with off- …
FIG. 10 shows an exemplary configuration 1000 for a manufacturing test, in accordance with an embodiment of the present principles; [0019]
FIG. 11 shows an exemplary configuration 1 100 for identification in the field, in accordance with an embodiment of the present principles; YO R₉₂₀₁₃₀₈₆₇US 1 …
FIG. 12 shows an exemplary graphene resistor parallel configured array configuration 1200, in accordance with an embodiment of the present principles; [0021]
FIG. 13 shows another exemplary graphene resistor parallel configured array configuration 1300, in accordance with an embodiment of the present principles; [0022]
FIG. 14 shows yet another exemplary graphene resistor parallel configured array configuration 1400, in accordance with an embodiment of the present principles; …
FIG. 15 shows yet another exemplary graphene resistor series configured array configuration 1500, in accordance with an embodiment of the present principles; …
FIG. 16 shows a medication identification application using a graphene resistor identifier 1600, in accordance with an embodiment of the present principles; …
FIG. 17 shows a ticket or bill identification application using a graphene resistor identifier 1700, in accordance with an embodiment of the present principles; …
FIG. 18 shows a method 1800 for forming a unique identifier code using a plurality of graphene resistors, in accordance with an embodiment of the present …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
7 [0077] WHAT IS CLAIMED IS:
The method of claim 7, further comprising embedding the plurality of graphene resistors and the bandgap voltage generation circuit or the bandgap current generation circuit into a chip.
The method of claim 7, wherein the method further comprises: multiplexing a plurality of voltages output from the plurality of graphene resistors when the plurality of graphene resistors are in the powered state to provide a single output voltage; and converting the single output voltage to a digital value readable as the unique identification code.
The method of claim 1, wherein each of the plurality of graphene resistors has a temperature independent resistor value and the method further comprises configuring the plurality of graphene resistors as a physical unclonable function. YO R₉₂₀₁₃₀₈₆₇US 1 (163-771) Page 26 of
The method of claim 1, wherein the unique identification code is encoded using respective color values of the plurality of graphene resistors.
The method of claim 11, further comprising placing another coil proximate to and at a different height than the coil, the other coil connected to a bandgap voltage generation circuit to inductively power up the plurality of graphene resistors to read the unique identification code there from.
The method of claim 1, wherein the unique identification code is encoded using respective differences between color values of the plurality of graphene resistors.
The method of claim 1, wherein the unique identification code is encoded using respective source power levels at which respective color changes occur in the plurality of graphene resistors.
The method of claim 1, further comprising coupling a coil to the plurality of graphene resistors for alternating current inductive reading of the unique identification code.
The method of claim 1, further comprising: sweeping an output of the bandgap voltage generation circuit or a bandgap current generation circuit with a ramp signal to reveal a time varying image; and YO R₉₂₀₁₃₀₈₆₇US 1 (163-771) Page 27 of 30 comparing the time vary in g image, as the unique identification code, to a plurality of images stored in an authentication database to authenticate the unique identification code.
An authentication apparatus, comprising: a plurality of graphene resistors, arranged in parallel or series, forming a unique identification code based on respective temperatures emanating from or respective voltages output from the plurality of graphene resistors when the plurality of graphene resistors are in a powered state; and a bandgap voltage generation circuit or a bandgap current generation circuit connected to the plurality of graphene resistors for powering up the plurality of graphene resistors in the powered state.
The authentication apparatus of claim 17, wherein the plurality of graphene resistors and the bandgap voltage generation circuit or the bandgap current generation circuit are embedded into a chip.
The authentication apparatus of claim 17, further comprising a transparent protective layer for covering the plurality of graphene resistors.
The authentication apparatus of claim 17, further comprising: a multiplexer for multiplexing together the respective output voltages to provide a single output voltage; YO R₉₂₀₁₃₀₈₆₇US 1 (163-771) Page 28 of 30 an analog-to-digital converter for converting the single output voltage to a digital value that is contact l essly readable as the unique identification code. YO R₉₂₀₁₃₀₈₆₇US 1 (163-771) Page 29 of
Layer stacks claimed or described, ordered top of device to substrate.
authentication apparatus with graphene resistor array
Materials described outside the worked examples.
graphene
thermochromic film
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
graphene resistor value temperature independence | — | graphene |
Leuco dye
Leuco dye
Leuco dye
Leuco dye