Abstract

Metals are commonly used as electrostatic gates in devices due to their abundant charge carrier densities that are necessary for efficient charging and discharging. A semiconducting gate can be beneficial for certain fabrication processes, in low light conditions, and for specific gating properties. We determine the effectiveness and limitations of a semiconducting gate in graphene and bilayer graphene devices. Using the semiconducting transition metal dichalcogenides molybdenum disulfide (MoS₂), molybdenum diselenide (MoSe₂), tungsten disulfide (WS₂), and tungsten diselenide (WSe₂), we show that two-dimensional semiconductors can be used to suitably gate the graphene devices under appropriate operating conditions. For single-gated devices, semiconducting gates are comparable to metallic gates below liquid helium temperatures but include resistivity features resulting from gate voltage clamping of the semiconductor. In dual-gated devices, we pin down the parameter range of effective operation and find that the semiconducting depletion regime results in clamping and hysteresis from defect-state charge trapping.

Abstract

Metals are commonly used as electrostatic gates in devices due to their abundant charge carrier densities that are necessary for efficient charging and discharging. A semiconducting gate can be beneficial for certain fabrication processes, in low light conditions, and for specific gating properties. We determine the effectiveness and limitations of a semiconducting gate in graphene and bilayer graphene devices. Using the semiconducting transition metal dichalcogenides molybdenum disulfide (MoS₂), molybdenum diselenide (MoSe₂), tungsten disulfide (WS₂), and tungsten diselenide (WSe₂), we show that two-dimensional semiconductors can be used to suitably gate the graphene devices under appropriate operating conditions. For single-gated devices, semiconducting gates are comparable to metallic gates below liquid helium temperatures but include resistivity features resulting from gate voltage clamping of the semiconductor. In dual-gated devices, we pin down the parameter range of effective operation and find that the semiconducting depletion regime results in clamping and hysteresis from defect-state charge trapping.

Abstract

Metals are commonly used as electrostatic gates in devices due to their abundant charge carrier densities that are necessary for efficient charging and discharging. A semiconducting gate can be beneficial for certain fabrication processes, in low light conditions, and for specific gating properties. We determine the effectiveness and limitations of a semiconducting gate in graphene and bilayer graphene devices. Using the semiconducting transition metal dichalcogenides molybdenum disulfide (MoS₂), molybdenum diselenide (MoSe₂), tungsten disulfide (WS₂), and tungsten diselenide (WSe₂), we show that two-dimensional semiconductors can be used to suitably gate the graphene devices under appropriate operating conditions. For single-gated devices, semiconducting gates are comparable to metallic gates below liquid helium temperatures but include resistivity features resulting from gate voltage clamping of the semiconductor. In dual-gated devices, we pin down the parameter range of effective operation and find that the semiconducting depletion regime results in clamping and hysteresis from defect-state charge trapping.

Abstract

Metals are commonly used as electrostatic gates in devices due to their abundant charge carrier densities that are necessary for efficient charging and discharging. A semiconducting gate can be beneficial for certain fabrication processes, in low light conditions, and for specific gating properties. We determine the effectiveness and limitations of a semiconducting gate in graphene and bilayer graphene devices. Using the semiconducting transition metal dichalcogenides molybdenum disulfide (MoS₂), molybdenum diselenide (MoSe₂), tungsten disulfide (WS₂), and tungsten diselenide (WSe₂), we show that two-dimensional semiconductors can be used to suitably gate the graphene devices under appropriate operating conditions. For single-gated devices, semiconducting gates are comparable to metallic gates below liquid helium temperatures but include resistivity features resulting from gate voltage clamping of the semiconductor. In dual-gated devices, we pin down the parameter range of effective operation and find that the semiconducting depletion regime results in clamping and hysteresis from defect-state charge trapping.