EPITAXIAL GALLIUM NITRIDE BASED LIGHT EMITTING DIODE AND METHOD OF MAKING THEREOF

Zhen CHEN

Patent

Atlas literature

Patent

US 11,264,537

EPITAXIAL GALLIUM NITRIDE BASED LIGHT EMITTING DIODE AND METHOD OF MAKING THEREOF

Zhen CHEN

Drawings

Patent drawings and their descriptions. Click a drawing to enlarge it.

FIG. 1

FIG. 1 is a schematic illustration of the step of generation of assemblies of growth substrates with respective devices thereupon from initial growth …

FIG. 2

FIG. 2 is a schematic illustration of the step of bonding of the growth substrates to respective ﬁrst carrier substrates through the respective devices …

FIG. 3

FIG. 3 is a schematic illustration of the step of removing the growth substrates according to an embodiment of the present disclosure. [0011]

FIG. 4

FIG. 4 is a schematic illustration of the step of forming a ﬁrst bonding material layer on the ﬁrst carrier substrates, providing second carrier substrate, and …

FIG. 5

FIG. 5 is a schematic illustration of the step of bonding each pair of a ﬁrst carrier substrate and a second carrier substrate according to an embodiment of …

FIG. 6

FIG. 6 is a schematic illustration of the step in which each ﬁrst carrier substrate is removed from a bonded structure according to an embodiment of the …

FIG. 7

FIG. 7 is a vertical cross-sectional view of a second carrier substrate, an array of ﬁrst light emitting devices thereupon, and an optional optical protection …

FIG. 8

FIG. 8, a backplane substrate 400 is provided. The backplane substrate 400 is a substrate onto which various devices can be subsequently transferred. In one …

FIG. 9

FIG. 9. In this case, the ﬁrst conductive bonding structures 420 can be formed at the ﬁrst subset of the stepped horizontal surfaces, and the second conductive …

FIG. 10

FIG. 10, a protective layer 422 including an optical protection material can be optionally formed on the side of the backplane 401. The protective layer 422 …

FIG. 11

FIGS. 11 and 12 and as explained above for the second through ﬁfth exemplary integrated light emitting device assemblies. In some embodiments, each of the ﬁrst …

FIG. 12

FIG. 12. In some embodiments, the backplane 401 has stepped surfaces having a diﬀerent separation distance from a planar backside surface 409 of the backplane …

FIG. 13

FIGS. 13, 32B, and 33B. [0297] In some embodiment, the backplane 401 is provided with stepped horizontal surfaces at a top side as illustrated in

FIG. 14

FIG. 14, after all ﬁrst portions of the release layer 20 overlying the ﬁrst subset 1 1 B of ﬁrst light emitting devices 10 B are removed, the ﬁrst transfer …

FIG. 15

FIG. 15, an assembly comprising a second transfer substrate 301G and second light emitting devices lO G that emits light of a second wavelength is provided. …

FIG. 16

FIG. 16 is a vertical cross-sectional view of the backplane and the second transfer substrate while detaching a light emitting device among a ﬁrst subset of …

FIG. 17

FIG. 17, after all ﬁrst portions of the release layer 20 overlying the ﬁrst subset of the second light emitting devices lO G are removed, the second transfer …

FIG. 18

FIG. 18 is a vertical cross-sectional view of the backplane and a third transfer substrate while detaching a light emitting device among a ﬁrst subset of third …

FIG. 19

FIG. 19. While transfer of the sensor devices lO S to the backplane 401 is not expressly described for the second through ﬁfth integrated light emitting device …

FIG. 20

FIG. 20. An assembly comprising the additional source substrate (40 1 S or 101 S) and a second subset of the sensor devices 10S can be separated from the …

FIG. 21

FIG. 21, after all ﬁrst portions of the release layer 20 overlying the ﬁrst subset of the sensor devices lOS are removed, the additional transfer substrate 301 …

FIG. 22

FIGS. 22, 23, 24, 25, and 29. [0312] In some embodiment, the ﬁrst conductive bonding structures 432 have a ﬁrst height, and the second conductive bonding …

FIG. 23

FIG. 23, an alternative embodiment of the integrated light emitting device assembly is shown. Conductive interconnect structures 480 can be formed within the …

FIG. 24

FIG. 24, an alternative embodiment of the devices (1O B, lO G, 10 R, lOS) on growth substrates 500 is illustrated. In this case, the devices (lO B, lO G, 10 R, …

FIG. 25

FIG. 25, the same processing sequences described above can be employed to form an integrated light emitting device assembly. A portion of the source substrate …

FIG. 26

FIG. 26, another alternate embodiment of the structure of the present disclosure is shown. In addition to have a stepped backplane 401 having stepped …

FIG. 27

FIG. 27 illustrates an exemplary structure after a dummy substrate 701 having a planar bottom surface is disposed on top surfaces of the ﬁrst light emitting …

FIG. 28

FIG. 28 illustrates a processing step in an alternate embodiment of the present disclosure in which the dummy substrate presses against bonded light emitting …

FIG. 29

FIG. 29 illustrates still another alternate embodiment of the ﬁrst exemplary light emitting device assembly according to an embodiment of the present …

FIG. 30

FIG. 30, an exemplary transfer pattern and an exemplary transfer sequence are illustrated for transferring four diﬀerent types of devices (lO B, lO G, 10 R, …

FIG. 31

FIG. 31D. The additional assembly comprising the additional source substrate (40 1 S or 101 S) and the sensor devices 10S can be disposed over the backplane …

FIG. 32

FIG. 32N. In some embodiments, the ﬁrst bonding pads 421 can have a ﬁrst thickness, and the second bonding pads 422 can have a second thickness that is less …

FIG. 33

FIG. 33A. For example, the volume of the ﬁrst conductive bonding structures 431 can be greater than the volume of the second conductive bonding structures 432, …

FIG. 34

FIG. 34A. In this embodiment, the backplane substrate 400 may have a substantially planar (i.e., not stepped) upper surface or a stepped upper surface as …

FIG. 35

FIG. 35C. As the assembly of the ﬁrst source substrate 301B and attached ﬁrst light emitting diodes lO B (i.e., the complement of the ﬁrst subset of the ﬁrst …

FIG. 36

FIG. 36, an exemplary structure is illustrated, which includes a substrate 802 and a single crystalline n-doped gallium nitride layer 804. In one embodiment, …

FIG. 37

FIG. 37, openings can be formed through the dielectric material layer 970 to a top surface of the reﬂector layer 966. For example, a photoresist layer (not …

FIG. 38

FIG. 38, the substrate 802 can be optionally removed. For example, laser beam can pass through the substrate 802 (including a material such as sapphire) and …

FIG. 39

FIG. 39 illustrates the assembly process in which a red-light emitting device lO R is bonded to a backplane 401, which may be any one of the backplanes …

FIG. 40

FIG. 40A. Subsequently, a front side transparent conductive oxide layer 796 can be formed over the dielectric ﬁll material layer 798 such that the front side …

FIG. 41

FIG. 41. Each ﬁrst light emitting diode 1 O R includes a single crystalline n-doped GaN portion that is a single crystalline n-doped GaN layer having a planar …

FIG. 42

performance graph

FIG. 42. The relationship between the peak wavelength and the external quantum eﬃciency at 1.2 A/cm 2 current density is plotted in the graph. Closed circles …

FIG. 43

FIG. 43, an exemplary device structure for forming nanowire-containing light emitting diodes is illustrated. According to an embodiment of the present …

FIG. 44

FIG. 44, nanowire cores 32 can be grown through the openings 43 in the patterned growth mask 42 by a selective epitaxy process performed in a Group V limited …

FIG. 45

FIG. 45. The growth mode can change to a Group III limited growth mode, which is also referred to as a high V/I II growth mode employed in conventional growth …

FIG. 46

FIG. 46B. The nano-ring region 1232A comprises a structural discontinuity from the p-plane in the upper tip portion of the shell to the m -plane in the lower …

FIG. 47

FIG. 47, a ﬁrst p-doped compound semiconductor material layer 1250 can be formed on the shell stack 34 (e.g., on the shell p-doped aluminum gallium nitride …

FIG. 48

FIG. 48, a second p-doped compound semiconductor material layer 1260 can be formed on the ﬁrst p-doped compound semiconductor material layer 1250. The second …

FIG. 49

FIG. 49 is illustrated. The peak external quantum eﬃciency occurs at low current densities below 1 A/cm 2, which makes the nanowire based LED suitable for …

FIG. 50

performance graph

FIG. 50 is graph showing external quantum eﬃciency of sample light emitting devices employing the ﬁrst exemplary planar material layer stack of

FIG. 51

performance graph

FIG. 51 is a graph of emission intensity versus wavelength for the second exemplary planar material stack of

FIG. 52

FIG. 52 shows a current -voltage plot of the device of an unencapsulated sample 20 micron micro- LED employing the second exemplary planar material stack of

FIG. 53

performance graph

FIG. 53 is a graph showing external quantum eﬃciency of sample light emitting devices employing the exemplary device structure of

FIG. 54

FIG. 54 illustrates an LED lO X of an alternative embodiment. The LED lO X has a high external quantum eﬃciency and may be used as a subpixel in the above …

FIG. 55

FIG. 55, the n-type region 610 may contain several layers. A single crystalline gallium nitride (GaN) layer 604 can be grown by an epitaxial deposition process …

FIG. 56

FIG. 56, the light emitting region 630 may contain several epitaxial layers. An optional ﬁrst strain- modulating ﬁlm 631 may be epitaxially formed on the n- …

FIG. 57

FIG. 57, the p-type region 650 may contain several epitaxial layers. A low temperature p-type layer 651 is epitaxially formed on light emitting region 630 …

FIG. 58

FIG. 58, the n-type region 610 may contain a layer stack that includes, from bottom to top, a single crystalline N- gallium nitride (GaN) layer 603 which can …

Claims

Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.

1 independent · 1 dependent

1
IndependentGaNGaNAlGaNGaNepitaxial low temperature p-type layerepitaxial high temperature heavily doped p+ type layerGaN-based light emitting diode (LED)
A light emitting diode (LED), comprising: a n-doped region; a p-doped region; and a light emitting region located between the n-doped region and a p-doped region, wherein the n-doped region comprises a ﬁrst GaN layer, at least one n-doped second GaN layer located over the ﬁrst GaN layer, an AlGaN dislocation blocking layer located over the at least one n-doped second GaN layer, and a n-doped third GaN layer located over the A l GaN dislocation blocking ﬁlm; wherein the p-type region comprises: an epitaxial low temperature p-type layer located on the light emitting region; an epitaxial high temperature heavily doped p+ type layer located on the low temperature p-type layer; an epitaxial ﬁrst high temperature p-type layer located on the high temperature heavily doped p+ type layer; an epitaxial second high temperature p-type layer located on the ﬁrst high temperature p-type layer, wherein the ﬁrst and the second high temperature p-type layers include at least one p-type GaN layer and at least one p-type AlGaN layer; and an epitaxial heavily doped contact layer located on the second high temperature p- type layer, and having a higher dopant concentration than the high temperature heavily doped p+ type layer.
1. 2
  Dependent← claim 1GaNepitaxial low temperature p-type layerepitaxial high temperature heavily doped p+ type layerepitaxial first high temperature p-type layerepitaxial second high temperature p-type layerepitaxial heavily doped contact layerGaN-based light emitting diode (LED)
  The LED of claim 1, wherein: the low temperature p-type layer comprises a magnesium doped p-type GaN, InGaN or AlGaN layer; the high temperature heavily doped p+ type layer comprises a magnesium doped p+ GaN layer which is deposited at a higher temperature than the low temperature p-type layer; the ﬁrst high temperature type GaN or AlGaN layer which is deposited at a type layer; the second high temperature p-type layer or a p-type GaN/A l GaN superlattice; and magnesium doped p+ + GaN or InGaN layer, a nGaN layer, or a silicon doped n+ + GaN or InGaN second high temperature p-type layer. p-type layer comprises a magnesium doped p-higher temperature than the low temperature p-layer comprises a magnesium doped p-type Al GaN the heavily doped contact layer comprises a magnesium and silicon co-doped p++ GaN or I layer which forms a tunnel diode with the

Device structures

Layer stacks claimed or described, ordered top of device to substrate.

GaN-based light emitting diode (LED)

epitaxial heavily doped contact layerheavily doped contact layer

epitaxial second high temperature p-type layersecond high temperature p-type layer

epitaxial first high temperature p-type layerfirst high temperature p-type layer

epitaxial high temperature heavily doped p+ type layerhigh temperature heavily doped p+ layer

epitaxial low temperature p-type layerlow temperature p-type layer

Materials

Materials described outside the worked examples.

first GaN layer

GaN

N-Doped Region Base Layer

N-Doped Region Intermediate LayerN-Doped Region Top Layer

AlGaN dislocation blocking layer

AlGaN

Characterization

Measurements and analyses referenced in the patent, with their drawing references.

fet electrical

Fet Electrical

FIG. 4 is a schematic illustration of the step of forming a ﬁrst bonding material layer on the ﬁrst carrier substrates, providing second carrier substrate, and …

Figure references

FIG. 4

thickness

Reported properties

Performance values and ranges asserted in the specification or claims.

Property	Value	Material
Thickness	0.1–0.75 µm	—
Thickness

Why these are connected

Related documents with shared materials, methods, properties, or citations.

EPITAXIAL GALLIUM NITRIDE BASED LIGHT EMITTING DIODE AND METHOD OF MAKING THEREOF | Matter42 Literature