Patent
METHOD OF MANUFACTURING SWITCHING ELEMENT
Tetsuya YAMADA
Copyright © 2026 Matter42. All rights reserved.
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FIG. 1 2 is a diagram illustrating a meth o d of manufacturing the MOSFET acc o rding to Example 2; FIG 13 is a cross-sectional view o f a MOSFET according to …
FIG. 3 is a diagram illustrating a meth o d of manufacturing the MOSFET acc o rding to Example 1; FIG 4 is a diagram illustrating a method of manufacturing the …
FIG. 8 is a diagram illustrating a method of manuf a cturing the MOSFET according to Example 1;
FIG. 9 is a diagram illustrating a method of manufacturing the MOSFET according to Example 1; FIG 10 is a diagram illustrating a method of manufacturing the …
FIG. 10, the gate insulating film 2 8 is formed so as to cover the uppe r surfac e of the GaN semico ndu ctor s ubstrate 12 between the source layers 40, and …
FIG. 11. According to the manufacturing method, the side surface 63 of the recessed p o rti o n 62 is inclined at a position serving as a l ow er p o rti on of …
FIG. 12, similar to Example 2. In the second etching step, the recessed portion 62 is further etched on a condition that etching uniformly proceeds in the …
FIG. 13. [0046 According to the manufacturing method of Example 3, the large inclined portion 63b is provided on the side surface of the recessed portion 62 at …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of manufacturing a switching element, the method comprising: forming a recessed portion in a surface of a GaN semiconductor substrate in which a first n-type semiconductor layer is exposed on the surface; growing a body layer which is a p-type GaN semiconductor layer within the recessed portion and on the surface of the GaN semiconductor substrate; removing a surface layer portion of the body layer to expose the first n-type semiconductor layer on the surface of the GaN semiconductor substrate, and leave the body layer within the recessed portion; forming a second n-type semiconductor layer, which is separated from the first n-type semiconductor layer by the body layer and is exposed on the surface of the GaN semiconductor substrate, in a portion within a distribution region of the body layer after the surface layer portion of the body layer is removed; and forming a gate electrode, which faces the body layer through an insulating film, in a range in which the body layer is exposed between the first n-type semiconductor layer and the second n-type semiconductor layer on the surface of the GaN semiconductor substrate after the surface layer portion of the body layer is removed.
The method according to claim 1, wherein: the forming of the recessed portion includes forming the recessed portion such that a side surface of the recessed portion has a small inclined portion in which an angle to the surface of the GaN semiconductor substrate is equal to or greater than 80 0 and equal to or less than 90 0 at a position serving as a lower portion of the gate electrode; and the removing of the surface layer portion of the body layer includes polishing the surface of the GaN semiconductor substrate and stopping the polishing in a state where the small inclined portion is positioned on the surface of the GaN semiconductor substrate.
The method according to claim 1, wherein the forming of the recessed portion includes forming the recessed portion such that the side surface of the recessed portion has a large inclined portion, which is inclined such that a depth of the recessed portion increases as a distance from an end of the recessed portion increases and in which an angle to the surface of the GaN semiconductor substrate is less than 6 0, at a position serving as a lower portion of the gate electrode.
The method according to claim 1, further comprising: forming a stopper layer on the surface of the GaN semiconductor substrate before the body layer is grown, wherein: the growing of the body layer includes g rowing the body layer such that the stopper layer is covered; and the removing the surface layer portion of the body layer includes polishing the body layer until the stopper layer is exposed by using a polishing method in which polishing efficiency of the stopper layer is lower than polishing efficiency of the body layer, and polishing the body layer and the stopper layer until the stopper layer is removed.
The method according to claim 1, wherein the forming of the recessed portion includes forming the recessed portion in the surface of the GaN semiconductor substrate through etching.
The method according to claim 1, wherein the growing of the body layer includes growing the body layer through epitaxial growth.
Embodiments described in the patent, grouped by the materials and process steps they use.
5 materials1 process step
A MOSFET is formed on a GaN semiconductor substrate comprising source layers (n-type), body layers (p-type), and a drift layer (n-type). A gate insulating film and gate electrode are disposed on the upper surface facing the body layer and drift layer. Contact plugs and upper/lower electrodes complete the device structure.
Layer stacks claimed or described, ordered top of device to substrate.
GaN MOSFET (switching element)
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 12, similar to Example 2. In the second etching step, the recessed portion 62 is further etched on a condition that etching uniformly proceeds in the …
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 2 is a diagram illustrating a meth o d of manufacturing the MOSFET acc o rding to Example 2; FIG 13 is a cross-sectional view o f a MOSFET according to …
FIG. 3 is a diagram illustrating a meth o d of manufacturing the MOSFET acc o rding to Example 1; FIG 4 is a diagram illustrating a method of manufacturing the …
FIG. 8 is a diagram illustrating a method of manuf a cturing the MOSFET according to Example 1;
FIG. 9 is a diagram illustrating a method of manufacturing the MOSFET according to Example 1; FIG 10 is a diagram illustrating a method of manufacturing the …
FIG. 10, the gate insulating film 2 8 is formed so as to cover the uppe r surfac e of the GaN semico ndu ctor s ubstrate 12 between the source layers 40, and …
FIG. 11. According to the manufacturing method, the side surface 63 of the recessed p o rti o n 62 is inclined at a position serving as a l ow er p o rti on of …
FIG. 12, similar to Example 2. In the second etching step, the recessed portion 62 is further etched on a condition that etching uniformly proceeds in the …
FIG. 13. [0046 According to the manufacturing method of Example 3, the large inclined portion 63b is provided on the side surface of the recessed portion 62 at …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of manufacturing a switching element, the method comprising: forming a recessed portion in a surface of a GaN semiconductor substrate in which a first n-type semiconductor layer is exposed on the surface; growing a body layer which is a p-type GaN semiconductor layer within the recessed portion and on the surface of the GaN semiconductor substrate; removing a surface layer portion of the body layer to expose the first n-type semiconductor layer on the surface of the GaN semiconductor substrate, and leave the body layer within the recessed portion; forming a second n-type semiconductor layer, which is separated from the first n-type semiconductor layer by the body layer and is exposed on the surface of the GaN semiconductor substrate, in a portion within a distribution region of the body layer after the surface layer portion of the body layer is removed; and forming a gate electrode, which faces the body layer through an insulating film, in a range in which the body layer is exposed between the first n-type semiconductor layer and the second n-type semiconductor layer on the surface of the GaN semiconductor substrate after the surface layer portion of the body layer is removed.
The method according to claim 1, wherein: the forming of the recessed portion includes forming the recessed portion such that a side surface of the recessed portion has a small inclined portion in which an angle to the surface of the GaN semiconductor substrate is equal to or greater than 80 0 and equal to or less than 90 0 at a position serving as a lower portion of the gate electrode; and the removing of the surface layer portion of the body layer includes polishing the surface of the GaN semiconductor substrate and stopping the polishing in a state where the small inclined portion is positioned on the surface of the GaN semiconductor substrate.
The method according to claim 1, wherein the forming of the recessed portion includes forming the recessed portion such that the side surface of the recessed portion has a large inclined portion, which is inclined such that a depth of the recessed portion increases as a distance from an end of the recessed portion increases and in which an angle to the surface of the GaN semiconductor substrate is less than 6 0, at a position serving as a lower portion of the gate electrode.
The method according to claim 1, further comprising: forming a stopper layer on the surface of the GaN semiconductor substrate before the body layer is grown, wherein: the growing of the body layer includes g rowing the body layer such that the stopper layer is covered; and the removing the surface layer portion of the body layer includes polishing the body layer until the stopper layer is exposed by using a polishing method in which polishing efficiency of the stopper layer is lower than polishing efficiency of the body layer, and polishing the body layer and the stopper layer until the stopper layer is removed.
The method according to claim 1, wherein the forming of the recessed portion includes forming the recessed portion in the surface of the GaN semiconductor substrate through etching.
The method according to claim 1, wherein the growing of the body layer includes growing the body layer through epitaxial growth.
Embodiments described in the patent, grouped by the materials and process steps they use.
5 materials1 process step
A MOSFET is formed on a GaN semiconductor substrate comprising source layers (n-type), body layers (p-type), and a drift layer (n-type). A gate insulating film and gate electrode are disposed on the upper surface facing the body layer and drift layer. Contact plugs and upper/lower electrodes complete the device structure.
Layer stacks claimed or described, ordered top of device to substrate.
GaN MOSFET (switching element)
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 12, similar to Example 2. In the second etching step, the recessed portion 62 is further etched on a condition that etching uniformly proceeds in the …
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 2 is a diagram illustrating a meth o d of manufacturing the MOSFET acc o rding to Example 2; FIG 13 is a cross-sectional view o f a MOSFET according to …
FIG. 3 is a diagram illustrating a meth o d of manufacturing the MOSFET acc o rding to Example 1; FIG 4 is a diagram illustrating a method of manufacturing the …
FIG. 8 is a diagram illustrating a method of manuf a cturing the MOSFET according to Example 1;
FIG. 9 is a diagram illustrating a method of manufacturing the MOSFET according to Example 1; FIG 10 is a diagram illustrating a method of manufacturing the …
FIG. 10, the gate insulating film 2 8 is formed so as to cover the uppe r surfac e of the GaN semico ndu ctor s ubstrate 12 between the source layers 40, and …
FIG. 11. According to the manufacturing method, the side surface 63 of the recessed p o rti o n 62 is inclined at a position serving as a l ow er p o rti on of …
FIG. 12, similar to Example 2. In the second etching step, the recessed portion 62 is further etched on a condition that etching uniformly proceeds in the …
FIG. 13. [0046 According to the manufacturing method of Example 3, the large inclined portion 63b is provided on the side surface of the recessed portion 62 at …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of manufacturing a switching element, the method comprising: forming a recessed portion in a surface of a GaN semiconductor substrate in which a first n-type semiconductor layer is exposed on the surface; growing a body layer which is a p-type GaN semiconductor layer within the recessed portion and on the surface of the GaN semiconductor substrate; removing a surface layer portion of the body layer to expose the first n-type semiconductor layer on the surface of the GaN semiconductor substrate, and leave the body layer within the recessed portion; forming a second n-type semiconductor layer, which is separated from the first n-type semiconductor layer by the body layer and is exposed on the surface of the GaN semiconductor substrate, in a portion within a distribution region of the body layer after the surface layer portion of the body layer is removed; and forming a gate electrode, which faces the body layer through an insulating film, in a range in which the body layer is exposed between the first n-type semiconductor layer and the second n-type semiconductor layer on the surface of the GaN semiconductor substrate after the surface layer portion of the body layer is removed.
The method according to claim 1, wherein: the forming of the recessed portion includes forming the recessed portion such that a side surface of the recessed portion has a small inclined portion in which an angle to the surface of the GaN semiconductor substrate is equal to or greater than 80 0 and equal to or less than 90 0 at a position serving as a lower portion of the gate electrode; and the removing of the surface layer portion of the body layer includes polishing the surface of the GaN semiconductor substrate and stopping the polishing in a state where the small inclined portion is positioned on the surface of the GaN semiconductor substrate.
The method according to claim 1, wherein the forming of the recessed portion includes forming the recessed portion such that the side surface of the recessed portion has a large inclined portion, which is inclined such that a depth of the recessed portion increases as a distance from an end of the recessed portion increases and in which an angle to the surface of the GaN semiconductor substrate is less than 6 0, at a position serving as a lower portion of the gate electrode.
The method according to claim 1, further comprising: forming a stopper layer on the surface of the GaN semiconductor substrate before the body layer is grown, wherein: the growing of the body layer includes g rowing the body layer such that the stopper layer is covered; and the removing the surface layer portion of the body layer includes polishing the body layer until the stopper layer is exposed by using a polishing method in which polishing efficiency of the stopper layer is lower than polishing efficiency of the body layer, and polishing the body layer and the stopper layer until the stopper layer is removed.
The method according to claim 1, wherein the forming of the recessed portion includes forming the recessed portion in the surface of the GaN semiconductor substrate through etching.
The method according to claim 1, wherein the growing of the body layer includes growing the body layer through epitaxial growth.
Embodiments described in the patent, grouped by the materials and process steps they use.
5 materials1 process step
A MOSFET is formed on a GaN semiconductor substrate comprising source layers (n-type), body layers (p-type), and a drift layer (n-type). A gate insulating film and gate electrode are disposed on the upper surface facing the body layer and drift layer. Contact plugs and upper/lower electrodes complete the device structure.
Layer stacks claimed or described, ordered top of device to substrate.
GaN MOSFET (switching element)
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 12, similar to Example 2. In the second etching step, the recessed portion 62 is further etched on a condition that etching uniformly proceeds in the …
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 2 is a diagram illustrating a meth o d of manufacturing the MOSFET acc o rding to Example 2; FIG 13 is a cross-sectional view o f a MOSFET according to …
FIG. 3 is a diagram illustrating a meth o d of manufacturing the MOSFET acc o rding to Example 1; FIG 4 is a diagram illustrating a method of manufacturing the …
FIG. 8 is a diagram illustrating a method of manuf a cturing the MOSFET according to Example 1;
FIG. 9 is a diagram illustrating a method of manufacturing the MOSFET according to Example 1; FIG 10 is a diagram illustrating a method of manufacturing the …
FIG. 10, the gate insulating film 2 8 is formed so as to cover the uppe r surfac e of the GaN semico ndu ctor s ubstrate 12 between the source layers 40, and …
FIG. 11. According to the manufacturing method, the side surface 63 of the recessed p o rti o n 62 is inclined at a position serving as a l ow er p o rti on of …
FIG. 12, similar to Example 2. In the second etching step, the recessed portion 62 is further etched on a condition that etching uniformly proceeds in the …
FIG. 13. [0046 According to the manufacturing method of Example 3, the large inclined portion 63b is provided on the side surface of the recessed portion 62 at …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of manufacturing a switching element, the method comprising: forming a recessed portion in a surface of a GaN semiconductor substrate in which a first n-type semiconductor layer is exposed on the surface; growing a body layer which is a p-type GaN semiconductor layer within the recessed portion and on the surface of the GaN semiconductor substrate; removing a surface layer portion of the body layer to expose the first n-type semiconductor layer on the surface of the GaN semiconductor substrate, and leave the body layer within the recessed portion; forming a second n-type semiconductor layer, which is separated from the first n-type semiconductor layer by the body layer and is exposed on the surface of the GaN semiconductor substrate, in a portion within a distribution region of the body layer after the surface layer portion of the body layer is removed; and forming a gate electrode, which faces the body layer through an insulating film, in a range in which the body layer is exposed between the first n-type semiconductor layer and the second n-type semiconductor layer on the surface of the GaN semiconductor substrate after the surface layer portion of the body layer is removed.
The method according to claim 1, wherein: the forming of the recessed portion includes forming the recessed portion such that a side surface of the recessed portion has a small inclined portion in which an angle to the surface of the GaN semiconductor substrate is equal to or greater than 80 0 and equal to or less than 90 0 at a position serving as a lower portion of the gate electrode; and the removing of the surface layer portion of the body layer includes polishing the surface of the GaN semiconductor substrate and stopping the polishing in a state where the small inclined portion is positioned on the surface of the GaN semiconductor substrate.
The method according to claim 1, wherein the forming of the recessed portion includes forming the recessed portion such that the side surface of the recessed portion has a large inclined portion, which is inclined such that a depth of the recessed portion increases as a distance from an end of the recessed portion increases and in which an angle to the surface of the GaN semiconductor substrate is less than 6 0, at a position serving as a lower portion of the gate electrode.
The method according to claim 1, further comprising: forming a stopper layer on the surface of the GaN semiconductor substrate before the body layer is grown, wherein: the growing of the body layer includes g rowing the body layer such that the stopper layer is covered; and the removing the surface layer portion of the body layer includes polishing the body layer until the stopper layer is exposed by using a polishing method in which polishing efficiency of the stopper layer is lower than polishing efficiency of the body layer, and polishing the body layer and the stopper layer until the stopper layer is removed.
The method according to claim 1, wherein the forming of the recessed portion includes forming the recessed portion in the surface of the GaN semiconductor substrate through etching.
The method according to claim 1, wherein the growing of the body layer includes growing the body layer through epitaxial growth.
Embodiments described in the patent, grouped by the materials and process steps they use.
5 materials1 process step
A MOSFET is formed on a GaN semiconductor substrate comprising source layers (n-type), body layers (p-type), and a drift layer (n-type). A gate insulating film and gate electrode are disposed on the upper surface facing the body layer and drift layer. Contact plugs and upper/lower electrodes complete the device structure.
Layer stacks claimed or described, ordered top of device to substrate.
GaN MOSFET (switching element)
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 12, similar to Example 2. In the second etching step, the recessed portion 62 is further etched on a condition that etching uniformly proceeds in the …
Related documents with shared materials, methods, properties, or citations.
FIG. 12, similar to Example 2. In the second etching step, the recessed portion 62 is further etched on a condition that etching uniformly proceeds in the …
FIG. 12, similar to Example 2. In the second etching step, the recessed portion 62 is further etched on a condition that etching uniformly proceeds in the …
FIG. 12, similar to Example 2. In the second etching step, the recessed portion 62 is further etched on a condition that etching uniformly proceeds in the …
FIG. 12, similar to Example 2. In the second etching step, the recessed portion 62 is further etched on a condition that etching uniformly proceeds in the …