Patent
FORMATION OF LARGE SCALE SINGLE CRYSTALLINE GRAPHENE
CHRISTOS D. DIMITRAKOPOULOS
US
Copyright © 2026 Matter42. All rights reserved.
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Atlas literature
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Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional view of a substrate having a spreading layer formed thereon in accordance with the present principles; [0013]
FIG. 2B is a cross-sectional view showing a stressor layer formed on a graphene spreading layer on a SiC substrate in accordance with the present principles; …
FIG. 3A is a cross-sectional view showing a handle substrate adhered to the stressor layer for handling a split off of one or more monolayers of the spreading …
FIG. 4 is a cross-sectional view showing a handle substrate coupled to the stressor layer, the stressor layer carrying a monolayer and remnants of the 2D …
FIG. 5 is a cross-sectional view showing the monolayer and remnants of the 2D material held over a substrate for removing the remnants in accordance with the …
FIG. 6 is a cross-sectional view showing the monolayer with the remnants of the 2D material transferred to the second substrate in accordance with the present …
FIG. 7 is a cross-sectional view of the handle substrate stack transfe rr ing the monolayer to a third substrate in accordance with the present principles; …
FIG. 8 is a cross-sectional view showing a monolayer transferred to the third substrate in accordance with the present principles; [0022]
FIG. 9B is an image showing the monolayer after a first stamping process employed to remove the remnants of 2D material remaining on the monolayer in accordance …
FIG. 10 is a cross-sectional view showing a metal deposited on the remnants and blanket monolayer of
FIG. 11 is a cross-sectional view showing the metal and a tape stripped off to remove the remnants from the blanket monolayer of
FIG. 12 is a cross-sectional view showing the blanket monolayer transferred to another substrate in accordance with the present principles; [0028]
FIG. 13 is a cross-sectional view showing the blanket monolayer on the transfer substrate in accordance with the present principles; and [0029]
FIG. 14 is a block/flow diagram showing methods for transfer of a monolayer in accordance with illustrative embodiments.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A structure, comprising: a semiconductor substrate; and an exfoliated single crystalline monolayer of graphene disposed directly on and in contact with the semiconductor substrate, the exfoliated single crystalline monolayer having a surface area of greater than 15 square inches.
The structure as recited in claim 1, wherein the exfoliated single crystalline monolayer of graphene includes a conductive channel for electronic devices.
The structure as recited in claim 1, wherein the exfoliated single crystalline monolayer of graphene is disposed directly on the semiconductor substrate by a single transfer process.
The structure of claim 1, wherein the exfoliated single crystalline monolayer of graphene is disposed directly on and in contact with an entirety of an upper surface of the semiconductor substrate.
The structure of claim 1, wherein the semiconductor Serial No. 14/691,270 2 substrate comprises Si, GaAs, SiC, GaN, I nP or a combination thereof.
The structure of claim 1, wherein the semiconductor substrate includes a solid-state device comprising transistors, capacitors, electric wires, photosensitive devices, biosensors, wrap-around multi-channel transistors and combinations thereof.
The structure of claim 1, wherein the exfoliated single crystalline monolayer of graphene is substantially free of defects.
The structure of claim 1, wherein the structure is a solid state device.
A structure, comprising: a substrate comprising SiC; and an exfoliated single crystalline monolayer of graphene disposed directly on and in contact with the substrate, the exfoliated single crystalline monolayer having a surface area of greater than 15 square inches.
The structure as recited in claim 9, wherein the exfoliated single crystalline monolayer of graphene is patterned to form a conductive channel for electronic devices.
The structure as recited in claim 9, wherein the exfoliated Serial No. 14/691,270 3 single crystalline monolayer of graphene is disposed on the semiconductor substrate by a single transfer process.
The structure of claim 9, wherein the exfoliated single crystalline monolayer of graphene is present directly on and in contact with an entirety of an upper surface of the semiconductor substrate.
The structure of claim 9, wherein the semiconductor substrate includes a solid-state device comprising transistors, capacitors, electric wires, photosensitive devices, biosensors, wrap-around multi-channel transistors and combinations thereof.
The structure of claim 9, wherein the structure is a solid state device.
A structure, comprising: a substrate comprising one of gallium arsenide (GaAs), gallium nitride (GaN), and indium phosphide (I nP); and an exfoliated single crystalline monolayer of graphene disposed directly on and in contact with the substrate, the exfoliated single crystalline monolayer having a surface area of greater than 15 square inches. Serial No. 14/691,270 4
The structure as recited in claim 15, wherein the exfoliated single crystalline monolayer of graphene is patterned to form a conductive channel for electronic devices.
The structure as recited in claim 15, wherein the exfoliated single crystalline monolayer of graphene is disposed on the semiconductor substrate by a single transfer process.
The structure of claim 15, wherein the exfoliated single crystalline monolayer of graphene is present directly on and in contact with an entirety of an upper surface of the semiconductor substrate.
The structure of claim 15, wherein the semiconductor substrate includes a solid-state device comprising transistors, capacitors, electric wires, photosensitive devices, biosensors, wrap-around multi-channel transistors and combinations thereof.
Layer stacks claimed or described, ordered top of device to substrate.
structure with semiconductor substrate and exfoliated graphene monolayer
structure with SiC substrate and exfoliated graphene monolayer
structure with GaAs/GaN/InP substrate and exfoliated graphene monolayer
Materials described outside the worked examples.
graphene (exfoliated single crystalline monolayer)
C
semiconductor substrate (generic)
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Pressure | 3.5–900 mTorr | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional view of a substrate having a spreading layer formed thereon in accordance with the present principles; [0013]
FIG. 2B is a cross-sectional view showing a stressor layer formed on a graphene spreading layer on a SiC substrate in accordance with the present principles; …
FIG. 3A is a cross-sectional view showing a handle substrate adhered to the stressor layer for handling a split off of one or more monolayers of the spreading …
FIG. 4 is a cross-sectional view showing a handle substrate coupled to the stressor layer, the stressor layer carrying a monolayer and remnants of the 2D …
FIG. 5 is a cross-sectional view showing the monolayer and remnants of the 2D material held over a substrate for removing the remnants in accordance with the …
FIG. 6 is a cross-sectional view showing the monolayer with the remnants of the 2D material transferred to the second substrate in accordance with the present …
FIG. 7 is a cross-sectional view of the handle substrate stack transfe rr ing the monolayer to a third substrate in accordance with the present principles; …
FIG. 8 is a cross-sectional view showing a monolayer transferred to the third substrate in accordance with the present principles; [0022]
FIG. 9B is an image showing the monolayer after a first stamping process employed to remove the remnants of 2D material remaining on the monolayer in accordance …
FIG. 10 is a cross-sectional view showing a metal deposited on the remnants and blanket monolayer of
FIG. 11 is a cross-sectional view showing the metal and a tape stripped off to remove the remnants from the blanket monolayer of
FIG. 12 is a cross-sectional view showing the blanket monolayer transferred to another substrate in accordance with the present principles; [0028]
FIG. 13 is a cross-sectional view showing the blanket monolayer on the transfer substrate in accordance with the present principles; and [0029]
FIG. 14 is a block/flow diagram showing methods for transfer of a monolayer in accordance with illustrative embodiments.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A structure, comprising: a semiconductor substrate; and an exfoliated single crystalline monolayer of graphene disposed directly on and in contact with the semiconductor substrate, the exfoliated single crystalline monolayer having a surface area of greater than 15 square inches.
The structure as recited in claim 1, wherein the exfoliated single crystalline monolayer of graphene includes a conductive channel for electronic devices.
The structure as recited in claim 1, wherein the exfoliated single crystalline monolayer of graphene is disposed directly on the semiconductor substrate by a single transfer process.
The structure of claim 1, wherein the exfoliated single crystalline monolayer of graphene is disposed directly on and in contact with an entirety of an upper surface of the semiconductor substrate.
The structure of claim 1, wherein the semiconductor Serial No. 14/691,270 2 substrate comprises Si, GaAs, SiC, GaN, I nP or a combination thereof.
The structure of claim 1, wherein the semiconductor substrate includes a solid-state device comprising transistors, capacitors, electric wires, photosensitive devices, biosensors, wrap-around multi-channel transistors and combinations thereof.
The structure of claim 1, wherein the exfoliated single crystalline monolayer of graphene is substantially free of defects.
The structure of claim 1, wherein the structure is a solid state device.
A structure, comprising: a substrate comprising SiC; and an exfoliated single crystalline monolayer of graphene disposed directly on and in contact with the substrate, the exfoliated single crystalline monolayer having a surface area of greater than 15 square inches.
The structure as recited in claim 9, wherein the exfoliated single crystalline monolayer of graphene is patterned to form a conductive channel for electronic devices.
The structure as recited in claim 9, wherein the exfoliated Serial No. 14/691,270 3 single crystalline monolayer of graphene is disposed on the semiconductor substrate by a single transfer process.
The structure of claim 9, wherein the exfoliated single crystalline monolayer of graphene is present directly on and in contact with an entirety of an upper surface of the semiconductor substrate.
The structure of claim 9, wherein the semiconductor substrate includes a solid-state device comprising transistors, capacitors, electric wires, photosensitive devices, biosensors, wrap-around multi-channel transistors and combinations thereof.
The structure of claim 9, wherein the structure is a solid state device.
A structure, comprising: a substrate comprising one of gallium arsenide (GaAs), gallium nitride (GaN), and indium phosphide (I nP); and an exfoliated single crystalline monolayer of graphene disposed directly on and in contact with the substrate, the exfoliated single crystalline monolayer having a surface area of greater than 15 square inches. Serial No. 14/691,270 4
The structure as recited in claim 15, wherein the exfoliated single crystalline monolayer of graphene is patterned to form a conductive channel for electronic devices.
The structure as recited in claim 15, wherein the exfoliated single crystalline monolayer of graphene is disposed on the semiconductor substrate by a single transfer process.
The structure of claim 15, wherein the exfoliated single crystalline monolayer of graphene is present directly on and in contact with an entirety of an upper surface of the semiconductor substrate.
The structure of claim 15, wherein the semiconductor substrate includes a solid-state device comprising transistors, capacitors, electric wires, photosensitive devices, biosensors, wrap-around multi-channel transistors and combinations thereof.
Layer stacks claimed or described, ordered top of device to substrate.
structure with semiconductor substrate and exfoliated graphene monolayer
structure with SiC substrate and exfoliated graphene monolayer
structure with GaAs/GaN/InP substrate and exfoliated graphene monolayer
Materials described outside the worked examples.
graphene (exfoliated single crystalline monolayer)
C
semiconductor substrate (generic)
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Pressure | 3.5–900 mTorr | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional view of a substrate having a spreading layer formed thereon in accordance with the present principles; [0013]
FIG. 2B is a cross-sectional view showing a stressor layer formed on a graphene spreading layer on a SiC substrate in accordance with the present principles; …
FIG. 3A is a cross-sectional view showing a handle substrate adhered to the stressor layer for handling a split off of one or more monolayers of the spreading …
FIG. 4 is a cross-sectional view showing a handle substrate coupled to the stressor layer, the stressor layer carrying a monolayer and remnants of the 2D …
FIG. 5 is a cross-sectional view showing the monolayer and remnants of the 2D material held over a substrate for removing the remnants in accordance with the …
FIG. 6 is a cross-sectional view showing the monolayer with the remnants of the 2D material transferred to the second substrate in accordance with the present …
FIG. 7 is a cross-sectional view of the handle substrate stack transfe rr ing the monolayer to a third substrate in accordance with the present principles; …
FIG. 8 is a cross-sectional view showing a monolayer transferred to the third substrate in accordance with the present principles; [0022]
FIG. 9B is an image showing the monolayer after a first stamping process employed to remove the remnants of 2D material remaining on the monolayer in accordance …
FIG. 10 is a cross-sectional view showing a metal deposited on the remnants and blanket monolayer of
FIG. 11 is a cross-sectional view showing the metal and a tape stripped off to remove the remnants from the blanket monolayer of
FIG. 12 is a cross-sectional view showing the blanket monolayer transferred to another substrate in accordance with the present principles; [0028]
FIG. 13 is a cross-sectional view showing the blanket monolayer on the transfer substrate in accordance with the present principles; and [0029]
FIG. 14 is a block/flow diagram showing methods for transfer of a monolayer in accordance with illustrative embodiments.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A structure, comprising: a semiconductor substrate; and an exfoliated single crystalline monolayer of graphene disposed directly on and in contact with the semiconductor substrate, the exfoliated single crystalline monolayer having a surface area of greater than 15 square inches.
The structure as recited in claim 1, wherein the exfoliated single crystalline monolayer of graphene includes a conductive channel for electronic devices.
The structure as recited in claim 1, wherein the exfoliated single crystalline monolayer of graphene is disposed directly on the semiconductor substrate by a single transfer process.
The structure of claim 1, wherein the exfoliated single crystalline monolayer of graphene is disposed directly on and in contact with an entirety of an upper surface of the semiconductor substrate.
The structure of claim 1, wherein the semiconductor Serial No. 14/691,270 2 substrate comprises Si, GaAs, SiC, GaN, I nP or a combination thereof.
The structure of claim 1, wherein the semiconductor substrate includes a solid-state device comprising transistors, capacitors, electric wires, photosensitive devices, biosensors, wrap-around multi-channel transistors and combinations thereof.
The structure of claim 1, wherein the exfoliated single crystalline monolayer of graphene is substantially free of defects.
The structure of claim 1, wherein the structure is a solid state device.
A structure, comprising: a substrate comprising SiC; and an exfoliated single crystalline monolayer of graphene disposed directly on and in contact with the substrate, the exfoliated single crystalline monolayer having a surface area of greater than 15 square inches.
The structure as recited in claim 9, wherein the exfoliated single crystalline monolayer of graphene is patterned to form a conductive channel for electronic devices.
The structure as recited in claim 9, wherein the exfoliated Serial No. 14/691,270 3 single crystalline monolayer of graphene is disposed on the semiconductor substrate by a single transfer process.
The structure of claim 9, wherein the exfoliated single crystalline monolayer of graphene is present directly on and in contact with an entirety of an upper surface of the semiconductor substrate.
The structure of claim 9, wherein the semiconductor substrate includes a solid-state device comprising transistors, capacitors, electric wires, photosensitive devices, biosensors, wrap-around multi-channel transistors and combinations thereof.
The structure of claim 9, wherein the structure is a solid state device.
A structure, comprising: a substrate comprising one of gallium arsenide (GaAs), gallium nitride (GaN), and indium phosphide (I nP); and an exfoliated single crystalline monolayer of graphene disposed directly on and in contact with the substrate, the exfoliated single crystalline monolayer having a surface area of greater than 15 square inches. Serial No. 14/691,270 4
The structure as recited in claim 15, wherein the exfoliated single crystalline monolayer of graphene is patterned to form a conductive channel for electronic devices.
The structure as recited in claim 15, wherein the exfoliated single crystalline monolayer of graphene is disposed on the semiconductor substrate by a single transfer process.
The structure of claim 15, wherein the exfoliated single crystalline monolayer of graphene is present directly on and in contact with an entirety of an upper surface of the semiconductor substrate.
The structure of claim 15, wherein the semiconductor substrate includes a solid-state device comprising transistors, capacitors, electric wires, photosensitive devices, biosensors, wrap-around multi-channel transistors and combinations thereof.
Layer stacks claimed or described, ordered top of device to substrate.
structure with semiconductor substrate and exfoliated graphene monolayer
structure with SiC substrate and exfoliated graphene monolayer
structure with GaAs/GaN/InP substrate and exfoliated graphene monolayer
Materials described outside the worked examples.
graphene (exfoliated single crystalline monolayer)
C
semiconductor substrate (generic)
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Pressure | 3.5–900 mTorr | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a cross-sectional view of a substrate having a spreading layer formed thereon in accordance with the present principles; [0013]
FIG. 2B is a cross-sectional view showing a stressor layer formed on a graphene spreading layer on a SiC substrate in accordance with the present principles; …
FIG. 3A is a cross-sectional view showing a handle substrate adhered to the stressor layer for handling a split off of one or more monolayers of the spreading …
FIG. 4 is a cross-sectional view showing a handle substrate coupled to the stressor layer, the stressor layer carrying a monolayer and remnants of the 2D …
FIG. 5 is a cross-sectional view showing the monolayer and remnants of the 2D material held over a substrate for removing the remnants in accordance with the …
FIG. 6 is a cross-sectional view showing the monolayer with the remnants of the 2D material transferred to the second substrate in accordance with the present …
FIG. 7 is a cross-sectional view of the handle substrate stack transfe rr ing the monolayer to a third substrate in accordance with the present principles; …
FIG. 8 is a cross-sectional view showing a monolayer transferred to the third substrate in accordance with the present principles; [0022]
FIG. 9B is an image showing the monolayer after a first stamping process employed to remove the remnants of 2D material remaining on the monolayer in accordance …
FIG. 10 is a cross-sectional view showing a metal deposited on the remnants and blanket monolayer of
FIG. 11 is a cross-sectional view showing the metal and a tape stripped off to remove the remnants from the blanket monolayer of
FIG. 12 is a cross-sectional view showing the blanket monolayer transferred to another substrate in accordance with the present principles; [0028]
FIG. 13 is a cross-sectional view showing the blanket monolayer on the transfer substrate in accordance with the present principles; and [0029]
FIG. 14 is a block/flow diagram showing methods for transfer of a monolayer in accordance with illustrative embodiments.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A structure, comprising: a semiconductor substrate; and an exfoliated single crystalline monolayer of graphene disposed directly on and in contact with the semiconductor substrate, the exfoliated single crystalline monolayer having a surface area of greater than 15 square inches.
The structure as recited in claim 1, wherein the exfoliated single crystalline monolayer of graphene includes a conductive channel for electronic devices.
The structure as recited in claim 1, wherein the exfoliated single crystalline monolayer of graphene is disposed directly on the semiconductor substrate by a single transfer process.
The structure of claim 1, wherein the exfoliated single crystalline monolayer of graphene is disposed directly on and in contact with an entirety of an upper surface of the semiconductor substrate.
The structure of claim 1, wherein the semiconductor Serial No. 14/691,270 2 substrate comprises Si, GaAs, SiC, GaN, I nP or a combination thereof.
The structure of claim 1, wherein the semiconductor substrate includes a solid-state device comprising transistors, capacitors, electric wires, photosensitive devices, biosensors, wrap-around multi-channel transistors and combinations thereof.
The structure of claim 1, wherein the exfoliated single crystalline monolayer of graphene is substantially free of defects.
The structure of claim 1, wherein the structure is a solid state device.
A structure, comprising: a substrate comprising SiC; and an exfoliated single crystalline monolayer of graphene disposed directly on and in contact with the substrate, the exfoliated single crystalline monolayer having a surface area of greater than 15 square inches.
The structure as recited in claim 9, wherein the exfoliated single crystalline monolayer of graphene is patterned to form a conductive channel for electronic devices.
The structure as recited in claim 9, wherein the exfoliated Serial No. 14/691,270 3 single crystalline monolayer of graphene is disposed on the semiconductor substrate by a single transfer process.
The structure of claim 9, wherein the exfoliated single crystalline monolayer of graphene is present directly on and in contact with an entirety of an upper surface of the semiconductor substrate.
The structure of claim 9, wherein the semiconductor substrate includes a solid-state device comprising transistors, capacitors, electric wires, photosensitive devices, biosensors, wrap-around multi-channel transistors and combinations thereof.
The structure of claim 9, wherein the structure is a solid state device.
A structure, comprising: a substrate comprising one of gallium arsenide (GaAs), gallium nitride (GaN), and indium phosphide (I nP); and an exfoliated single crystalline monolayer of graphene disposed directly on and in contact with the substrate, the exfoliated single crystalline monolayer having a surface area of greater than 15 square inches. Serial No. 14/691,270 4
The structure as recited in claim 15, wherein the exfoliated single crystalline monolayer of graphene is patterned to form a conductive channel for electronic devices.
The structure as recited in claim 15, wherein the exfoliated single crystalline monolayer of graphene is disposed on the semiconductor substrate by a single transfer process.
The structure of claim 15, wherein the exfoliated single crystalline monolayer of graphene is present directly on and in contact with an entirety of an upper surface of the semiconductor substrate.
The structure of claim 15, wherein the semiconductor substrate includes a solid-state device comprising transistors, capacitors, electric wires, photosensitive devices, biosensors, wrap-around multi-channel transistors and combinations thereof.
Layer stacks claimed or described, ordered top of device to substrate.
structure with semiconductor substrate and exfoliated graphene monolayer
structure with SiC substrate and exfoliated graphene monolayer
structure with GaAs/GaN/InP substrate and exfoliated graphene monolayer
Materials described outside the worked examples.
graphene (exfoliated single crystalline monolayer)
C
semiconductor substrate (generic)
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Pressure | 3.5–900 mTorr | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
silicon
Si
gallium arsenide
GaAs
silicon carbide
SiC
gallium nitride
GaN
indium phosphide
InP
stressor layer
gold
Au
palladium
Pd
| — |
Pressure | ≥ 500 MPa | — |
silicon
Si
gallium arsenide
GaAs
silicon carbide
SiC
gallium nitride
GaN
indium phosphide
InP
stressor layer
gold
Au
palladium
Pd
| — |
Pressure | ≥ 500 MPa | — |
silicon
Si
gallium arsenide
GaAs
silicon carbide
SiC
gallium nitride
GaN
indium phosphide
InP
stressor layer
gold
Au
palladium
Pd
| — |
Pressure | ≥ 500 MPa | — |
silicon
Si
gallium arsenide
GaAs
silicon carbide
SiC
gallium nitride
GaN
indium phosphide
InP
stressor layer
gold
Au
palladium
Pd
| — |
Pressure | ≥ 500 MPa | — |