Patent
US 10,090,386GRAPHENE-METAL BONDING STRUCTURE, METHOD OF MANUFACTURING THE SAME, AND SEMICONDUCTOR DEVICE HAVING THE GRAPHENE-METAL BONDING STRUCTURE
Jaeho LEE
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 10,090,386Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 B is a diagram of a graphene-metal bonding structure, in which graphene and metal are in an edge-contact state; [0027]
FIG. 2 is a diagram of a graphene-metal bonding structure according to example embodiments; [0028]
FIG. 3 is a cross-sectional view of the graphene-metal bonding structure of
FIG. 4A is a diagram showing measurement of a contact resistance in a graphene-metal bonding structure, in which a graphene layer and a metal layer are …
FIG. 5 is a graph of a measured current density of the graphene-metal bonding structure of
FIG. 6 is a diagram of a graphene-metal bonding structure according to example embodiments; [0033]
FIG. 7 is a diagram of a graphene-metal bonding structure according to example embodiments; [0034]
FIG. 8 is a diagram of a graphene-metal bonding structure according to example embodiments; [0035]
FIGS. 9 through 12 are diagrams illustrating a method of fabricating a graphene-metal bonding structure according to example embodiments; [0036]
FIG. 10, an intermediate material layer 630 is formed on the graphene layer 610. The intermediate material layer 630 may include a carbon- based material. The …
FIG. 11, when the metal layer 620 is formed on the intermediate material layer 630, the graphene-metal bonding structure is completed. The metal layer 620 may …
FIG. 12. Here, the patterning of the intermediate material layer 630 may be performed by, for example, a photolithography process and an etching process. In …
FIGS. 13 through 16 are diagrams illustrating a method of fabricating a graphene-metal bonding structure according to example embodiments; [0037]
FIG. 14, a second graphene layer 730' is formed on the first graphene layer 710. The second graphene layer 730' includes at least a sheet of graphene. That is, …
FIG. 15, the second graphene layer 730' is patterned to form an intermediate material layer 730. Here, if the second graphene layer 730' is formed of one sheet …
FIG. 16, a metal layer 720 is formed on the intermediate material layer 730 to finish forming of the graphene-metal bonding structure. Here, the edge-contact is …
FIG. 17 is a diagram of a semiconductor device according to example embodiments; and [0038]
FIG. 18 is a diagram of a semiconductor device according to example embodiments.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
- 15 Canceled
Canceled
A semiconductor device comprising: a graphene-metal bonding structure on a substrate, the graphene-metal bonding structure including a graphene layer, a metal layer on the graphene layer, and an intermediate material layer between the graphene layer and the metal layer, the intermediate material layer forming an edge-contact with the metal layer from boundary portions of a material contained in the intermediate material layer that contact the metal layer, and the intermediate material layer including a carbon-based material, the metal layer being a first electrode, the graphene layer being a first graphene layer between the substrate and the first electrode, and the intermediate material layer being a first intermediate material layer; a second electrode spaced apart from the first electrode on the substrate, the first electrode and the second electrode including a metal; a gate insulating layer on the substrate between the first electrode and the second electrode; a gate electrode on the gate insulating layer; a second graphene layer between the substrate and the second electrode; and a second intermediate material layer between the second graphene layer and the second electrode, the second intermediate material layer forming an edge-contact with the second electrode from boundary portions of a material contained in the second intermediate material layer that contact the second electrode. Previously presented
The semiconductor device of claim 16, wherein the substrate includes a semiconductor material. Original
The semiconductor device of claim 16, wherein one of the first electrode and the second electrode is a source electrode, and an other of the first electrode and the second electrode is a drain electrode. Original
The semiconductor device of claim 16, wherein the first intermediate material layer and the second intermediate material layer include at least one carbon-based material. Original
The semiconductor device of claim 16, wherein each of the first and second intermediate material layers independently include at least one of a porous material having a plurality of pores, a crystalline material including a plurality of crystal grains, and a patterned graphene. Original
The semiconductor device of claim 16, wherein at least one of the first intermediate material layer and the second intermediate material layer is patterned. Original
The semiconductor device of claim 16, wherein at least one of the first intermediate material layer and the second intermediate material layer has a multi-layer structure in which a plurality of material layers are stacked on each other. Original
A semiconductor device comprising: an insulating layer on a substrate at one side of the substrate; a graphene-metal bonding structure on the insulating layer, the graphene-metal bonding structure including a graphene layer, a metal layer on the graphene layer, and an intermediate material layer between the graphene layer and the metal layer, the intermediate material layer forming an edge-contact with the metal layer from boundary portions of a material contained in the intermediate material layer that contact the metal layer, and the intermediate material layer including a carbon-based material, the metal layer of the graphene-metal bonding structure being a first electrode on the in s ulating layer, the first ele rtrnrl e in chid ing a m etal, the graphene layer being a first graphene layer between the insulating layer and the first electrode, the first graphene layer extending to a surface of the substrate, the intermediate material layer being a first intermediate material layer between the first electrode and the first graphene layer; a second electrode on the substrate at an other side of the substrate, the second electrode including a metal; a second graphene layer between the substrate and the second electrode; a second intermediate material layer between the second electrode and the second graphene layer, the second intermediate material layer forming an edge- contact with the second electrode from boundary portions of a material contained in the second intermediate material layer that contacts the second electrode; a gate insulating layer ' on the insulating layer and the substrate, the gate insulating layer covering the first graphene layer; and a gate electrode on the gate insulating layer. Previously presented
The semiconductor device of claim 26, wherein the substrate includes a semiconductor material. Original
The semiconductor device of claim 26, wherein one of the first electrode and the second electrode is a source electrode, and an other of the first electrode and the second electrode is a drain electrode. Original
The semiconductor device of claim 26, wherein the first intermediate material layer and the second intermediate material layer include a carbon-based material. Original
The semiconductor device of claim 26, wherein each of the first and second intermediate material layers independently include at least one of a porous material having a plurality of pores, a crystalline material including a plurality of crystal grains, and a patterned graphene. Original
The semiconductor device of claim 26, wherein layer and the second intermediate material layer
The semiconductor device of claim 26, wherein layer and the second intermediate material layer material layers are stacked on each other. Original
- 39.. *** END CLAIM LISTING *** Canceled
Canceled at least one of the first intermediate material is patterned. Original at least one of the first intermediate material has a multi-layer structure in which a plurality of
Layer stacks claimed or described, ordered top of device to substrate.
graphene-metal bonding semiconductor device (planar gate FET)
Materials described outside the worked examples.
graphene
metal
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 4A is a diagram showing measurement of a contact resistance in a graphene-metal bonding structure, in which a graphene layer and a metal layer are …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 1–1000 nm | — |
Thickness |
Table 1
The contact resistances shown in Table 1 denote contact resistances between a carbon atom of the gra
p. 7
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,090,386Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 B is a diagram of a graphene-metal bonding structure, in which graphene and metal are in an edge-contact state; [0027]
FIG. 2 is a diagram of a graphene-metal bonding structure according to example embodiments; [0028]
FIG. 3 is a cross-sectional view of the graphene-metal bonding structure of
FIG. 4A is a diagram showing measurement of a contact resistance in a graphene-metal bonding structure, in which a graphene layer and a metal layer are …
FIG. 5 is a graph of a measured current density of the graphene-metal bonding structure of
FIG. 6 is a diagram of a graphene-metal bonding structure according to example embodiments; [0033]
FIG. 7 is a diagram of a graphene-metal bonding structure according to example embodiments; [0034]
FIG. 8 is a diagram of a graphene-metal bonding structure according to example embodiments; [0035]
FIGS. 9 through 12 are diagrams illustrating a method of fabricating a graphene-metal bonding structure according to example embodiments; [0036]
FIG. 10, an intermediate material layer 630 is formed on the graphene layer 610. The intermediate material layer 630 may include a carbon- based material. The …
FIG. 11, when the metal layer 620 is formed on the intermediate material layer 630, the graphene-metal bonding structure is completed. The metal layer 620 may …
FIG. 12. Here, the patterning of the intermediate material layer 630 may be performed by, for example, a photolithography process and an etching process. In …
FIGS. 13 through 16 are diagrams illustrating a method of fabricating a graphene-metal bonding structure according to example embodiments; [0037]
FIG. 14, a second graphene layer 730' is formed on the first graphene layer 710. The second graphene layer 730' includes at least a sheet of graphene. That is, …
FIG. 15, the second graphene layer 730' is patterned to form an intermediate material layer 730. Here, if the second graphene layer 730' is formed of one sheet …
FIG. 16, a metal layer 720 is formed on the intermediate material layer 730 to finish forming of the graphene-metal bonding structure. Here, the edge-contact is …
FIG. 17 is a diagram of a semiconductor device according to example embodiments; and [0038]
FIG. 18 is a diagram of a semiconductor device according to example embodiments.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
- 15 Canceled
Canceled
A semiconductor device comprising: a graphene-metal bonding structure on a substrate, the graphene-metal bonding structure including a graphene layer, a metal layer on the graphene layer, and an intermediate material layer between the graphene layer and the metal layer, the intermediate material layer forming an edge-contact with the metal layer from boundary portions of a material contained in the intermediate material layer that contact the metal layer, and the intermediate material layer including a carbon-based material, the metal layer being a first electrode, the graphene layer being a first graphene layer between the substrate and the first electrode, and the intermediate material layer being a first intermediate material layer; a second electrode spaced apart from the first electrode on the substrate, the first electrode and the second electrode including a metal; a gate insulating layer on the substrate between the first electrode and the second electrode; a gate electrode on the gate insulating layer; a second graphene layer between the substrate and the second electrode; and a second intermediate material layer between the second graphene layer and the second electrode, the second intermediate material layer forming an edge-contact with the second electrode from boundary portions of a material contained in the second intermediate material layer that contact the second electrode. Previously presented
The semiconductor device of claim 16, wherein the substrate includes a semiconductor material. Original
The semiconductor device of claim 16, wherein one of the first electrode and the second electrode is a source electrode, and an other of the first electrode and the second electrode is a drain electrode. Original
The semiconductor device of claim 16, wherein the first intermediate material layer and the second intermediate material layer include at least one carbon-based material. Original
The semiconductor device of claim 16, wherein each of the first and second intermediate material layers independently include at least one of a porous material having a plurality of pores, a crystalline material including a plurality of crystal grains, and a patterned graphene. Original
The semiconductor device of claim 16, wherein at least one of the first intermediate material layer and the second intermediate material layer is patterned. Original
The semiconductor device of claim 16, wherein at least one of the first intermediate material layer and the second intermediate material layer has a multi-layer structure in which a plurality of material layers are stacked on each other. Original
A semiconductor device comprising: an insulating layer on a substrate at one side of the substrate; a graphene-metal bonding structure on the insulating layer, the graphene-metal bonding structure including a graphene layer, a metal layer on the graphene layer, and an intermediate material layer between the graphene layer and the metal layer, the intermediate material layer forming an edge-contact with the metal layer from boundary portions of a material contained in the intermediate material layer that contact the metal layer, and the intermediate material layer including a carbon-based material, the metal layer of the graphene-metal bonding structure being a first electrode on the in s ulating layer, the first ele rtrnrl e in chid ing a m etal, the graphene layer being a first graphene layer between the insulating layer and the first electrode, the first graphene layer extending to a surface of the substrate, the intermediate material layer being a first intermediate material layer between the first electrode and the first graphene layer; a second electrode on the substrate at an other side of the substrate, the second electrode including a metal; a second graphene layer between the substrate and the second electrode; a second intermediate material layer between the second electrode and the second graphene layer, the second intermediate material layer forming an edge- contact with the second electrode from boundary portions of a material contained in the second intermediate material layer that contacts the second electrode; a gate insulating layer ' on the insulating layer and the substrate, the gate insulating layer covering the first graphene layer; and a gate electrode on the gate insulating layer. Previously presented
The semiconductor device of claim 26, wherein the substrate includes a semiconductor material. Original
The semiconductor device of claim 26, wherein one of the first electrode and the second electrode is a source electrode, and an other of the first electrode and the second electrode is a drain electrode. Original
The semiconductor device of claim 26, wherein the first intermediate material layer and the second intermediate material layer include a carbon-based material. Original
The semiconductor device of claim 26, wherein each of the first and second intermediate material layers independently include at least one of a porous material having a plurality of pores, a crystalline material including a plurality of crystal grains, and a patterned graphene. Original
The semiconductor device of claim 26, wherein layer and the second intermediate material layer
The semiconductor device of claim 26, wherein layer and the second intermediate material layer material layers are stacked on each other. Original
- 39.. *** END CLAIM LISTING *** Canceled
Canceled at least one of the first intermediate material is patterned. Original at least one of the first intermediate material has a multi-layer structure in which a plurality of
Layer stacks claimed or described, ordered top of device to substrate.
graphene-metal bonding semiconductor device (planar gate FET)
Materials described outside the worked examples.
graphene
metal
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 4A is a diagram showing measurement of a contact resistance in a graphene-metal bonding structure, in which a graphene layer and a metal layer are …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 1–1000 nm | — |
Thickness |
Table 1
The contact resistances shown in Table 1 denote contact resistances between a carbon atom of the gra
p. 7
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,090,386Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 B is a diagram of a graphene-metal bonding structure, in which graphene and metal are in an edge-contact state; [0027]
FIG. 2 is a diagram of a graphene-metal bonding structure according to example embodiments; [0028]
FIG. 3 is a cross-sectional view of the graphene-metal bonding structure of
FIG. 4A is a diagram showing measurement of a contact resistance in a graphene-metal bonding structure, in which a graphene layer and a metal layer are …
FIG. 5 is a graph of a measured current density of the graphene-metal bonding structure of
FIG. 6 is a diagram of a graphene-metal bonding structure according to example embodiments; [0033]
FIG. 7 is a diagram of a graphene-metal bonding structure according to example embodiments; [0034]
FIG. 8 is a diagram of a graphene-metal bonding structure according to example embodiments; [0035]
FIGS. 9 through 12 are diagrams illustrating a method of fabricating a graphene-metal bonding structure according to example embodiments; [0036]
FIG. 10, an intermediate material layer 630 is formed on the graphene layer 610. The intermediate material layer 630 may include a carbon- based material. The …
FIG. 11, when the metal layer 620 is formed on the intermediate material layer 630, the graphene-metal bonding structure is completed. The metal layer 620 may …
FIG. 12. Here, the patterning of the intermediate material layer 630 may be performed by, for example, a photolithography process and an etching process. In …
FIGS. 13 through 16 are diagrams illustrating a method of fabricating a graphene-metal bonding structure according to example embodiments; [0037]
FIG. 14, a second graphene layer 730' is formed on the first graphene layer 710. The second graphene layer 730' includes at least a sheet of graphene. That is, …
FIG. 15, the second graphene layer 730' is patterned to form an intermediate material layer 730. Here, if the second graphene layer 730' is formed of one sheet …
FIG. 16, a metal layer 720 is formed on the intermediate material layer 730 to finish forming of the graphene-metal bonding structure. Here, the edge-contact is …
FIG. 17 is a diagram of a semiconductor device according to example embodiments; and [0038]
FIG. 18 is a diagram of a semiconductor device according to example embodiments.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
- 15 Canceled
Canceled
A semiconductor device comprising: a graphene-metal bonding structure on a substrate, the graphene-metal bonding structure including a graphene layer, a metal layer on the graphene layer, and an intermediate material layer between the graphene layer and the metal layer, the intermediate material layer forming an edge-contact with the metal layer from boundary portions of a material contained in the intermediate material layer that contact the metal layer, and the intermediate material layer including a carbon-based material, the metal layer being a first electrode, the graphene layer being a first graphene layer between the substrate and the first electrode, and the intermediate material layer being a first intermediate material layer; a second electrode spaced apart from the first electrode on the substrate, the first electrode and the second electrode including a metal; a gate insulating layer on the substrate between the first electrode and the second electrode; a gate electrode on the gate insulating layer; a second graphene layer between the substrate and the second electrode; and a second intermediate material layer between the second graphene layer and the second electrode, the second intermediate material layer forming an edge-contact with the second electrode from boundary portions of a material contained in the second intermediate material layer that contact the second electrode. Previously presented
The semiconductor device of claim 16, wherein the substrate includes a semiconductor material. Original
The semiconductor device of claim 16, wherein one of the first electrode and the second electrode is a source electrode, and an other of the first electrode and the second electrode is a drain electrode. Original
The semiconductor device of claim 16, wherein the first intermediate material layer and the second intermediate material layer include at least one carbon-based material. Original
The semiconductor device of claim 16, wherein each of the first and second intermediate material layers independently include at least one of a porous material having a plurality of pores, a crystalline material including a plurality of crystal grains, and a patterned graphene. Original
The semiconductor device of claim 16, wherein at least one of the first intermediate material layer and the second intermediate material layer is patterned. Original
The semiconductor device of claim 16, wherein at least one of the first intermediate material layer and the second intermediate material layer has a multi-layer structure in which a plurality of material layers are stacked on each other. Original
A semiconductor device comprising: an insulating layer on a substrate at one side of the substrate; a graphene-metal bonding structure on the insulating layer, the graphene-metal bonding structure including a graphene layer, a metal layer on the graphene layer, and an intermediate material layer between the graphene layer and the metal layer, the intermediate material layer forming an edge-contact with the metal layer from boundary portions of a material contained in the intermediate material layer that contact the metal layer, and the intermediate material layer including a carbon-based material, the metal layer of the graphene-metal bonding structure being a first electrode on the in s ulating layer, the first ele rtrnrl e in chid ing a m etal, the graphene layer being a first graphene layer between the insulating layer and the first electrode, the first graphene layer extending to a surface of the substrate, the intermediate material layer being a first intermediate material layer between the first electrode and the first graphene layer; a second electrode on the substrate at an other side of the substrate, the second electrode including a metal; a second graphene layer between the substrate and the second electrode; a second intermediate material layer between the second electrode and the second graphene layer, the second intermediate material layer forming an edge- contact with the second electrode from boundary portions of a material contained in the second intermediate material layer that contacts the second electrode; a gate insulating layer ' on the insulating layer and the substrate, the gate insulating layer covering the first graphene layer; and a gate electrode on the gate insulating layer. Previously presented
The semiconductor device of claim 26, wherein the substrate includes a semiconductor material. Original
The semiconductor device of claim 26, wherein one of the first electrode and the second electrode is a source electrode, and an other of the first electrode and the second electrode is a drain electrode. Original
The semiconductor device of claim 26, wherein the first intermediate material layer and the second intermediate material layer include a carbon-based material. Original
The semiconductor device of claim 26, wherein each of the first and second intermediate material layers independently include at least one of a porous material having a plurality of pores, a crystalline material including a plurality of crystal grains, and a patterned graphene. Original
The semiconductor device of claim 26, wherein layer and the second intermediate material layer
The semiconductor device of claim 26, wherein layer and the second intermediate material layer material layers are stacked on each other. Original
- 39.. *** END CLAIM LISTING *** Canceled
Canceled at least one of the first intermediate material is patterned. Original at least one of the first intermediate material has a multi-layer structure in which a plurality of
Layer stacks claimed or described, ordered top of device to substrate.
graphene-metal bonding semiconductor device (planar gate FET)
Materials described outside the worked examples.
graphene
metal
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 4A is a diagram showing measurement of a contact resistance in a graphene-metal bonding structure, in which a graphene layer and a metal layer are …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 1–1000 nm | — |
Thickness |
Table 1
The contact resistances shown in Table 1 denote contact resistances between a carbon atom of the gra
p. 7
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,090,386Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 B is a diagram of a graphene-metal bonding structure, in which graphene and metal are in an edge-contact state; [0027]
FIG. 2 is a diagram of a graphene-metal bonding structure according to example embodiments; [0028]
FIG. 3 is a cross-sectional view of the graphene-metal bonding structure of
FIG. 4A is a diagram showing measurement of a contact resistance in a graphene-metal bonding structure, in which a graphene layer and a metal layer are …
FIG. 5 is a graph of a measured current density of the graphene-metal bonding structure of
FIG. 6 is a diagram of a graphene-metal bonding structure according to example embodiments; [0033]
FIG. 7 is a diagram of a graphene-metal bonding structure according to example embodiments; [0034]
FIG. 8 is a diagram of a graphene-metal bonding structure according to example embodiments; [0035]
FIGS. 9 through 12 are diagrams illustrating a method of fabricating a graphene-metal bonding structure according to example embodiments; [0036]
FIG. 10, an intermediate material layer 630 is formed on the graphene layer 610. The intermediate material layer 630 may include a carbon- based material. The …
FIG. 11, when the metal layer 620 is formed on the intermediate material layer 630, the graphene-metal bonding structure is completed. The metal layer 620 may …
FIG. 12. Here, the patterning of the intermediate material layer 630 may be performed by, for example, a photolithography process and an etching process. In …
FIGS. 13 through 16 are diagrams illustrating a method of fabricating a graphene-metal bonding structure according to example embodiments; [0037]
FIG. 14, a second graphene layer 730' is formed on the first graphene layer 710. The second graphene layer 730' includes at least a sheet of graphene. That is, …
FIG. 15, the second graphene layer 730' is patterned to form an intermediate material layer 730. Here, if the second graphene layer 730' is formed of one sheet …
FIG. 16, a metal layer 720 is formed on the intermediate material layer 730 to finish forming of the graphene-metal bonding structure. Here, the edge-contact is …
FIG. 17 is a diagram of a semiconductor device according to example embodiments; and [0038]
FIG. 18 is a diagram of a semiconductor device according to example embodiments.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
- 15 Canceled
Canceled
A semiconductor device comprising: a graphene-metal bonding structure on a substrate, the graphene-metal bonding structure including a graphene layer, a metal layer on the graphene layer, and an intermediate material layer between the graphene layer and the metal layer, the intermediate material layer forming an edge-contact with the metal layer from boundary portions of a material contained in the intermediate material layer that contact the metal layer, and the intermediate material layer including a carbon-based material, the metal layer being a first electrode, the graphene layer being a first graphene layer between the substrate and the first electrode, and the intermediate material layer being a first intermediate material layer; a second electrode spaced apart from the first electrode on the substrate, the first electrode and the second electrode including a metal; a gate insulating layer on the substrate between the first electrode and the second electrode; a gate electrode on the gate insulating layer; a second graphene layer between the substrate and the second electrode; and a second intermediate material layer between the second graphene layer and the second electrode, the second intermediate material layer forming an edge-contact with the second electrode from boundary portions of a material contained in the second intermediate material layer that contact the second electrode. Previously presented
The semiconductor device of claim 16, wherein the substrate includes a semiconductor material. Original
The semiconductor device of claim 16, wherein one of the first electrode and the second electrode is a source electrode, and an other of the first electrode and the second electrode is a drain electrode. Original
The semiconductor device of claim 16, wherein the first intermediate material layer and the second intermediate material layer include at least one carbon-based material. Original
The semiconductor device of claim 16, wherein each of the first and second intermediate material layers independently include at least one of a porous material having a plurality of pores, a crystalline material including a plurality of crystal grains, and a patterned graphene. Original
The semiconductor device of claim 16, wherein at least one of the first intermediate material layer and the second intermediate material layer is patterned. Original
The semiconductor device of claim 16, wherein at least one of the first intermediate material layer and the second intermediate material layer has a multi-layer structure in which a plurality of material layers are stacked on each other. Original
A semiconductor device comprising: an insulating layer on a substrate at one side of the substrate; a graphene-metal bonding structure on the insulating layer, the graphene-metal bonding structure including a graphene layer, a metal layer on the graphene layer, and an intermediate material layer between the graphene layer and the metal layer, the intermediate material layer forming an edge-contact with the metal layer from boundary portions of a material contained in the intermediate material layer that contact the metal layer, and the intermediate material layer including a carbon-based material, the metal layer of the graphene-metal bonding structure being a first electrode on the in s ulating layer, the first ele rtrnrl e in chid ing a m etal, the graphene layer being a first graphene layer between the insulating layer and the first electrode, the first graphene layer extending to a surface of the substrate, the intermediate material layer being a first intermediate material layer between the first electrode and the first graphene layer; a second electrode on the substrate at an other side of the substrate, the second electrode including a metal; a second graphene layer between the substrate and the second electrode; a second intermediate material layer between the second electrode and the second graphene layer, the second intermediate material layer forming an edge- contact with the second electrode from boundary portions of a material contained in the second intermediate material layer that contacts the second electrode; a gate insulating layer ' on the insulating layer and the substrate, the gate insulating layer covering the first graphene layer; and a gate electrode on the gate insulating layer. Previously presented
The semiconductor device of claim 26, wherein the substrate includes a semiconductor material. Original
The semiconductor device of claim 26, wherein one of the first electrode and the second electrode is a source electrode, and an other of the first electrode and the second electrode is a drain electrode. Original
The semiconductor device of claim 26, wherein the first intermediate material layer and the second intermediate material layer include a carbon-based material. Original
The semiconductor device of claim 26, wherein each of the first and second intermediate material layers independently include at least one of a porous material having a plurality of pores, a crystalline material including a plurality of crystal grains, and a patterned graphene. Original
The semiconductor device of claim 26, wherein layer and the second intermediate material layer
The semiconductor device of claim 26, wherein layer and the second intermediate material layer material layers are stacked on each other. Original
- 39.. *** END CLAIM LISTING *** Canceled
Canceled at least one of the first intermediate material is patterned. Original at least one of the first intermediate material has a multi-layer structure in which a plurality of
Layer stacks claimed or described, ordered top of device to substrate.
graphene-metal bonding semiconductor device (planar gate FET)
Materials described outside the worked examples.
graphene
metal
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 4A is a diagram showing measurement of a contact resistance in a graphene-metal bonding structure, in which a graphene layer and a metal layer are …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 1–1000 nm | — |
Thickness |
Table 1
The contact resistances shown in Table 1 denote contact resistances between a carbon atom of the gra
p. 7
Related documents with shared materials, methods, properties, or citations.
graphene-metal bonding semiconductor device with insulating layer (elevated source FET)
carbon-based material
semiconductor material
porous material
crystalline material with crystal grains
patterned graphene
selectively reduced graphene oxide
carbon nanotubes (CNTs)
nanocrystalline graphene
FIG. 5 is a graph of a measured current density of the graphene-metal bonding structure of
| — |
SEMICONDUCTOR DEVICE INCLUDING GRAPHENE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
graphene-metal bonding semiconductor device with insulating layer (elevated source FET)
carbon-based material
semiconductor material
porous material
crystalline material with crystal grains
patterned graphene
selectively reduced graphene oxide
carbon nanotubes (CNTs)
nanocrystalline graphene
FIG. 5 is a graph of a measured current density of the graphene-metal bonding structure of
| — |
SEMICONDUCTOR DEVICE INCLUDING GRAPHENE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
graphene-metal bonding semiconductor device with insulating layer (elevated source FET)
carbon-based material
semiconductor material
porous material
crystalline material with crystal grains
patterned graphene
selectively reduced graphene oxide
carbon nanotubes (CNTs)
nanocrystalline graphene
FIG. 5 is a graph of a measured current density of the graphene-metal bonding structure of
| — |
SEMICONDUCTOR DEVICE INCLUDING GRAPHENE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
graphene-metal bonding semiconductor device with insulating layer (elevated source FET)
carbon-based material
semiconductor material
porous material
crystalline material with crystal grains
patterned graphene
selectively reduced graphene oxide
carbon nanotubes (CNTs)
nanocrystalline graphene
FIG. 5 is a graph of a measured current density of the graphene-metal bonding structure of
| — |
SEMICONDUCTOR DEVICE INCLUDING GRAPHENE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE