Patent
US 8,679,881GROWTH METHOD FOR REDUCING DEFECT DENSITY OF GALLIUM NITRIDE
Jen-Inn CHYI
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 8,679,881Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a flowchart of a growing method of the present invention.
FIGS. 2A to 2E are schematic diagrams of a growing method 10 and a structure of the present invention.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
What is Claimed is:
The growth method of claim 1, wherein the substrate is 5 made of a material selected from the group consisting of aluminum oxide (A 120 3), silicon (Si), gallium arsenide (GaAs), silicon carbide (SiC) and combinations thereof.
The growth method of claim 1, wherein the buffer growth layer comprises a low -temperature buffer growth layer and a 10 high-temperature buffer growth layer; in the step S l, the low-temperature buffer growth layer is grown at a low temperature of 600 ° C to 900 ° C, and the high-temperature buffer growth layer is grown at a high temperature of 1000 °C to 1200 °C.
The growth method of claim 1, wherein the stress release layer is made of a material selected from the group consisting 20 of gallium nitride (GaN), aluminum nitride (A l N), aluminum gallium nitride (Al XGa1X N) and combinations thereof.
The growth method of claim 1, wherein the first n anometer cover layer and the second n anometer cover layer are made of silicon nitride (SiN). 11 25 7. The growth method of claim 1, wherein the first buffer layer and the second buffer layer are made of a material selected from the group consisting of aluminum nitride (A I N), aluminum gallium nitride (A lXGa₁X N) and a combination thereof.
The growth method of claim 1, wherein the first island and the second island are made of gallium nitride (GaN) or aluminum gallium nitride (A lxGaiX N).
The growth method of claim 1, wherein the nitride semiconductor layer is made of a material selected from the 10 group consisting o f zin c oxide (ZnO), gallium nitride (GaN), aluminum nitride (A l N), indium nitride (InN), aluminum gallium nitride (A lxGai.x N), indium gallium nitride (InxGaI.X N), aluminum gallium indium nitride (A lXGayIni_.yN) and combinations thereof.
The growth method of claim 1, wherein the first nanometer cover layer and the second nanometer cover layer are formed on the stress release layer and the first buffer layer by organic-metal chemical vapor deposition (MOCVD), respectively. 12
Layer stacks claimed or described, ordered top of device to substrate.
dislocated island structure for GaN defect density reduction
Materials described outside the worked examples.
gallium nitride
GaN
silicon
Si
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 600–900 °C | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,679,881Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a flowchart of a growing method of the present invention.
FIGS. 2A to 2E are schematic diagrams of a growing method 10 and a structure of the present invention.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
What is Claimed is:
The growth method of claim 1, wherein the substrate is 5 made of a material selected from the group consisting of aluminum oxide (A 120 3), silicon (Si), gallium arsenide (GaAs), silicon carbide (SiC) and combinations thereof.
The growth method of claim 1, wherein the buffer growth layer comprises a low -temperature buffer growth layer and a 10 high-temperature buffer growth layer; in the step S l, the low-temperature buffer growth layer is grown at a low temperature of 600 ° C to 900 ° C, and the high-temperature buffer growth layer is grown at a high temperature of 1000 °C to 1200 °C.
The growth method of claim 1, wherein the stress release layer is made of a material selected from the group consisting 20 of gallium nitride (GaN), aluminum nitride (A l N), aluminum gallium nitride (Al XGa1X N) and combinations thereof.
The growth method of claim 1, wherein the first n anometer cover layer and the second n anometer cover layer are made of silicon nitride (SiN). 11 25 7. The growth method of claim 1, wherein the first buffer layer and the second buffer layer are made of a material selected from the group consisting of aluminum nitride (A I N), aluminum gallium nitride (A lXGa₁X N) and a combination thereof.
The growth method of claim 1, wherein the first island and the second island are made of gallium nitride (GaN) or aluminum gallium nitride (A lxGaiX N).
The growth method of claim 1, wherein the nitride semiconductor layer is made of a material selected from the 10 group consisting o f zin c oxide (ZnO), gallium nitride (GaN), aluminum nitride (A l N), indium nitride (InN), aluminum gallium nitride (A lxGai.x N), indium gallium nitride (InxGaI.X N), aluminum gallium indium nitride (A lXGayIni_.yN) and combinations thereof.
The growth method of claim 1, wherein the first nanometer cover layer and the second nanometer cover layer are formed on the stress release layer and the first buffer layer by organic-metal chemical vapor deposition (MOCVD), respectively. 12
Layer stacks claimed or described, ordered top of device to substrate.
dislocated island structure for GaN defect density reduction
Materials described outside the worked examples.
gallium nitride
GaN
silicon
Si
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 600–900 °C | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,679,881Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a flowchart of a growing method of the present invention.
FIGS. 2A to 2E are schematic diagrams of a growing method 10 and a structure of the present invention.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
What is Claimed is:
The growth method of claim 1, wherein the substrate is 5 made of a material selected from the group consisting of aluminum oxide (A 120 3), silicon (Si), gallium arsenide (GaAs), silicon carbide (SiC) and combinations thereof.
The growth method of claim 1, wherein the buffer growth layer comprises a low -temperature buffer growth layer and a 10 high-temperature buffer growth layer; in the step S l, the low-temperature buffer growth layer is grown at a low temperature of 600 ° C to 900 ° C, and the high-temperature buffer growth layer is grown at a high temperature of 1000 °C to 1200 °C.
The growth method of claim 1, wherein the stress release layer is made of a material selected from the group consisting 20 of gallium nitride (GaN), aluminum nitride (A l N), aluminum gallium nitride (Al XGa1X N) and combinations thereof.
The growth method of claim 1, wherein the first n anometer cover layer and the second n anometer cover layer are made of silicon nitride (SiN). 11 25 7. The growth method of claim 1, wherein the first buffer layer and the second buffer layer are made of a material selected from the group consisting of aluminum nitride (A I N), aluminum gallium nitride (A lXGa₁X N) and a combination thereof.
The growth method of claim 1, wherein the first island and the second island are made of gallium nitride (GaN) or aluminum gallium nitride (A lxGaiX N).
The growth method of claim 1, wherein the nitride semiconductor layer is made of a material selected from the 10 group consisting o f zin c oxide (ZnO), gallium nitride (GaN), aluminum nitride (A l N), indium nitride (InN), aluminum gallium nitride (A lxGai.x N), indium gallium nitride (InxGaI.X N), aluminum gallium indium nitride (A lXGayIni_.yN) and combinations thereof.
The growth method of claim 1, wherein the first nanometer cover layer and the second nanometer cover layer are formed on the stress release layer and the first buffer layer by organic-metal chemical vapor deposition (MOCVD), respectively. 12
Layer stacks claimed or described, ordered top of device to substrate.
dislocated island structure for GaN defect density reduction
Materials described outside the worked examples.
gallium nitride
GaN
silicon
Si
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 600–900 °C | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,679,881Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a flowchart of a growing method of the present invention.
FIGS. 2A to 2E are schematic diagrams of a growing method 10 and a structure of the present invention.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
What is Claimed is:
The growth method of claim 1, wherein the substrate is 5 made of a material selected from the group consisting of aluminum oxide (A 120 3), silicon (Si), gallium arsenide (GaAs), silicon carbide (SiC) and combinations thereof.
The growth method of claim 1, wherein the buffer growth layer comprises a low -temperature buffer growth layer and a 10 high-temperature buffer growth layer; in the step S l, the low-temperature buffer growth layer is grown at a low temperature of 600 ° C to 900 ° C, and the high-temperature buffer growth layer is grown at a high temperature of 1000 °C to 1200 °C.
The growth method of claim 1, wherein the stress release layer is made of a material selected from the group consisting 20 of gallium nitride (GaN), aluminum nitride (A l N), aluminum gallium nitride (Al XGa1X N) and combinations thereof.
The growth method of claim 1, wherein the first n anometer cover layer and the second n anometer cover layer are made of silicon nitride (SiN). 11 25 7. The growth method of claim 1, wherein the first buffer layer and the second buffer layer are made of a material selected from the group consisting of aluminum nitride (A I N), aluminum gallium nitride (A lXGa₁X N) and a combination thereof.
The growth method of claim 1, wherein the first island and the second island are made of gallium nitride (GaN) or aluminum gallium nitride (A lxGaiX N).
The growth method of claim 1, wherein the nitride semiconductor layer is made of a material selected from the 10 group consisting o f zin c oxide (ZnO), gallium nitride (GaN), aluminum nitride (A l N), indium nitride (InN), aluminum gallium nitride (A lxGai.x N), indium gallium nitride (InxGaI.X N), aluminum gallium indium nitride (A lXGayIni_.yN) and combinations thereof.
The growth method of claim 1, wherein the first nanometer cover layer and the second nanometer cover layer are formed on the stress release layer and the first buffer layer by organic-metal chemical vapor deposition (MOCVD), respectively. 12
Layer stacks claimed or described, ordered top of device to substrate.
dislocated island structure for GaN defect density reduction
Materials described outside the worked examples.
gallium nitride
GaN
silicon
Si
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | 600–900 °C | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
aluminum nitride
AlN
substrate
silicon nitride
SiN
nitride semiconductor layer
aluminum oxide
Al₂O₃
gallium arsenide
GaAs
silicon carbide
SiC
aluminum gallium nitride
AlxGa₁-xN
zinc oxide
ZnO
indium nitride
InN
indium gallium nitride
InxGa₁-xN
aluminum gallium indium nitride
AlxGayIn₁-x-yN
| 0–400 nm |
| — |
Temperature | 1000–1200 °C | — |
Temperature | 700–1200 °C | — |
Temperature | 10–1200 °C | — |
aluminum nitride
AlN
substrate
silicon nitride
SiN
nitride semiconductor layer
aluminum oxide
Al₂O₃
gallium arsenide
GaAs
silicon carbide
SiC
aluminum gallium nitride
AlxGa₁-xN
zinc oxide
ZnO
indium nitride
InN
indium gallium nitride
InxGa₁-xN
aluminum gallium indium nitride
AlxGayIn₁-x-yN
| 0–400 nm |
| — |
Temperature | 1000–1200 °C | — |
Temperature | 700–1200 °C | — |
Temperature | 10–1200 °C | — |
aluminum nitride
AlN
substrate
silicon nitride
SiN
nitride semiconductor layer
aluminum oxide
Al₂O₃
gallium arsenide
GaAs
silicon carbide
SiC
aluminum gallium nitride
AlxGa₁-xN
zinc oxide
ZnO
indium nitride
InN
indium gallium nitride
InxGa₁-xN
aluminum gallium indium nitride
AlxGayIn₁-x-yN
| 0–400 nm |
| — |
Temperature | 1000–1200 °C | — |
Temperature | 700–1200 °C | — |
Temperature | 10–1200 °C | — |
aluminum nitride
AlN
substrate
silicon nitride
SiN
nitride semiconductor layer
aluminum oxide
Al₂O₃
gallium arsenide
GaAs
silicon carbide
SiC
aluminum gallium nitride
AlxGa₁-xN
zinc oxide
ZnO
indium nitride
InN
indium gallium nitride
InxGa₁-xN
aluminum gallium indium nitride
AlxGayIn₁-x-yN
| 0–400 nm |
| — |
Temperature | 1000–1200 °C | — |
Temperature | 700–1200 °C | — |
Temperature | 10–1200 °C | — |