Patent
US 8,779,411Light Emitting Diode and Method of Manufacturing the Same
Dong Seon LEE
US
Copyright © 2026 Matter42. All rights reserved.
Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A light emitting diode comprising: a compound semiconductor layer including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer; a graphene layer formed on th e second conducti v e semiconductor layer; a plurality of metal nanoparticles formed on the graphene layer; a first electrode formed on the first conductive semiconductor layer; and a second electrode formed on the graphene layer, wherein the metal nanoparticles are formed on some region of the graphene layer.
The light emitting diode according to claim 1, wherein the metal nanoparticles formed on the graphene layer occupy from 20% to 40% of a surface area of the graphene layer
The light emitting diode according to claim 1, wherein the some region of the graphene layer is formed with hole patterns periodically arranged at a constant pitch.
The light emitting diode according t o claim 1, wherein the metal nanoparticles comprise at l east one selected from among Au, Ag, Pt, Lu, Rh, Pd, I r and Os.
The light emitting diode according to claim 1, wherein the metal nanoparticles have a particle diameter of 50 nm to 300 nm.
The light emitting diode according to claim 1, wherein the compound semiconductor layer is nitride-based compound semiconductor layer.
A method of manufacturing a light emitting diode, comprising: 2 Attorney Docket: 32517U U.S App l. Ser. No. 13/679,353 Response to Restriction Requirement mailed forming a compound semiconductor l ayer including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer; forming a graphene layer on the second conductive semiconductor layer; fo rming a mask film having a pattern on the graphene layer; forming a metal layer within the pattern of the mask film, followed by removing the mask film; heat treating the metal layer to form a plurality of metal nanoparticles; and forming a first electrode on the first conductive semiconductor layer and a second electrode on the graphene la y la y er.
The method according to claim 7, wherein the heat treating is performed at a temperature of 500 C to 700 *C.
(Original) The method according to claim 7, wherein the forming a graphene layer on the second conductive semiconductor layer comprises transferring the graphene layer onto the second conductive semiconductor layer.
Layer stacks claimed or described, ordered top of device to substrate.
light emitting diode
Materials described outside the worked examples.
graphene layer
metal nanoparticles
compound semiconductor layer
Au nanoparticles
Au
Ag nanoparticles
Ag
Pt nanoparticles
Pt
Lu nanoparticles
Lu
Rh nanoparticles
Rh
Pd nanoparticles
Pd
Ir nanoparticles
Ir
Os nanoparticles
Os
nitride-based compound semiconductor layer
GaN-based compound semiconductor
n-type GaN layer
p-type GaN layer
InGaN/GaN multi-quantum well active layer
indium tin oxide (ITO) film
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Optical Transmittance | 90 % | graphene layer |
Thickness | 2–3 nm | — |
Thickness | 50–300 nm | — |
Thickness | 50–200 nm | — |
Related documents with shared materials, methods, properties, or citations.
SEMICONDUCTOR INTERCONNECT STRUCTURE HAVING A GRAPHENE-BASED BARRIER METAL LAYER
METHOD FOR PRODUCING CATALYTIC METAL LAYER AND METHOD FOR PRODUCING GRAPHENE MATERIAL
GRAPHENE FORMING METHOD
GRAPHENE FOAM BASED OPTICAL SENSOR FOR OIL EXPLORATION AND SPILLS DETECTION
GRAPHENE STRUCTURE AND METHOD FOR MANUFACTURING GRAPHENE HAVING WRINKLE PATTERN
SUBSTRATE PROCESSING FOR GaN GROWTH
METHOD FOR PREPARING THREE-DIMENSIONAL POROUS GRAPHENE MATERIAL
GRAPHENE/METAL MOLECULAR LEVEL LAMINATION (GMMLL)
Revealing the (111) surface electronic structure of epitaxially grown Na2KSb photocathode
Process for Preparing Graphene Based on Metal Film-Assisted Annealing and the Reaction with Cl2
Method of Growing Gallium Nitride-Based Crystal and Heat Treatment Apparatus
Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A light emitting diode comprising: a compound semiconductor layer including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer; a graphene layer formed on th e second conducti v e semiconductor layer; a plurality of metal nanoparticles formed on the graphene layer; a first electrode formed on the first conductive semiconductor layer; and a second electrode formed on the graphene layer, wherein the metal nanoparticles are formed on some region of the graphene layer.
The light emitting diode according to claim 1, wherein the metal nanoparticles formed on the graphene layer occupy from 20% to 40% of a surface area of the graphene layer
The light emitting diode according to claim 1, wherein the some region of the graphene layer is formed with hole patterns periodically arranged at a constant pitch.
The light emitting diode according t o claim 1, wherein the metal nanoparticles comprise at l east one selected from among Au, Ag, Pt, Lu, Rh, Pd, I r and Os.
The light emitting diode according to claim 1, wherein the metal nanoparticles have a particle diameter of 50 nm to 300 nm.
The light emitting diode according to claim 1, wherein the compound semiconductor layer is nitride-based compound semiconductor layer.
A method of manufacturing a light emitting diode, comprising: 2 Attorney Docket: 32517U U.S App l. Ser. No. 13/679,353 Response to Restriction Requirement mailed forming a compound semiconductor l ayer including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer; forming a graphene layer on the second conductive semiconductor layer; fo rming a mask film having a pattern on the graphene layer; forming a metal layer within the pattern of the mask film, followed by removing the mask film; heat treating the metal layer to form a plurality of metal nanoparticles; and forming a first electrode on the first conductive semiconductor layer and a second electrode on the graphene la y la y er.
The method according to claim 7, wherein the heat treating is performed at a temperature of 500 C to 700 *C.
(Original) The method according to claim 7, wherein the forming a graphene layer on the second conductive semiconductor layer comprises transferring the graphene layer onto the second conductive semiconductor layer.
Layer stacks claimed or described, ordered top of device to substrate.
light emitting diode
Materials described outside the worked examples.
graphene layer
metal nanoparticles
compound semiconductor layer
Au nanoparticles
Au
Ag nanoparticles
Ag
Pt nanoparticles
Pt
Lu nanoparticles
Lu
Rh nanoparticles
Rh
Pd nanoparticles
Pd
Ir nanoparticles
Ir
Os nanoparticles
Os
nitride-based compound semiconductor layer
GaN-based compound semiconductor
n-type GaN layer
p-type GaN layer
InGaN/GaN multi-quantum well active layer
indium tin oxide (ITO) film
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Optical Transmittance | 90 % | graphene layer |
Thickness | 2–3 nm | — |
Thickness | 50–300 nm | — |
Thickness | 50–200 nm | — |
Related documents with shared materials, methods, properties, or citations.
SEMICONDUCTOR INTERCONNECT STRUCTURE HAVING A GRAPHENE-BASED BARRIER METAL LAYER
METHOD FOR PRODUCING CATALYTIC METAL LAYER AND METHOD FOR PRODUCING GRAPHENE MATERIAL
GRAPHENE FORMING METHOD
GRAPHENE FOAM BASED OPTICAL SENSOR FOR OIL EXPLORATION AND SPILLS DETECTION
GRAPHENE STRUCTURE AND METHOD FOR MANUFACTURING GRAPHENE HAVING WRINKLE PATTERN
SUBSTRATE PROCESSING FOR GaN GROWTH
METHOD FOR PREPARING THREE-DIMENSIONAL POROUS GRAPHENE MATERIAL
GRAPHENE/METAL MOLECULAR LEVEL LAMINATION (GMMLL)
Revealing the (111) surface electronic structure of epitaxially grown Na2KSb photocathode
Process for Preparing Graphene Based on Metal Film-Assisted Annealing and the Reaction with Cl2
Method of Growing Gallium Nitride-Based Crystal and Heat Treatment Apparatus
Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A light emitting diode comprising: a compound semiconductor layer including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer; a graphene layer formed on th e second conducti v e semiconductor layer; a plurality of metal nanoparticles formed on the graphene layer; a first electrode formed on the first conductive semiconductor layer; and a second electrode formed on the graphene layer, wherein the metal nanoparticles are formed on some region of the graphene layer.
The light emitting diode according to claim 1, wherein the metal nanoparticles formed on the graphene layer occupy from 20% to 40% of a surface area of the graphene layer
The light emitting diode according to claim 1, wherein the some region of the graphene layer is formed with hole patterns periodically arranged at a constant pitch.
The light emitting diode according t o claim 1, wherein the metal nanoparticles comprise at l east one selected from among Au, Ag, Pt, Lu, Rh, Pd, I r and Os.
The light emitting diode according to claim 1, wherein the metal nanoparticles have a particle diameter of 50 nm to 300 nm.
The light emitting diode according to claim 1, wherein the compound semiconductor layer is nitride-based compound semiconductor layer.
A method of manufacturing a light emitting diode, comprising: 2 Attorney Docket: 32517U U.S App l. Ser. No. 13/679,353 Response to Restriction Requirement mailed forming a compound semiconductor l ayer including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer; forming a graphene layer on the second conductive semiconductor layer; fo rming a mask film having a pattern on the graphene layer; forming a metal layer within the pattern of the mask film, followed by removing the mask film; heat treating the metal layer to form a plurality of metal nanoparticles; and forming a first electrode on the first conductive semiconductor layer and a second electrode on the graphene la y la y er.
The method according to claim 7, wherein the heat treating is performed at a temperature of 500 C to 700 *C.
(Original) The method according to claim 7, wherein the forming a graphene layer on the second conductive semiconductor layer comprises transferring the graphene layer onto the second conductive semiconductor layer.
Layer stacks claimed or described, ordered top of device to substrate.
light emitting diode
Materials described outside the worked examples.
graphene layer
metal nanoparticles
compound semiconductor layer
Au nanoparticles
Au
Ag nanoparticles
Ag
Pt nanoparticles
Pt
Lu nanoparticles
Lu
Rh nanoparticles
Rh
Pd nanoparticles
Pd
Ir nanoparticles
Ir
Os nanoparticles
Os
nitride-based compound semiconductor layer
GaN-based compound semiconductor
n-type GaN layer
p-type GaN layer
InGaN/GaN multi-quantum well active layer
indium tin oxide (ITO) film
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Optical Transmittance | 90 % | graphene layer |
Thickness | 2–3 nm | — |
Thickness | 50–300 nm | — |
Thickness | 50–200 nm | — |
Related documents with shared materials, methods, properties, or citations.
SEMICONDUCTOR INTERCONNECT STRUCTURE HAVING A GRAPHENE-BASED BARRIER METAL LAYER
METHOD FOR PRODUCING CATALYTIC METAL LAYER AND METHOD FOR PRODUCING GRAPHENE MATERIAL
GRAPHENE FORMING METHOD
GRAPHENE FOAM BASED OPTICAL SENSOR FOR OIL EXPLORATION AND SPILLS DETECTION
GRAPHENE STRUCTURE AND METHOD FOR MANUFACTURING GRAPHENE HAVING WRINKLE PATTERN
SUBSTRATE PROCESSING FOR GaN GROWTH
METHOD FOR PREPARING THREE-DIMENSIONAL POROUS GRAPHENE MATERIAL
GRAPHENE/METAL MOLECULAR LEVEL LAMINATION (GMMLL)
Revealing the (111) surface electronic structure of epitaxially grown Na2KSb photocathode
Process for Preparing Graphene Based on Metal Film-Assisted Annealing and the Reaction with Cl2
Method of Growing Gallium Nitride-Based Crystal and Heat Treatment Apparatus
Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A light emitting diode comprising: a compound semiconductor layer including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer; a graphene layer formed on th e second conducti v e semiconductor layer; a plurality of metal nanoparticles formed on the graphene layer; a first electrode formed on the first conductive semiconductor layer; and a second electrode formed on the graphene layer, wherein the metal nanoparticles are formed on some region of the graphene layer.
The light emitting diode according to claim 1, wherein the metal nanoparticles formed on the graphene layer occupy from 20% to 40% of a surface area of the graphene layer
The light emitting diode according to claim 1, wherein the some region of the graphene layer is formed with hole patterns periodically arranged at a constant pitch.
The light emitting diode according t o claim 1, wherein the metal nanoparticles comprise at l east one selected from among Au, Ag, Pt, Lu, Rh, Pd, I r and Os.
The light emitting diode according to claim 1, wherein the metal nanoparticles have a particle diameter of 50 nm to 300 nm.
The light emitting diode according to claim 1, wherein the compound semiconductor layer is nitride-based compound semiconductor layer.
A method of manufacturing a light emitting diode, comprising: 2 Attorney Docket: 32517U U.S App l. Ser. No. 13/679,353 Response to Restriction Requirement mailed forming a compound semiconductor l ayer including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer; forming a graphene layer on the second conductive semiconductor layer; fo rming a mask film having a pattern on the graphene layer; forming a metal layer within the pattern of the mask film, followed by removing the mask film; heat treating the metal layer to form a plurality of metal nanoparticles; and forming a first electrode on the first conductive semiconductor layer and a second electrode on the graphene la y la y er.
The method according to claim 7, wherein the heat treating is performed at a temperature of 500 C to 700 *C.
(Original) The method according to claim 7, wherein the forming a graphene layer on the second conductive semiconductor layer comprises transferring the graphene layer onto the second conductive semiconductor layer.
Layer stacks claimed or described, ordered top of device to substrate.
light emitting diode
Materials described outside the worked examples.
graphene layer
metal nanoparticles
compound semiconductor layer
Au nanoparticles
Au
Ag nanoparticles
Ag
Pt nanoparticles
Pt
Lu nanoparticles
Lu
Rh nanoparticles
Rh
Pd nanoparticles
Pd
Ir nanoparticles
Ir
Os nanoparticles
Os
nitride-based compound semiconductor layer
GaN-based compound semiconductor
n-type GaN layer
p-type GaN layer
InGaN/GaN multi-quantum well active layer
indium tin oxide (ITO) film
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Optical Transmittance | 90 % | graphene layer |
Thickness | 2–3 nm | — |
Thickness | 50–300 nm | — |
Thickness | 50–200 nm | — |
Related documents with shared materials, methods, properties, or citations.
SEMICONDUCTOR INTERCONNECT STRUCTURE HAVING A GRAPHENE-BASED BARRIER METAL LAYER
METHOD FOR PRODUCING CATALYTIC METAL LAYER AND METHOD FOR PRODUCING GRAPHENE MATERIAL
GRAPHENE FORMING METHOD
GRAPHENE FOAM BASED OPTICAL SENSOR FOR OIL EXPLORATION AND SPILLS DETECTION
GRAPHENE STRUCTURE AND METHOD FOR MANUFACTURING GRAPHENE HAVING WRINKLE PATTERN
SUBSTRATE PROCESSING FOR GaN GROWTH
METHOD FOR PREPARING THREE-DIMENSIONAL POROUS GRAPHENE MATERIAL
GRAPHENE/METAL MOLECULAR LEVEL LAMINATION (GMMLL)
Revealing the (111) surface electronic structure of epitaxially grown Na2KSb photocathode
Process for Preparing Graphene Based on Metal Film-Assisted Annealing and the Reaction with Cl2
Method of Growing Gallium Nitride-Based Crystal and Heat Treatment Apparatus