Patent
US 10,094,045METHOD OF MANUFACTURING A GALLIUM NITRIDE SUBSTRATE
Mi-Hyun KIM
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
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US 10,094,045Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 1 to 6 are cross-sectional views illustrating stages of a method of manufacturing a GaN substrate in accordance with example embodiments. [17] Referring …
FIG. 2. [51] Referring to FIG 8, the capping layer 12 may be formed on the first surface 1 of the silicon substrate 10 to entirely co ver the first surface 1 of …
FIG. 3, the GaN substrate 16 may be f o rmed o n the buffer layer 14 by an epitaxial gr o wth process. In example embodiments, a diameter of the GaN substrate …
FIGS. 4 and 5, the capping layer 12 and the silic o n substrate 10 m ay be rem o ved. Thus, the buffer layer 14 may be exp o sed. [39] The rem o val pr o cess …
FIG. 6, the buffer layer 14 may be removed. [44] In example emb o diments, the buffer layer 14 may be removed by a grinding process or an etching process. In …
FIGS. 7 and 8 are cr o ss-sectional views illustrating stages of a method of manufacturing a GaN substrate in accordance with example embodiments. [48] …
FIGS. 9 to 13 are cross-sectional views illustrating stages of a method of manufacturing a GaN substrate in accordance with example e m bodi m ents; [13] FIG …
FIG. 10, the insulation layer 20 may be patterned by a photo process and an etching process to f o rm an insulation pattern 20a surrounding an upper edge …
FIG. 12, the capping layer 12 and the silicon substrate 1 0 may be removed. The removal process of the capping layer 12 and the silicon substrate 10 may be …
FIG. 15 is a photograph of a GaN substrate including failures according to a comparative example; and [15] FIG 16 is a photograph of a surface of a silicon …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of manufacturing a gallium nitride (GaN) substrate, the method comprising: forming a capping layer on a first surface of a silicon substrate; forming a buffer layer on a second surface of the silicon substrate, the second surface being opposite the first surface; forming a GaN substrate on the buffer layer by performing a hydride vapor phase epitaxy (HVPE) process; and removing the capping layer and the silicon substrate. Original
The method of claim 1, wherein the removing the capping layer removes the capping layer by a chlorine-based etching gas. Original
The method of claim 1, wherein the forming a capping layer forms the capping layer of at least one of titanium (Ti), zirconium (Zr), hafnium (Hf), molybdenum (Mo), manganese (Mn), nickel (Ni), copper (Cu), zinc (Zn), chromium (Cr), Gallium (G a), aluminum(A l), indium (In), and a nitride thereof. Original
The method of claim 1, wherein the forming a capping layer forms the capping layer by an atomic layer deposition (ALD) process, a sputtering process or a chemical vapor deposition (CVD) process. Original
The method of claim 1, wherein the forming a GaN substrate forms the GaN substrate at a temperature of about 950 *C to 1200 * C by performing the HVPE process. Original
The method of claim 1, wherein the removing the capping layer and the silicon substrate removes the capping layer and the silicon substrate by the same dry etching process using a chlorine-based etching gas. Original
The method of claim 1, wherein the removing the capping layer and the silicon substrate removes the capping layer and the silicon substrate in an HVPE reactor where the GaN substrate is formed. Original
The method of claim 1, wherein the forming a buffer layer forms the buffer layer of at least one of AI N, TaN, TiN, HfN, GaN and AlGaN. Original
The method of claim 1, wherein the forming a buffer layer forms the butter layer by a metal organic chemical vapor deposition (MOCVD) process or an HVPE process. Original
The method of claim 1, further comprising: forming an insulation pattern surrounding an edge surface of the buffer layer after the forming a buffer layer. Original
A method of manufacturing a GaN substrate, the method comprising: forming a capping layer on a first surface of a silicon substrate; forming a GaN substrate on a second surface of the silicon substrate, the second surface being opposite the first surface; and dry etching the capping layer and the silicon substrate. Original
The method of claim 12, wherein the forming a capping layer forms the capping layer of at least one of titanium (Ti), zirconium (Zr), hafnium (Hf), molybdenum (Mo), manganese (Mn), nickel (Ni), copper (Cu), zinc (Zn), chromium (Cr), Gallium (Ga), aluminum(Al), indium (In), and a nitride thereof. Original
The method of claim 12, wherein the dry etching the capping layer and the silicon substrate removes the capping layer and the silicon substrate in an HVPE reactor where the GaN substrate is formed. Currently amended
The method of claim 12, further comprising: forming a buffer layer on the second surface of the silicon substrate after or before the forming a capping layer. Original
A method of manufacturing a gallium nitride (GaN) substrate, the method comprising: forming a nitride blocking layer covering a first surface of a silicon substrate; forming a GaN substrate on a second surface of the silicon substrate, the second surface being opposite the first surface; and removing the nitride blocking layer together with the silicon substrate. Original
The method of claim 16, wherein the removing the nitride blocking layer together with the silicon substrate removes the nitride blocking layer and the silicon substrate by a dry etching process using a chlorine-based etching gas. Original
The method of claim 16, wherein the forming a nitride blocking layer forms the nitride blocking layer of at least one of titanium (Ti), zirconium (Zr), hafnium (Hf), molybdenum (Mo), manganese (Mn), nickel (Ni), copper (Cu), zinc (Zn), chromium (Cr), Gallium (Ga), aluminum(A), indium (In), and a nitride thereof. Original
The method of claim 16, wherein the forming a nitride blocking layer forms the nitride blocking layer by an atomic layer deposition (ALD) process, a sputtering process or a chemical vapor deposition (CVD) process. Original
The method of claim 16, wherein the forming a GaN substrate f orms the GaN substrate at a temperature of about 950 0C to 1200 0C by performing a HVPE process. Original
Materials described outside the worked examples.
capping layer/nitride blocking layer
silicon substrate
Si
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 15 is a photograph of a GaN substrate including failures according to a comparative example; and [15] FIG 16 is a photograph of a surface of a silicon …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
silicon substrate thickness | 100–1000 µm | Si |
silicon substrate diameter | 6–18 inches |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,094,045Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 1 to 6 are cross-sectional views illustrating stages of a method of manufacturing a GaN substrate in accordance with example embodiments. [17] Referring …
FIG. 2. [51] Referring to FIG 8, the capping layer 12 may be formed on the first surface 1 of the silicon substrate 10 to entirely co ver the first surface 1 of …
FIG. 3, the GaN substrate 16 may be f o rmed o n the buffer layer 14 by an epitaxial gr o wth process. In example embodiments, a diameter of the GaN substrate …
FIGS. 4 and 5, the capping layer 12 and the silic o n substrate 10 m ay be rem o ved. Thus, the buffer layer 14 may be exp o sed. [39] The rem o val pr o cess …
FIG. 6, the buffer layer 14 may be removed. [44] In example emb o diments, the buffer layer 14 may be removed by a grinding process or an etching process. In …
FIGS. 7 and 8 are cr o ss-sectional views illustrating stages of a method of manufacturing a GaN substrate in accordance with example embodiments. [48] …
FIGS. 9 to 13 are cross-sectional views illustrating stages of a method of manufacturing a GaN substrate in accordance with example e m bodi m ents; [13] FIG …
FIG. 10, the insulation layer 20 may be patterned by a photo process and an etching process to f o rm an insulation pattern 20a surrounding an upper edge …
FIG. 12, the capping layer 12 and the silicon substrate 1 0 may be removed. The removal process of the capping layer 12 and the silicon substrate 10 may be …
FIG. 15 is a photograph of a GaN substrate including failures according to a comparative example; and [15] FIG 16 is a photograph of a surface of a silicon …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of manufacturing a gallium nitride (GaN) substrate, the method comprising: forming a capping layer on a first surface of a silicon substrate; forming a buffer layer on a second surface of the silicon substrate, the second surface being opposite the first surface; forming a GaN substrate on the buffer layer by performing a hydride vapor phase epitaxy (HVPE) process; and removing the capping layer and the silicon substrate. Original
The method of claim 1, wherein the removing the capping layer removes the capping layer by a chlorine-based etching gas. Original
The method of claim 1, wherein the forming a capping layer forms the capping layer of at least one of titanium (Ti), zirconium (Zr), hafnium (Hf), molybdenum (Mo), manganese (Mn), nickel (Ni), copper (Cu), zinc (Zn), chromium (Cr), Gallium (G a), aluminum(A l), indium (In), and a nitride thereof. Original
The method of claim 1, wherein the forming a capping layer forms the capping layer by an atomic layer deposition (ALD) process, a sputtering process or a chemical vapor deposition (CVD) process. Original
The method of claim 1, wherein the forming a GaN substrate forms the GaN substrate at a temperature of about 950 *C to 1200 * C by performing the HVPE process. Original
The method of claim 1, wherein the removing the capping layer and the silicon substrate removes the capping layer and the silicon substrate by the same dry etching process using a chlorine-based etching gas. Original
The method of claim 1, wherein the removing the capping layer and the silicon substrate removes the capping layer and the silicon substrate in an HVPE reactor where the GaN substrate is formed. Original
The method of claim 1, wherein the forming a buffer layer forms the buffer layer of at least one of AI N, TaN, TiN, HfN, GaN and AlGaN. Original
The method of claim 1, wherein the forming a buffer layer forms the butter layer by a metal organic chemical vapor deposition (MOCVD) process or an HVPE process. Original
The method of claim 1, further comprising: forming an insulation pattern surrounding an edge surface of the buffer layer after the forming a buffer layer. Original
A method of manufacturing a GaN substrate, the method comprising: forming a capping layer on a first surface of a silicon substrate; forming a GaN substrate on a second surface of the silicon substrate, the second surface being opposite the first surface; and dry etching the capping layer and the silicon substrate. Original
The method of claim 12, wherein the forming a capping layer forms the capping layer of at least one of titanium (Ti), zirconium (Zr), hafnium (Hf), molybdenum (Mo), manganese (Mn), nickel (Ni), copper (Cu), zinc (Zn), chromium (Cr), Gallium (Ga), aluminum(Al), indium (In), and a nitride thereof. Original
The method of claim 12, wherein the dry etching the capping layer and the silicon substrate removes the capping layer and the silicon substrate in an HVPE reactor where the GaN substrate is formed. Currently amended
The method of claim 12, further comprising: forming a buffer layer on the second surface of the silicon substrate after or before the forming a capping layer. Original
A method of manufacturing a gallium nitride (GaN) substrate, the method comprising: forming a nitride blocking layer covering a first surface of a silicon substrate; forming a GaN substrate on a second surface of the silicon substrate, the second surface being opposite the first surface; and removing the nitride blocking layer together with the silicon substrate. Original
The method of claim 16, wherein the removing the nitride blocking layer together with the silicon substrate removes the nitride blocking layer and the silicon substrate by a dry etching process using a chlorine-based etching gas. Original
The method of claim 16, wherein the forming a nitride blocking layer forms the nitride blocking layer of at least one of titanium (Ti), zirconium (Zr), hafnium (Hf), molybdenum (Mo), manganese (Mn), nickel (Ni), copper (Cu), zinc (Zn), chromium (Cr), Gallium (Ga), aluminum(A), indium (In), and a nitride thereof. Original
The method of claim 16, wherein the forming a nitride blocking layer forms the nitride blocking layer by an atomic layer deposition (ALD) process, a sputtering process or a chemical vapor deposition (CVD) process. Original
The method of claim 16, wherein the forming a GaN substrate f orms the GaN substrate at a temperature of about 950 0C to 1200 0C by performing a HVPE process. Original
Materials described outside the worked examples.
capping layer/nitride blocking layer
silicon substrate
Si
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 15 is a photograph of a GaN substrate including failures according to a comparative example; and [15] FIG 16 is a photograph of a surface of a silicon …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
silicon substrate thickness | 100–1000 µm | Si |
silicon substrate diameter | 6–18 inches |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,094,045Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 1 to 6 are cross-sectional views illustrating stages of a method of manufacturing a GaN substrate in accordance with example embodiments. [17] Referring …
FIG. 2. [51] Referring to FIG 8, the capping layer 12 may be formed on the first surface 1 of the silicon substrate 10 to entirely co ver the first surface 1 of …
FIG. 3, the GaN substrate 16 may be f o rmed o n the buffer layer 14 by an epitaxial gr o wth process. In example embodiments, a diameter of the GaN substrate …
FIGS. 4 and 5, the capping layer 12 and the silic o n substrate 10 m ay be rem o ved. Thus, the buffer layer 14 may be exp o sed. [39] The rem o val pr o cess …
FIG. 6, the buffer layer 14 may be removed. [44] In example emb o diments, the buffer layer 14 may be removed by a grinding process or an etching process. In …
FIGS. 7 and 8 are cr o ss-sectional views illustrating stages of a method of manufacturing a GaN substrate in accordance with example embodiments. [48] …
FIGS. 9 to 13 are cross-sectional views illustrating stages of a method of manufacturing a GaN substrate in accordance with example e m bodi m ents; [13] FIG …
FIG. 10, the insulation layer 20 may be patterned by a photo process and an etching process to f o rm an insulation pattern 20a surrounding an upper edge …
FIG. 12, the capping layer 12 and the silicon substrate 1 0 may be removed. The removal process of the capping layer 12 and the silicon substrate 10 may be …
FIG. 15 is a photograph of a GaN substrate including failures according to a comparative example; and [15] FIG 16 is a photograph of a surface of a silicon …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of manufacturing a gallium nitride (GaN) substrate, the method comprising: forming a capping layer on a first surface of a silicon substrate; forming a buffer layer on a second surface of the silicon substrate, the second surface being opposite the first surface; forming a GaN substrate on the buffer layer by performing a hydride vapor phase epitaxy (HVPE) process; and removing the capping layer and the silicon substrate. Original
The method of claim 1, wherein the removing the capping layer removes the capping layer by a chlorine-based etching gas. Original
The method of claim 1, wherein the forming a capping layer forms the capping layer of at least one of titanium (Ti), zirconium (Zr), hafnium (Hf), molybdenum (Mo), manganese (Mn), nickel (Ni), copper (Cu), zinc (Zn), chromium (Cr), Gallium (G a), aluminum(A l), indium (In), and a nitride thereof. Original
The method of claim 1, wherein the forming a capping layer forms the capping layer by an atomic layer deposition (ALD) process, a sputtering process or a chemical vapor deposition (CVD) process. Original
The method of claim 1, wherein the forming a GaN substrate forms the GaN substrate at a temperature of about 950 *C to 1200 * C by performing the HVPE process. Original
The method of claim 1, wherein the removing the capping layer and the silicon substrate removes the capping layer and the silicon substrate by the same dry etching process using a chlorine-based etching gas. Original
The method of claim 1, wherein the removing the capping layer and the silicon substrate removes the capping layer and the silicon substrate in an HVPE reactor where the GaN substrate is formed. Original
The method of claim 1, wherein the forming a buffer layer forms the buffer layer of at least one of AI N, TaN, TiN, HfN, GaN and AlGaN. Original
The method of claim 1, wherein the forming a buffer layer forms the butter layer by a metal organic chemical vapor deposition (MOCVD) process or an HVPE process. Original
The method of claim 1, further comprising: forming an insulation pattern surrounding an edge surface of the buffer layer after the forming a buffer layer. Original
A method of manufacturing a GaN substrate, the method comprising: forming a capping layer on a first surface of a silicon substrate; forming a GaN substrate on a second surface of the silicon substrate, the second surface being opposite the first surface; and dry etching the capping layer and the silicon substrate. Original
The method of claim 12, wherein the forming a capping layer forms the capping layer of at least one of titanium (Ti), zirconium (Zr), hafnium (Hf), molybdenum (Mo), manganese (Mn), nickel (Ni), copper (Cu), zinc (Zn), chromium (Cr), Gallium (Ga), aluminum(Al), indium (In), and a nitride thereof. Original
The method of claim 12, wherein the dry etching the capping layer and the silicon substrate removes the capping layer and the silicon substrate in an HVPE reactor where the GaN substrate is formed. Currently amended
The method of claim 12, further comprising: forming a buffer layer on the second surface of the silicon substrate after or before the forming a capping layer. Original
A method of manufacturing a gallium nitride (GaN) substrate, the method comprising: forming a nitride blocking layer covering a first surface of a silicon substrate; forming a GaN substrate on a second surface of the silicon substrate, the second surface being opposite the first surface; and removing the nitride blocking layer together with the silicon substrate. Original
The method of claim 16, wherein the removing the nitride blocking layer together with the silicon substrate removes the nitride blocking layer and the silicon substrate by a dry etching process using a chlorine-based etching gas. Original
The method of claim 16, wherein the forming a nitride blocking layer forms the nitride blocking layer of at least one of titanium (Ti), zirconium (Zr), hafnium (Hf), molybdenum (Mo), manganese (Mn), nickel (Ni), copper (Cu), zinc (Zn), chromium (Cr), Gallium (Ga), aluminum(A), indium (In), and a nitride thereof. Original
The method of claim 16, wherein the forming a nitride blocking layer forms the nitride blocking layer by an atomic layer deposition (ALD) process, a sputtering process or a chemical vapor deposition (CVD) process. Original
The method of claim 16, wherein the forming a GaN substrate f orms the GaN substrate at a temperature of about 950 0C to 1200 0C by performing a HVPE process. Original
Materials described outside the worked examples.
capping layer/nitride blocking layer
silicon substrate
Si
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 15 is a photograph of a GaN substrate including failures according to a comparative example; and [15] FIG 16 is a photograph of a surface of a silicon …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
silicon substrate thickness | 100–1000 µm | Si |
silicon substrate diameter | 6–18 inches |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,094,045Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 1 to 6 are cross-sectional views illustrating stages of a method of manufacturing a GaN substrate in accordance with example embodiments. [17] Referring …
FIG. 2. [51] Referring to FIG 8, the capping layer 12 may be formed on the first surface 1 of the silicon substrate 10 to entirely co ver the first surface 1 of …
FIG. 3, the GaN substrate 16 may be f o rmed o n the buffer layer 14 by an epitaxial gr o wth process. In example embodiments, a diameter of the GaN substrate …
FIGS. 4 and 5, the capping layer 12 and the silic o n substrate 10 m ay be rem o ved. Thus, the buffer layer 14 may be exp o sed. [39] The rem o val pr o cess …
FIG. 6, the buffer layer 14 may be removed. [44] In example emb o diments, the buffer layer 14 may be removed by a grinding process or an etching process. In …
FIGS. 7 and 8 are cr o ss-sectional views illustrating stages of a method of manufacturing a GaN substrate in accordance with example embodiments. [48] …
FIGS. 9 to 13 are cross-sectional views illustrating stages of a method of manufacturing a GaN substrate in accordance with example e m bodi m ents; [13] FIG …
FIG. 10, the insulation layer 20 may be patterned by a photo process and an etching process to f o rm an insulation pattern 20a surrounding an upper edge …
FIG. 12, the capping layer 12 and the silicon substrate 1 0 may be removed. The removal process of the capping layer 12 and the silicon substrate 10 may be …
FIG. 15 is a photograph of a GaN substrate including failures according to a comparative example; and [15] FIG 16 is a photograph of a surface of a silicon …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of manufacturing a gallium nitride (GaN) substrate, the method comprising: forming a capping layer on a first surface of a silicon substrate; forming a buffer layer on a second surface of the silicon substrate, the second surface being opposite the first surface; forming a GaN substrate on the buffer layer by performing a hydride vapor phase epitaxy (HVPE) process; and removing the capping layer and the silicon substrate. Original
The method of claim 1, wherein the removing the capping layer removes the capping layer by a chlorine-based etching gas. Original
The method of claim 1, wherein the forming a capping layer forms the capping layer of at least one of titanium (Ti), zirconium (Zr), hafnium (Hf), molybdenum (Mo), manganese (Mn), nickel (Ni), copper (Cu), zinc (Zn), chromium (Cr), Gallium (G a), aluminum(A l), indium (In), and a nitride thereof. Original
The method of claim 1, wherein the forming a capping layer forms the capping layer by an atomic layer deposition (ALD) process, a sputtering process or a chemical vapor deposition (CVD) process. Original
The method of claim 1, wherein the forming a GaN substrate forms the GaN substrate at a temperature of about 950 *C to 1200 * C by performing the HVPE process. Original
The method of claim 1, wherein the removing the capping layer and the silicon substrate removes the capping layer and the silicon substrate by the same dry etching process using a chlorine-based etching gas. Original
The method of claim 1, wherein the removing the capping layer and the silicon substrate removes the capping layer and the silicon substrate in an HVPE reactor where the GaN substrate is formed. Original
The method of claim 1, wherein the forming a buffer layer forms the buffer layer of at least one of AI N, TaN, TiN, HfN, GaN and AlGaN. Original
The method of claim 1, wherein the forming a buffer layer forms the butter layer by a metal organic chemical vapor deposition (MOCVD) process or an HVPE process. Original
The method of claim 1, further comprising: forming an insulation pattern surrounding an edge surface of the buffer layer after the forming a buffer layer. Original
A method of manufacturing a GaN substrate, the method comprising: forming a capping layer on a first surface of a silicon substrate; forming a GaN substrate on a second surface of the silicon substrate, the second surface being opposite the first surface; and dry etching the capping layer and the silicon substrate. Original
The method of claim 12, wherein the forming a capping layer forms the capping layer of at least one of titanium (Ti), zirconium (Zr), hafnium (Hf), molybdenum (Mo), manganese (Mn), nickel (Ni), copper (Cu), zinc (Zn), chromium (Cr), Gallium (Ga), aluminum(Al), indium (In), and a nitride thereof. Original
The method of claim 12, wherein the dry etching the capping layer and the silicon substrate removes the capping layer and the silicon substrate in an HVPE reactor where the GaN substrate is formed. Currently amended
The method of claim 12, further comprising: forming a buffer layer on the second surface of the silicon substrate after or before the forming a capping layer. Original
A method of manufacturing a gallium nitride (GaN) substrate, the method comprising: forming a nitride blocking layer covering a first surface of a silicon substrate; forming a GaN substrate on a second surface of the silicon substrate, the second surface being opposite the first surface; and removing the nitride blocking layer together with the silicon substrate. Original
The method of claim 16, wherein the removing the nitride blocking layer together with the silicon substrate removes the nitride blocking layer and the silicon substrate by a dry etching process using a chlorine-based etching gas. Original
The method of claim 16, wherein the forming a nitride blocking layer forms the nitride blocking layer of at least one of titanium (Ti), zirconium (Zr), hafnium (Hf), molybdenum (Mo), manganese (Mn), nickel (Ni), copper (Cu), zinc (Zn), chromium (Cr), Gallium (Ga), aluminum(A), indium (In), and a nitride thereof. Original
The method of claim 16, wherein the forming a nitride blocking layer forms the nitride blocking layer by an atomic layer deposition (ALD) process, a sputtering process or a chemical vapor deposition (CVD) process. Original
The method of claim 16, wherein the forming a GaN substrate f orms the GaN substrate at a temperature of about 950 0C to 1200 0C by performing a HVPE process. Original
Materials described outside the worked examples.
capping layer/nitride blocking layer
silicon substrate
Si
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 15 is a photograph of a GaN substrate including failures according to a comparative example; and [15] FIG 16 is a photograph of a surface of a silicon …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
silicon substrate thickness | 100–1000 µm | Si |
silicon substrate diameter | 6–18 inches |
Related documents with shared materials, methods, properties, or citations.
gallium nitride substrate
GaN
capping layer metal or metal nitride
buffer layer
gallium chloride
GaCl
ammonia
NH₃
capping layer thickness | 0.1–100000 nm | capping layer/nitride blocking layer |
buffer layer thickness | 5–50 nm | buffer layer |
GaN substrate thickness | 5–100000 µm | GaN |
Thickness | ≤ 0.1 nm | — |
gallium nitride substrate
GaN
capping layer metal or metal nitride
buffer layer
gallium chloride
GaCl
ammonia
NH₃
capping layer thickness | 0.1–100000 nm | capping layer/nitride blocking layer |
buffer layer thickness | 5–50 nm | buffer layer |
GaN substrate thickness | 5–100000 µm | GaN |
Thickness | ≤ 0.1 nm | — |
gallium nitride substrate
GaN
capping layer metal or metal nitride
buffer layer
gallium chloride
GaCl
ammonia
NH₃
capping layer thickness | 0.1–100000 nm | capping layer/nitride blocking layer |
buffer layer thickness | 5–50 nm | buffer layer |
GaN substrate thickness | 5–100000 µm | GaN |
Thickness | ≤ 0.1 nm | — |
gallium nitride substrate
GaN
capping layer metal or metal nitride
buffer layer
gallium chloride
GaCl
ammonia
NH₃
capping layer thickness | 0.1–100000 nm | capping layer/nitride blocking layer |
buffer layer thickness | 5–50 nm | buffer layer |
GaN substrate thickness | 5–100000 µm | GaN |
Thickness | ≤ 0.1 nm | — |