Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is an exemplary three-dimensional cross-sectional diagram of a bandgap tuneable p-GaN high electron mobil- ity transistor (HEMT), according to certain …
FIG. 2 is an exemplary flowchart of a method of making a bandgap tuneable p-GaN HEMT, according to certain embodiments.
FIG. 3 is an exemplary graph illustrating drain current versus gate voltage characteristics of the bandgap tuneable p-GaN HEMT on a logarithmic scale for …
FIG. 4 is an exemplary graph illustrating current, transconductance, and its derivative profile for the bandgap tuneable p-GaN HEMT, according to certain …
FIG. 5 is an exemplary graph illustrating ID versus VDS plot representing gate sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 6 is an exemplary graph illustrating ID versus VGS plot representing drain sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 7 is an exemplary graph illustrating overall device temperature versus gate bias voltage for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 8 is an exemplary graph illustrating linearity assess- ment of output power profile versus gate bias voltage of the bandgap tuneable p-GaN HEMT, according …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A bandgap tuneable p-GaN high electron mobility transistor (HEMT), comprising: a silicon carbide (SiC) substrate; an indium nitride (InN) nucleation layer deposited on the SiC substrate, wherein the InN nucleation layer has a thickness of about 5 nanometers; an aluminum nitride (AlN) nucleation layer grown on the InN nucleation layer, wherein the AlN nucleation layer has a thickness of about 5 nanometers; a first aluminum gallium nitride (AlGaN) buffer layer located on the AlN nucleation layer; a gallium nitride (GaN) channel layer located on the first AlGaN buffer layer; an aluminum source contact located over a first end of the GaN channel layer; an aluminum drain contact located over a second end of the GaN channel layer; a two dimensional molybdenum disulfide (MoS₂) layer located over the GaN channel layer between the alu-minum source contact and the aluminum drain contact, wherein the two dimensional MoS₂ layer has a thick-ness of about 2 nanometers; a second aluminum gallium nitride (AlGaN) buffer layer located over the two dimensional MoS₂ layer between the aluminum source contact and the aluminum drain contact; a p-type gallium nitride cap layer located on the second AlGaN buffer layer at a distance of about 1 micron from the aluminum source contact and about 6 microns from the aluminum drain contact; and 55 a platinum gate contact located on the p-type gallium nitride cap layer.
The bandgap tuneable p-GaN HEMT of claim 1, wherein: the SiC substrate layer has a thickness of about 1.99 microns; the first AlGaN buffer layer has a thickness of about 2.64 microns and an aluminum composition of about 51%; the GaN channel layer has a thickness of about 34 nanometers; the aluminum source contact has a length of about 1 micron; the aluminum drain contact has a length of about 1 micron; the two dimensional MoS₂ layer has a length of about 0.65 microns; the second AlGaN buffer layer has a length of about 0.65 microns and a thickness of about 14.7 nanometers; the p-type gallium nitride cap layer has a length of about 1.4 microns and a thickness of about 60 nanometers; and the platinum gate contact has a length of about 1.4 microns.
A method of making a bandgap tuneable p-GaN high electron mobility transistor (HEMT), comprising: growing a silicon carbide (SiC) substrate layer to a thickness of about 1.99 microns; depositing, by DC reactive magnetron sputtering, an indium nitride (InN) nucleation layer on the SiC substrate to a thickness of about 5 nanometers; growing, by chemical vapor deposition, an aluminum nitride (AlN) nucleation layer on the InN nucleation layer to a thickness of about 5 nanometers; depositing a first aluminum gallium nitride (AlGaN) buffer layer on the AlN nucleation layer to a thickness of about 2.64 microns, wherein the first AlGaN layer has an aluminum composition of about 51%; depositing a gallium nitride (GaN) channel layer on the first AlGaN buffer layer to a thickness of about 34 nanometers; depositing an aluminum source contact over a first end of the GaN channel layer, wherein the aluminum source contact is configured to have a length of about 1 micron; depositing an aluminum drain contact over a second end of the GaN channel layer, wherein the aluminum drain contact is configured to have a length of about 1 micron; depositing a two dimensional molybdenum disulfide (MoS₂) layer over the GaN channel layer between the aluminum source contact and the aluminum drain con-tact to a thickness of about 2 nanometers, and config-uring a length of the two dimensional MoS₂ layer to be about 0.65 microns; depositing a second AlGaN buffer layer located over the two dimensional MoS₂ layer between the aluminum source contact and the aluminum drain contact, wherein the second AlGaN buffer layer is configured to have a length of about 0.65 microns and a thickness of about 14.7 nanometers; depositing a p-type gallium nitride cap layer on the second AlGaN buffer layer at a distance of about 1 micron from the aluminum source contact and about 6 microns from the aluminum drain contact, wherein the p-type gallium nitride cap layer is configured to have a length of about 1.4 microns and a thickness of about nanometers; doping the p-type gallium nitride cap layer to a doping concentration of 1016/cm⁻³; and depositing a platinum gate contact on the p-type gallium nitride cap layer.
The method of claim 18, further comprising: connecting an input voltage source to the aluminum source contact; connecting a gate bias voltage source to the platinum gate contact; connecting an output terminal to the aluminum drain contact; applying an input voltage in a range of about 4 V to about 8 V to the aluminum source contact; applying a gate bias to the platinum gate contact in a range of about 4 V to about 10 V; and generating a peak saturation drain current ID in a range of about 0.49 A to about 0.73 A at the aluminum drain contact.
The method of claim 18, further comprising: depositing the two dimensional MoS₂ layer in a first MoS₂ layer having a thickness of about 1 nanometer and a second MoS₂ layer having a thickness of about 1 nanometer. ∗ ∗ ∗ ∗ ∗
Layer stacks claimed or described, ordered top of device to substrate.
bandgap tuneable p-GaN high electron mobility transistor (HEMT)
Materials described outside the worked examples.
silicon carbide substrate
SiC
indium nitride nucleation layer
InN
aluminum nitride nucleation layer
AlN
gallium nitride channel layer
GaN
two dimensional molybdenum disulfide layer
MoS₂
first aluminum gallium nitride buffer layer
AlGaN
p-type gallium nitride cap layer
p-GaN
platinum gate contact
Pt
aluminum source contact
Al
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 is an exemplary three-dimensional cross-sectional diagram of a bandgap tuneable p-GaN high electron mobil- ity transistor (HEMT), according to certain …
FIG. 1 is an exemplary three-dimensional cross-sectional diagram of a bandgap tuneable p-GaN high electron mobil- ity transistor (HEMT), according to certain …
FIG. 2 is an exemplary flowchart of a method of making a bandgap tuneable p-GaN HEMT, according to certain embodiments.
FIG. 3 is an exemplary graph illustrating drain current versus gate voltage characteristics of the bandgap tuneable p-GaN HEMT on a logarithmic scale for …
FIG. 3 is an exemplary graph illustrating drain current versus gate voltage characteristics of the bandgap tuneable p-GaN HEMT on a logarithmic scale for …
FIG. 3 is an exemplary graph illustrating drain current versus gate voltage characteristics of the bandgap tuneable p-GaN HEMT on a logarithmic scale for …
FIG. 4 is an exemplary graph illustrating current, transconductance, and its derivative profile for the bandgap tuneable p-GaN HEMT, according to certain …
FIG. 4 is an exemplary graph illustrating current, transconductance, and its derivative profile for the bandgap tuneable p-GaN HEMT, according to certain …
FIG. 4 is an exemplary graph illustrating current, transconductance, and its derivative profile for the bandgap tuneable p-GaN HEMT, according to certain …
FIG. 5 is an exemplary graph illustrating ID versus VDS plot representing gate sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 5 is an exemplary graph illustrating ID versus VDS plot representing gate sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 6 is an exemplary graph illustrating ID versus VGS plot representing drain sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 6 is an exemplary graph illustrating ID versus VGS plot representing drain sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 7 is an exemplary graph illustrating overall device temperature versus gate bias voltage for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 7 is an exemplary graph illustrating overall device temperature versus gate bias voltage for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 7 is an exemplary graph illustrating overall device temperature versus gate bias voltage for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 8 is an exemplary graph illustrating linearity assess- ment of output power profile versus gate bias voltage of the bandgap tuneable p-GaN HEMT, according …
FIG. 8 is an exemplary graph illustrating linearity assess- ment of output power profile versus gate bias voltage of the bandgap tuneable p-GaN HEMT, according …
FIG. 8 is an exemplary graph illustrating linearity assess- ment of output power profile versus gate bias voltage of the bandgap tuneable p-GaN HEMT, according …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Fet Mobility | 800–2000 | GaN |
Fet Threshold Voltage | 0.85 | — |
Fet On Off Ratio | — | — |
ON resistance | 20.18 | — |
Device Output Power | 7.3 | — |
Device Max Temperature | 369 | — |
Device Gate Reliability Voltage | 0–81.6 | — |
Device Drain Sustainability Voltage | 0–131 | — |
Voltage | 4–8 V | — |
Voltage | 4–10 V | — |
Voltage | 0–81.6 V | — |
Voltage | 0–131 V | — |
— | 5–7.2 W | — |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 5
Cited non-patent literature · 1
Related documents with shared materials, methods, properties, or citations.
GRAPHENE SUBSTITUTED WITH BORON AND NITROGEN, METHOD OF FABRICATING THE SAME, AND TRANSISTOR HAVING THE SAME
GALLIUM NITRIDE TRANSISTOR
III-NITRIDE MICRO-LEDS ON SEMI-POLAR ORIENTED GAN
GALLIUM NITRIDE TRANSISTOR
Systems and Methods for Perforation and Ohmic Contact Formation For GaN Epitaxial Lift-Off Using An Etch Stop Layer
CIRCUIT INCLUDING A NEGATIVE DIFFERENTIAL RESISTANCE (NDR) DEVICE HAVING A GRAPHENE CHANNEL, AND METHOD OF OPERATING THE CIRUCIT
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is an exemplary three-dimensional cross-sectional diagram of a bandgap tuneable p-GaN high electron mobil- ity transistor (HEMT), according to certain …
FIG. 2 is an exemplary flowchart of a method of making a bandgap tuneable p-GaN HEMT, according to certain embodiments.
FIG. 3 is an exemplary graph illustrating drain current versus gate voltage characteristics of the bandgap tuneable p-GaN HEMT on a logarithmic scale for …
FIG. 4 is an exemplary graph illustrating current, transconductance, and its derivative profile for the bandgap tuneable p-GaN HEMT, according to certain …
FIG. 5 is an exemplary graph illustrating ID versus VDS plot representing gate sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 6 is an exemplary graph illustrating ID versus VGS plot representing drain sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 7 is an exemplary graph illustrating overall device temperature versus gate bias voltage for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 8 is an exemplary graph illustrating linearity assess- ment of output power profile versus gate bias voltage of the bandgap tuneable p-GaN HEMT, according …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A bandgap tuneable p-GaN high electron mobility transistor (HEMT), comprising: a silicon carbide (SiC) substrate; an indium nitride (InN) nucleation layer deposited on the SiC substrate, wherein the InN nucleation layer has a thickness of about 5 nanometers; an aluminum nitride (AlN) nucleation layer grown on the InN nucleation layer, wherein the AlN nucleation layer has a thickness of about 5 nanometers; a first aluminum gallium nitride (AlGaN) buffer layer located on the AlN nucleation layer; a gallium nitride (GaN) channel layer located on the first AlGaN buffer layer; an aluminum source contact located over a first end of the GaN channel layer; an aluminum drain contact located over a second end of the GaN channel layer; a two dimensional molybdenum disulfide (MoS₂) layer located over the GaN channel layer between the alu-minum source contact and the aluminum drain contact, wherein the two dimensional MoS₂ layer has a thick-ness of about 2 nanometers; a second aluminum gallium nitride (AlGaN) buffer layer located over the two dimensional MoS₂ layer between the aluminum source contact and the aluminum drain contact; a p-type gallium nitride cap layer located on the second AlGaN buffer layer at a distance of about 1 micron from the aluminum source contact and about 6 microns from the aluminum drain contact; and 55 a platinum gate contact located on the p-type gallium nitride cap layer.
The bandgap tuneable p-GaN HEMT of claim 1, wherein: the SiC substrate layer has a thickness of about 1.99 microns; the first AlGaN buffer layer has a thickness of about 2.64 microns and an aluminum composition of about 51%; the GaN channel layer has a thickness of about 34 nanometers; the aluminum source contact has a length of about 1 micron; the aluminum drain contact has a length of about 1 micron; the two dimensional MoS₂ layer has a length of about 0.65 microns; the second AlGaN buffer layer has a length of about 0.65 microns and a thickness of about 14.7 nanometers; the p-type gallium nitride cap layer has a length of about 1.4 microns and a thickness of about 60 nanometers; and the platinum gate contact has a length of about 1.4 microns.
A method of making a bandgap tuneable p-GaN high electron mobility transistor (HEMT), comprising: growing a silicon carbide (SiC) substrate layer to a thickness of about 1.99 microns; depositing, by DC reactive magnetron sputtering, an indium nitride (InN) nucleation layer on the SiC substrate to a thickness of about 5 nanometers; growing, by chemical vapor deposition, an aluminum nitride (AlN) nucleation layer on the InN nucleation layer to a thickness of about 5 nanometers; depositing a first aluminum gallium nitride (AlGaN) buffer layer on the AlN nucleation layer to a thickness of about 2.64 microns, wherein the first AlGaN layer has an aluminum composition of about 51%; depositing a gallium nitride (GaN) channel layer on the first AlGaN buffer layer to a thickness of about 34 nanometers; depositing an aluminum source contact over a first end of the GaN channel layer, wherein the aluminum source contact is configured to have a length of about 1 micron; depositing an aluminum drain contact over a second end of the GaN channel layer, wherein the aluminum drain contact is configured to have a length of about 1 micron; depositing a two dimensional molybdenum disulfide (MoS₂) layer over the GaN channel layer between the aluminum source contact and the aluminum drain con-tact to a thickness of about 2 nanometers, and config-uring a length of the two dimensional MoS₂ layer to be about 0.65 microns; depositing a second AlGaN buffer layer located over the two dimensional MoS₂ layer between the aluminum source contact and the aluminum drain contact, wherein the second AlGaN buffer layer is configured to have a length of about 0.65 microns and a thickness of about 14.7 nanometers; depositing a p-type gallium nitride cap layer on the second AlGaN buffer layer at a distance of about 1 micron from the aluminum source contact and about 6 microns from the aluminum drain contact, wherein the p-type gallium nitride cap layer is configured to have a length of about 1.4 microns and a thickness of about nanometers; doping the p-type gallium nitride cap layer to a doping concentration of 1016/cm⁻³; and depositing a platinum gate contact on the p-type gallium nitride cap layer.
The method of claim 18, further comprising: connecting an input voltage source to the aluminum source contact; connecting a gate bias voltage source to the platinum gate contact; connecting an output terminal to the aluminum drain contact; applying an input voltage in a range of about 4 V to about 8 V to the aluminum source contact; applying a gate bias to the platinum gate contact in a range of about 4 V to about 10 V; and generating a peak saturation drain current ID in a range of about 0.49 A to about 0.73 A at the aluminum drain contact.
The method of claim 18, further comprising: depositing the two dimensional MoS₂ layer in a first MoS₂ layer having a thickness of about 1 nanometer and a second MoS₂ layer having a thickness of about 1 nanometer. ∗ ∗ ∗ ∗ ∗
Layer stacks claimed or described, ordered top of device to substrate.
bandgap tuneable p-GaN high electron mobility transistor (HEMT)
Materials described outside the worked examples.
silicon carbide substrate
SiC
indium nitride nucleation layer
InN
aluminum nitride nucleation layer
AlN
gallium nitride channel layer
GaN
two dimensional molybdenum disulfide layer
MoS₂
first aluminum gallium nitride buffer layer
AlGaN
p-type gallium nitride cap layer
p-GaN
platinum gate contact
Pt
aluminum source contact
Al
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 is an exemplary three-dimensional cross-sectional diagram of a bandgap tuneable p-GaN high electron mobil- ity transistor (HEMT), according to certain …
FIG. 1 is an exemplary three-dimensional cross-sectional diagram of a bandgap tuneable p-GaN high electron mobil- ity transistor (HEMT), according to certain …
FIG. 2 is an exemplary flowchart of a method of making a bandgap tuneable p-GaN HEMT, according to certain embodiments.
FIG. 3 is an exemplary graph illustrating drain current versus gate voltage characteristics of the bandgap tuneable p-GaN HEMT on a logarithmic scale for …
FIG. 3 is an exemplary graph illustrating drain current versus gate voltage characteristics of the bandgap tuneable p-GaN HEMT on a logarithmic scale for …
FIG. 3 is an exemplary graph illustrating drain current versus gate voltage characteristics of the bandgap tuneable p-GaN HEMT on a logarithmic scale for …
FIG. 4 is an exemplary graph illustrating current, transconductance, and its derivative profile for the bandgap tuneable p-GaN HEMT, according to certain …
FIG. 4 is an exemplary graph illustrating current, transconductance, and its derivative profile for the bandgap tuneable p-GaN HEMT, according to certain …
FIG. 4 is an exemplary graph illustrating current, transconductance, and its derivative profile for the bandgap tuneable p-GaN HEMT, according to certain …
FIG. 5 is an exemplary graph illustrating ID versus VDS plot representing gate sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 5 is an exemplary graph illustrating ID versus VDS plot representing gate sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 6 is an exemplary graph illustrating ID versus VGS plot representing drain sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 6 is an exemplary graph illustrating ID versus VGS plot representing drain sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 7 is an exemplary graph illustrating overall device temperature versus gate bias voltage for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 7 is an exemplary graph illustrating overall device temperature versus gate bias voltage for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 7 is an exemplary graph illustrating overall device temperature versus gate bias voltage for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 8 is an exemplary graph illustrating linearity assess- ment of output power profile versus gate bias voltage of the bandgap tuneable p-GaN HEMT, according …
FIG. 8 is an exemplary graph illustrating linearity assess- ment of output power profile versus gate bias voltage of the bandgap tuneable p-GaN HEMT, according …
FIG. 8 is an exemplary graph illustrating linearity assess- ment of output power profile versus gate bias voltage of the bandgap tuneable p-GaN HEMT, according …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Fet Mobility | 800–2000 | GaN |
Fet Threshold Voltage | 0.85 | — |
Fet On Off Ratio | — | — |
ON resistance | 20.18 | — |
Device Output Power | 7.3 | — |
Device Max Temperature | 369 | — |
Device Gate Reliability Voltage | 0–81.6 | — |
Device Drain Sustainability Voltage | 0–131 | — |
Voltage | 4–8 V | — |
Voltage | 4–10 V | — |
Voltage | 0–81.6 V | — |
Voltage | 0–131 V | — |
— | 5–7.2 W | — |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 5
Cited non-patent literature · 1
Related documents with shared materials, methods, properties, or citations.
GRAPHENE SUBSTITUTED WITH BORON AND NITROGEN, METHOD OF FABRICATING THE SAME, AND TRANSISTOR HAVING THE SAME
GALLIUM NITRIDE TRANSISTOR
III-NITRIDE MICRO-LEDS ON SEMI-POLAR ORIENTED GAN
GALLIUM NITRIDE TRANSISTOR
Systems and Methods for Perforation and Ohmic Contact Formation For GaN Epitaxial Lift-Off Using An Etch Stop Layer
CIRCUIT INCLUDING A NEGATIVE DIFFERENTIAL RESISTANCE (NDR) DEVICE HAVING A GRAPHENE CHANNEL, AND METHOD OF OPERATING THE CIRUCIT
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is an exemplary three-dimensional cross-sectional diagram of a bandgap tuneable p-GaN high electron mobil- ity transistor (HEMT), according to certain …
FIG. 2 is an exemplary flowchart of a method of making a bandgap tuneable p-GaN HEMT, according to certain embodiments.
FIG. 3 is an exemplary graph illustrating drain current versus gate voltage characteristics of the bandgap tuneable p-GaN HEMT on a logarithmic scale for …
FIG. 4 is an exemplary graph illustrating current, transconductance, and its derivative profile for the bandgap tuneable p-GaN HEMT, according to certain …
FIG. 5 is an exemplary graph illustrating ID versus VDS plot representing gate sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 6 is an exemplary graph illustrating ID versus VGS plot representing drain sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 7 is an exemplary graph illustrating overall device temperature versus gate bias voltage for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 8 is an exemplary graph illustrating linearity assess- ment of output power profile versus gate bias voltage of the bandgap tuneable p-GaN HEMT, according …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A bandgap tuneable p-GaN high electron mobility transistor (HEMT), comprising: a silicon carbide (SiC) substrate; an indium nitride (InN) nucleation layer deposited on the SiC substrate, wherein the InN nucleation layer has a thickness of about 5 nanometers; an aluminum nitride (AlN) nucleation layer grown on the InN nucleation layer, wherein the AlN nucleation layer has a thickness of about 5 nanometers; a first aluminum gallium nitride (AlGaN) buffer layer located on the AlN nucleation layer; a gallium nitride (GaN) channel layer located on the first AlGaN buffer layer; an aluminum source contact located over a first end of the GaN channel layer; an aluminum drain contact located over a second end of the GaN channel layer; a two dimensional molybdenum disulfide (MoS₂) layer located over the GaN channel layer between the alu-minum source contact and the aluminum drain contact, wherein the two dimensional MoS₂ layer has a thick-ness of about 2 nanometers; a second aluminum gallium nitride (AlGaN) buffer layer located over the two dimensional MoS₂ layer between the aluminum source contact and the aluminum drain contact; a p-type gallium nitride cap layer located on the second AlGaN buffer layer at a distance of about 1 micron from the aluminum source contact and about 6 microns from the aluminum drain contact; and 55 a platinum gate contact located on the p-type gallium nitride cap layer.
The bandgap tuneable p-GaN HEMT of claim 1, wherein: the SiC substrate layer has a thickness of about 1.99 microns; the first AlGaN buffer layer has a thickness of about 2.64 microns and an aluminum composition of about 51%; the GaN channel layer has a thickness of about 34 nanometers; the aluminum source contact has a length of about 1 micron; the aluminum drain contact has a length of about 1 micron; the two dimensional MoS₂ layer has a length of about 0.65 microns; the second AlGaN buffer layer has a length of about 0.65 microns and a thickness of about 14.7 nanometers; the p-type gallium nitride cap layer has a length of about 1.4 microns and a thickness of about 60 nanometers; and the platinum gate contact has a length of about 1.4 microns.
A method of making a bandgap tuneable p-GaN high electron mobility transistor (HEMT), comprising: growing a silicon carbide (SiC) substrate layer to a thickness of about 1.99 microns; depositing, by DC reactive magnetron sputtering, an indium nitride (InN) nucleation layer on the SiC substrate to a thickness of about 5 nanometers; growing, by chemical vapor deposition, an aluminum nitride (AlN) nucleation layer on the InN nucleation layer to a thickness of about 5 nanometers; depositing a first aluminum gallium nitride (AlGaN) buffer layer on the AlN nucleation layer to a thickness of about 2.64 microns, wherein the first AlGaN layer has an aluminum composition of about 51%; depositing a gallium nitride (GaN) channel layer on the first AlGaN buffer layer to a thickness of about 34 nanometers; depositing an aluminum source contact over a first end of the GaN channel layer, wherein the aluminum source contact is configured to have a length of about 1 micron; depositing an aluminum drain contact over a second end of the GaN channel layer, wherein the aluminum drain contact is configured to have a length of about 1 micron; depositing a two dimensional molybdenum disulfide (MoS₂) layer over the GaN channel layer between the aluminum source contact and the aluminum drain con-tact to a thickness of about 2 nanometers, and config-uring a length of the two dimensional MoS₂ layer to be about 0.65 microns; depositing a second AlGaN buffer layer located over the two dimensional MoS₂ layer between the aluminum source contact and the aluminum drain contact, wherein the second AlGaN buffer layer is configured to have a length of about 0.65 microns and a thickness of about 14.7 nanometers; depositing a p-type gallium nitride cap layer on the second AlGaN buffer layer at a distance of about 1 micron from the aluminum source contact and about 6 microns from the aluminum drain contact, wherein the p-type gallium nitride cap layer is configured to have a length of about 1.4 microns and a thickness of about nanometers; doping the p-type gallium nitride cap layer to a doping concentration of 1016/cm⁻³; and depositing a platinum gate contact on the p-type gallium nitride cap layer.
The method of claim 18, further comprising: connecting an input voltage source to the aluminum source contact; connecting a gate bias voltage source to the platinum gate contact; connecting an output terminal to the aluminum drain contact; applying an input voltage in a range of about 4 V to about 8 V to the aluminum source contact; applying a gate bias to the platinum gate contact in a range of about 4 V to about 10 V; and generating a peak saturation drain current ID in a range of about 0.49 A to about 0.73 A at the aluminum drain contact.
The method of claim 18, further comprising: depositing the two dimensional MoS₂ layer in a first MoS₂ layer having a thickness of about 1 nanometer and a second MoS₂ layer having a thickness of about 1 nanometer. ∗ ∗ ∗ ∗ ∗
Layer stacks claimed or described, ordered top of device to substrate.
bandgap tuneable p-GaN high electron mobility transistor (HEMT)
Materials described outside the worked examples.
silicon carbide substrate
SiC
indium nitride nucleation layer
InN
aluminum nitride nucleation layer
AlN
gallium nitride channel layer
GaN
two dimensional molybdenum disulfide layer
MoS₂
first aluminum gallium nitride buffer layer
AlGaN
p-type gallium nitride cap layer
p-GaN
platinum gate contact
Pt
aluminum source contact
Al
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 is an exemplary three-dimensional cross-sectional diagram of a bandgap tuneable p-GaN high electron mobil- ity transistor (HEMT), according to certain …
FIG. 1 is an exemplary three-dimensional cross-sectional diagram of a bandgap tuneable p-GaN high electron mobil- ity transistor (HEMT), according to certain …
FIG. 2 is an exemplary flowchart of a method of making a bandgap tuneable p-GaN HEMT, according to certain embodiments.
FIG. 3 is an exemplary graph illustrating drain current versus gate voltage characteristics of the bandgap tuneable p-GaN HEMT on a logarithmic scale for …
FIG. 3 is an exemplary graph illustrating drain current versus gate voltage characteristics of the bandgap tuneable p-GaN HEMT on a logarithmic scale for …
FIG. 3 is an exemplary graph illustrating drain current versus gate voltage characteristics of the bandgap tuneable p-GaN HEMT on a logarithmic scale for …
FIG. 4 is an exemplary graph illustrating current, transconductance, and its derivative profile for the bandgap tuneable p-GaN HEMT, according to certain …
FIG. 4 is an exemplary graph illustrating current, transconductance, and its derivative profile for the bandgap tuneable p-GaN HEMT, according to certain …
FIG. 4 is an exemplary graph illustrating current, transconductance, and its derivative profile for the bandgap tuneable p-GaN HEMT, according to certain …
FIG. 5 is an exemplary graph illustrating ID versus VDS plot representing gate sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 5 is an exemplary graph illustrating ID versus VDS plot representing gate sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 6 is an exemplary graph illustrating ID versus VGS plot representing drain sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 6 is an exemplary graph illustrating ID versus VGS plot representing drain sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 7 is an exemplary graph illustrating overall device temperature versus gate bias voltage for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 7 is an exemplary graph illustrating overall device temperature versus gate bias voltage for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 7 is an exemplary graph illustrating overall device temperature versus gate bias voltage for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 8 is an exemplary graph illustrating linearity assess- ment of output power profile versus gate bias voltage of the bandgap tuneable p-GaN HEMT, according …
FIG. 8 is an exemplary graph illustrating linearity assess- ment of output power profile versus gate bias voltage of the bandgap tuneable p-GaN HEMT, according …
FIG. 8 is an exemplary graph illustrating linearity assess- ment of output power profile versus gate bias voltage of the bandgap tuneable p-GaN HEMT, according …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Fet Mobility | 800–2000 | GaN |
Fet Threshold Voltage | 0.85 | — |
Fet On Off Ratio | — | — |
ON resistance | 20.18 | — |
Device Output Power | 7.3 | — |
Device Max Temperature | 369 | — |
Device Gate Reliability Voltage | 0–81.6 | — |
Device Drain Sustainability Voltage | 0–131 | — |
Voltage | 4–8 V | — |
Voltage | 4–10 V | — |
Voltage | 0–81.6 V | — |
Voltage | 0–131 V | — |
— | 5–7.2 W | — |
Patents and literature cited by this patent (applicant and examiner references).
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Cited non-patent literature · 1
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Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is an exemplary three-dimensional cross-sectional diagram of a bandgap tuneable p-GaN high electron mobil- ity transistor (HEMT), according to certain …
FIG. 2 is an exemplary flowchart of a method of making a bandgap tuneable p-GaN HEMT, according to certain embodiments.
FIG. 3 is an exemplary graph illustrating drain current versus gate voltage characteristics of the bandgap tuneable p-GaN HEMT on a logarithmic scale for …
FIG. 4 is an exemplary graph illustrating current, transconductance, and its derivative profile for the bandgap tuneable p-GaN HEMT, according to certain …
FIG. 5 is an exemplary graph illustrating ID versus VDS plot representing gate sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 6 is an exemplary graph illustrating ID versus VGS plot representing drain sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 7 is an exemplary graph illustrating overall device temperature versus gate bias voltage for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 8 is an exemplary graph illustrating linearity assess- ment of output power profile versus gate bias voltage of the bandgap tuneable p-GaN HEMT, according …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A bandgap tuneable p-GaN high electron mobility transistor (HEMT), comprising: a silicon carbide (SiC) substrate; an indium nitride (InN) nucleation layer deposited on the SiC substrate, wherein the InN nucleation layer has a thickness of about 5 nanometers; an aluminum nitride (AlN) nucleation layer grown on the InN nucleation layer, wherein the AlN nucleation layer has a thickness of about 5 nanometers; a first aluminum gallium nitride (AlGaN) buffer layer located on the AlN nucleation layer; a gallium nitride (GaN) channel layer located on the first AlGaN buffer layer; an aluminum source contact located over a first end of the GaN channel layer; an aluminum drain contact located over a second end of the GaN channel layer; a two dimensional molybdenum disulfide (MoS₂) layer located over the GaN channel layer between the alu-minum source contact and the aluminum drain contact, wherein the two dimensional MoS₂ layer has a thick-ness of about 2 nanometers; a second aluminum gallium nitride (AlGaN) buffer layer located over the two dimensional MoS₂ layer between the aluminum source contact and the aluminum drain contact; a p-type gallium nitride cap layer located on the second AlGaN buffer layer at a distance of about 1 micron from the aluminum source contact and about 6 microns from the aluminum drain contact; and 55 a platinum gate contact located on the p-type gallium nitride cap layer.
The bandgap tuneable p-GaN HEMT of claim 1, wherein: the SiC substrate layer has a thickness of about 1.99 microns; the first AlGaN buffer layer has a thickness of about 2.64 microns and an aluminum composition of about 51%; the GaN channel layer has a thickness of about 34 nanometers; the aluminum source contact has a length of about 1 micron; the aluminum drain contact has a length of about 1 micron; the two dimensional MoS₂ layer has a length of about 0.65 microns; the second AlGaN buffer layer has a length of about 0.65 microns and a thickness of about 14.7 nanometers; the p-type gallium nitride cap layer has a length of about 1.4 microns and a thickness of about 60 nanometers; and the platinum gate contact has a length of about 1.4 microns.
A method of making a bandgap tuneable p-GaN high electron mobility transistor (HEMT), comprising: growing a silicon carbide (SiC) substrate layer to a thickness of about 1.99 microns; depositing, by DC reactive magnetron sputtering, an indium nitride (InN) nucleation layer on the SiC substrate to a thickness of about 5 nanometers; growing, by chemical vapor deposition, an aluminum nitride (AlN) nucleation layer on the InN nucleation layer to a thickness of about 5 nanometers; depositing a first aluminum gallium nitride (AlGaN) buffer layer on the AlN nucleation layer to a thickness of about 2.64 microns, wherein the first AlGaN layer has an aluminum composition of about 51%; depositing a gallium nitride (GaN) channel layer on the first AlGaN buffer layer to a thickness of about 34 nanometers; depositing an aluminum source contact over a first end of the GaN channel layer, wherein the aluminum source contact is configured to have a length of about 1 micron; depositing an aluminum drain contact over a second end of the GaN channel layer, wherein the aluminum drain contact is configured to have a length of about 1 micron; depositing a two dimensional molybdenum disulfide (MoS₂) layer over the GaN channel layer between the aluminum source contact and the aluminum drain con-tact to a thickness of about 2 nanometers, and config-uring a length of the two dimensional MoS₂ layer to be about 0.65 microns; depositing a second AlGaN buffer layer located over the two dimensional MoS₂ layer between the aluminum source contact and the aluminum drain contact, wherein the second AlGaN buffer layer is configured to have a length of about 0.65 microns and a thickness of about 14.7 nanometers; depositing a p-type gallium nitride cap layer on the second AlGaN buffer layer at a distance of about 1 micron from the aluminum source contact and about 6 microns from the aluminum drain contact, wherein the p-type gallium nitride cap layer is configured to have a length of about 1.4 microns and a thickness of about nanometers; doping the p-type gallium nitride cap layer to a doping concentration of 1016/cm⁻³; and depositing a platinum gate contact on the p-type gallium nitride cap layer.
The method of claim 18, further comprising: connecting an input voltage source to the aluminum source contact; connecting a gate bias voltage source to the platinum gate contact; connecting an output terminal to the aluminum drain contact; applying an input voltage in a range of about 4 V to about 8 V to the aluminum source contact; applying a gate bias to the platinum gate contact in a range of about 4 V to about 10 V; and generating a peak saturation drain current ID in a range of about 0.49 A to about 0.73 A at the aluminum drain contact.
The method of claim 18, further comprising: depositing the two dimensional MoS₂ layer in a first MoS₂ layer having a thickness of about 1 nanometer and a second MoS₂ layer having a thickness of about 1 nanometer. ∗ ∗ ∗ ∗ ∗
Layer stacks claimed or described, ordered top of device to substrate.
bandgap tuneable p-GaN high electron mobility transistor (HEMT)
Materials described outside the worked examples.
silicon carbide substrate
SiC
indium nitride nucleation layer
InN
aluminum nitride nucleation layer
AlN
gallium nitride channel layer
GaN
two dimensional molybdenum disulfide layer
MoS₂
first aluminum gallium nitride buffer layer
AlGaN
p-type gallium nitride cap layer
p-GaN
platinum gate contact
Pt
aluminum source contact
Al
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 is an exemplary three-dimensional cross-sectional diagram of a bandgap tuneable p-GaN high electron mobil- ity transistor (HEMT), according to certain …
FIG. 1 is an exemplary three-dimensional cross-sectional diagram of a bandgap tuneable p-GaN high electron mobil- ity transistor (HEMT), according to certain …
FIG. 2 is an exemplary flowchart of a method of making a bandgap tuneable p-GaN HEMT, according to certain embodiments.
FIG. 3 is an exemplary graph illustrating drain current versus gate voltage characteristics of the bandgap tuneable p-GaN HEMT on a logarithmic scale for …
FIG. 3 is an exemplary graph illustrating drain current versus gate voltage characteristics of the bandgap tuneable p-GaN HEMT on a logarithmic scale for …
FIG. 3 is an exemplary graph illustrating drain current versus gate voltage characteristics of the bandgap tuneable p-GaN HEMT on a logarithmic scale for …
FIG. 4 is an exemplary graph illustrating current, transconductance, and its derivative profile for the bandgap tuneable p-GaN HEMT, according to certain …
FIG. 4 is an exemplary graph illustrating current, transconductance, and its derivative profile for the bandgap tuneable p-GaN HEMT, according to certain …
FIG. 4 is an exemplary graph illustrating current, transconductance, and its derivative profile for the bandgap tuneable p-GaN HEMT, according to certain …
FIG. 5 is an exemplary graph illustrating ID versus VDS plot representing gate sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 5 is an exemplary graph illustrating ID versus VDS plot representing gate sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 6 is an exemplary graph illustrating ID versus VGS plot representing drain sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 6 is an exemplary graph illustrating ID versus VGS plot representing drain sustainability for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 7 is an exemplary graph illustrating overall device temperature versus gate bias voltage for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 7 is an exemplary graph illustrating overall device temperature versus gate bias voltage for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 7 is an exemplary graph illustrating overall device temperature versus gate bias voltage for the bandgap tune- able p-GaN HEMT, according to certain …
FIG. 8 is an exemplary graph illustrating linearity assess- ment of output power profile versus gate bias voltage of the bandgap tuneable p-GaN HEMT, according …
FIG. 8 is an exemplary graph illustrating linearity assess- ment of output power profile versus gate bias voltage of the bandgap tuneable p-GaN HEMT, according …
FIG. 8 is an exemplary graph illustrating linearity assess- ment of output power profile versus gate bias voltage of the bandgap tuneable p-GaN HEMT, according …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Fet Mobility | 800–2000 | GaN |
Fet Threshold Voltage | 0.85 | — |
Fet On Off Ratio | — | — |
ON resistance | 20.18 | — |
Device Output Power | 7.3 | — |
Device Max Temperature | 369 | — |
Device Gate Reliability Voltage | 0–81.6 | — |
Device Drain Sustainability Voltage | 0–131 | — |
Voltage | 4–8 V | — |
Voltage | 4–10 V | — |
Voltage | 0–81.6 V | — |
Voltage | 0–131 V | — |
— | 5–7.2 W | — |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 5
Cited non-patent literature · 1
Related documents with shared materials, methods, properties, or citations.
GRAPHENE SUBSTITUTED WITH BORON AND NITROGEN, METHOD OF FABRICATING THE SAME, AND TRANSISTOR HAVING THE SAME
GALLIUM NITRIDE TRANSISTOR
III-NITRIDE MICRO-LEDS ON SEMI-POLAR ORIENTED GAN
GALLIUM NITRIDE TRANSISTOR
Systems and Methods for Perforation and Ohmic Contact Formation For GaN Epitaxial Lift-Off Using An Etch Stop Layer
CIRCUIT INCLUDING A NEGATIVE DIFFERENTIAL RESISTANCE (NDR) DEVICE HAVING A GRAPHENE CHANNEL, AND METHOD OF OPERATING THE CIRUCIT
