Patent
US 10,636,917QUANTUM CAPACITANCE GRAPHENE VARACTORS AND FABRICATION METHODS
ZHIHONG CHEN
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 10,636,917Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 in accordance with illustrative embodiments; and [0025]
FIG. 2 is a cross-sectional view of a dielectric substrate provided in accordance with one illustrative embodiment; [001 1]
FIG. 3 in accordance with one illustrative embodiment; [0013]
FIG. 4 in accordance with one illustrative embodiment; [0014]
FIG. 5 to correspond to the embedded electrode in accordance with one illustrative embodiment; [0015]
FIG. 6 and corresponding to the embedded electrode in accordance with one illustrative embodiment; [00 16]
FIG. 7 is a cross-sectional view showing an upper electrode formed over the graphene layer of
FIG. 8 in accordance with illustrative embodiments.
FIG. 9 is a cross-sectional view of a dielectric substrate provided in accordance with one illustrative embodiment; [0018]
FIG. 10 being patterned in accordance with one illustrative embodiment; [0020]
FIG. 11 in accordance with one illustrative embodiment; [0021]
FIG. 12 in accordance with one illustrative embodiment; [0022]
FIG. 13 in accordance with one illustrative embodiment; [0023]
FIG. 14 is a cross-sectional view showing an upper electrode formed on the dielectric layer and over the graphene layer of
FIG. 15 shows three plots of capacitance versus applied voltage to show the tunability of varactors in accordance with the present principles; [0024]
FIG. 16 is a block/flow diagram showing steps for fabricating a varactor of
FIG. 17 is a block/flow diagram showing steps for fabricating a varactor of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for fabricating a plate varactor, comprising: forming a trench in a dielectric substrate; forming an embedded electrode in the trench of the substrate; forming a capacitor dielectric layer over the embedded electrode; providing a layer of graphene over the mbedded electrode to contribute a quantum capacitance component to the dielectric layer; and forming an upper electrode on the layer of graphene, wherein the quantum capacitance component is tunable with a gain of at least an order of magnitude for an applied voltage between the mbedded electrode and the upper electrode. Currently amended
The method as recited in claim 1, wherein forming the capacitor dielectric layer includes forming a high-K dielectric over the embedded electrode on a planarized surface. Previously presented
The method as recited in claim 1, wherein forming the upper electrode includes patterning the upper electrode to cover lateral extents of the layer of graphene. Previously presented
The method as recited in claim 1, wherein providing the layer of graphene includes providing a single layer of graphene. Previously presented
The method as recited in claim 1, wherein providing the layer of graphene includes one of dip coating, transferring or depositing the layer of graphene. Previously presented
The method as recited in claim 1, further comprising tuning the quantum capacitance component of the layer of graphene by altering an applied voltage to one of the embedded electrode and the upper electrode. Original
8-14. Canceled
Canceled
A method for fabricating a plate varactor, comprising: forming a first electrode embedded in a surface of a dielectric substrate; forming a capacitor dielectric layer disposed over the first electrode; forming a layer of graphene disposed over the first electrode in contact with the dielectric layer to contribute a quantum capacitance component to the dielectric layer; and forming an upper electrode formed on the layer of graphene, wherein the quantum capacitance component of the layer of graphene provides tunability of capacitance based on an applied voltage to one of the first electrode and the upper electrode, and wherein the tunability is greater than a factor of ten for a one volt change from a zero volt reference in the applied voltage to one of the first electrode and the upper electrode. Previously presented
The method as recited in claim 15, wherein an entirety of a bottom surface of the upper electrode is in direct contact with an entirety of a top surface of the layer of graphene. Original
Layer stacks claimed or described, ordered top of device to substrate.
plate varactor with graphene quantum capacitance
Materials described outside the worked examples.
graphene
capacitor dielectric layer
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Capacitance Tunability | >10x (order of magnitude) ratio | graphene |
Voltage | 1–2 V |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,636,917Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 in accordance with illustrative embodiments; and [0025]
FIG. 2 is a cross-sectional view of a dielectric substrate provided in accordance with one illustrative embodiment; [001 1]
FIG. 3 in accordance with one illustrative embodiment; [0013]
FIG. 4 in accordance with one illustrative embodiment; [0014]
FIG. 5 to correspond to the embedded electrode in accordance with one illustrative embodiment; [0015]
FIG. 6 and corresponding to the embedded electrode in accordance with one illustrative embodiment; [00 16]
FIG. 7 is a cross-sectional view showing an upper electrode formed over the graphene layer of
FIG. 8 in accordance with illustrative embodiments.
FIG. 9 is a cross-sectional view of a dielectric substrate provided in accordance with one illustrative embodiment; [0018]
FIG. 10 being patterned in accordance with one illustrative embodiment; [0020]
FIG. 11 in accordance with one illustrative embodiment; [0021]
FIG. 12 in accordance with one illustrative embodiment; [0022]
FIG. 13 in accordance with one illustrative embodiment; [0023]
FIG. 14 is a cross-sectional view showing an upper electrode formed on the dielectric layer and over the graphene layer of
FIG. 15 shows three plots of capacitance versus applied voltage to show the tunability of varactors in accordance with the present principles; [0024]
FIG. 16 is a block/flow diagram showing steps for fabricating a varactor of
FIG. 17 is a block/flow diagram showing steps for fabricating a varactor of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for fabricating a plate varactor, comprising: forming a trench in a dielectric substrate; forming an embedded electrode in the trench of the substrate; forming a capacitor dielectric layer over the embedded electrode; providing a layer of graphene over the mbedded electrode to contribute a quantum capacitance component to the dielectric layer; and forming an upper electrode on the layer of graphene, wherein the quantum capacitance component is tunable with a gain of at least an order of magnitude for an applied voltage between the mbedded electrode and the upper electrode. Currently amended
The method as recited in claim 1, wherein forming the capacitor dielectric layer includes forming a high-K dielectric over the embedded electrode on a planarized surface. Previously presented
The method as recited in claim 1, wherein forming the upper electrode includes patterning the upper electrode to cover lateral extents of the layer of graphene. Previously presented
The method as recited in claim 1, wherein providing the layer of graphene includes providing a single layer of graphene. Previously presented
The method as recited in claim 1, wherein providing the layer of graphene includes one of dip coating, transferring or depositing the layer of graphene. Previously presented
The method as recited in claim 1, further comprising tuning the quantum capacitance component of the layer of graphene by altering an applied voltage to one of the embedded electrode and the upper electrode. Original
8-14. Canceled
Canceled
A method for fabricating a plate varactor, comprising: forming a first electrode embedded in a surface of a dielectric substrate; forming a capacitor dielectric layer disposed over the first electrode; forming a layer of graphene disposed over the first electrode in contact with the dielectric layer to contribute a quantum capacitance component to the dielectric layer; and forming an upper electrode formed on the layer of graphene, wherein the quantum capacitance component of the layer of graphene provides tunability of capacitance based on an applied voltage to one of the first electrode and the upper electrode, and wherein the tunability is greater than a factor of ten for a one volt change from a zero volt reference in the applied voltage to one of the first electrode and the upper electrode. Previously presented
The method as recited in claim 15, wherein an entirety of a bottom surface of the upper electrode is in direct contact with an entirety of a top surface of the layer of graphene. Original
Layer stacks claimed or described, ordered top of device to substrate.
plate varactor with graphene quantum capacitance
Materials described outside the worked examples.
graphene
capacitor dielectric layer
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Capacitance Tunability | >10x (order of magnitude) ratio | graphene |
Voltage | 1–2 V |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,636,917Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 in accordance with illustrative embodiments; and [0025]
FIG. 2 is a cross-sectional view of a dielectric substrate provided in accordance with one illustrative embodiment; [001 1]
FIG. 3 in accordance with one illustrative embodiment; [0013]
FIG. 4 in accordance with one illustrative embodiment; [0014]
FIG. 5 to correspond to the embedded electrode in accordance with one illustrative embodiment; [0015]
FIG. 6 and corresponding to the embedded electrode in accordance with one illustrative embodiment; [00 16]
FIG. 7 is a cross-sectional view showing an upper electrode formed over the graphene layer of
FIG. 8 in accordance with illustrative embodiments.
FIG. 9 is a cross-sectional view of a dielectric substrate provided in accordance with one illustrative embodiment; [0018]
FIG. 10 being patterned in accordance with one illustrative embodiment; [0020]
FIG. 11 in accordance with one illustrative embodiment; [0021]
FIG. 12 in accordance with one illustrative embodiment; [0022]
FIG. 13 in accordance with one illustrative embodiment; [0023]
FIG. 14 is a cross-sectional view showing an upper electrode formed on the dielectric layer and over the graphene layer of
FIG. 15 shows three plots of capacitance versus applied voltage to show the tunability of varactors in accordance with the present principles; [0024]
FIG. 16 is a block/flow diagram showing steps for fabricating a varactor of
FIG. 17 is a block/flow diagram showing steps for fabricating a varactor of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for fabricating a plate varactor, comprising: forming a trench in a dielectric substrate; forming an embedded electrode in the trench of the substrate; forming a capacitor dielectric layer over the embedded electrode; providing a layer of graphene over the mbedded electrode to contribute a quantum capacitance component to the dielectric layer; and forming an upper electrode on the layer of graphene, wherein the quantum capacitance component is tunable with a gain of at least an order of magnitude for an applied voltage between the mbedded electrode and the upper electrode. Currently amended
The method as recited in claim 1, wherein forming the capacitor dielectric layer includes forming a high-K dielectric over the embedded electrode on a planarized surface. Previously presented
The method as recited in claim 1, wherein forming the upper electrode includes patterning the upper electrode to cover lateral extents of the layer of graphene. Previously presented
The method as recited in claim 1, wherein providing the layer of graphene includes providing a single layer of graphene. Previously presented
The method as recited in claim 1, wherein providing the layer of graphene includes one of dip coating, transferring or depositing the layer of graphene. Previously presented
The method as recited in claim 1, further comprising tuning the quantum capacitance component of the layer of graphene by altering an applied voltage to one of the embedded electrode and the upper electrode. Original
8-14. Canceled
Canceled
A method for fabricating a plate varactor, comprising: forming a first electrode embedded in a surface of a dielectric substrate; forming a capacitor dielectric layer disposed over the first electrode; forming a layer of graphene disposed over the first electrode in contact with the dielectric layer to contribute a quantum capacitance component to the dielectric layer; and forming an upper electrode formed on the layer of graphene, wherein the quantum capacitance component of the layer of graphene provides tunability of capacitance based on an applied voltage to one of the first electrode and the upper electrode, and wherein the tunability is greater than a factor of ten for a one volt change from a zero volt reference in the applied voltage to one of the first electrode and the upper electrode. Previously presented
The method as recited in claim 15, wherein an entirety of a bottom surface of the upper electrode is in direct contact with an entirety of a top surface of the layer of graphene. Original
Layer stacks claimed or described, ordered top of device to substrate.
plate varactor with graphene quantum capacitance
Materials described outside the worked examples.
graphene
capacitor dielectric layer
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Capacitance Tunability | >10x (order of magnitude) ratio | graphene |
Voltage | 1–2 V |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,636,917Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 in accordance with illustrative embodiments; and [0025]
FIG. 2 is a cross-sectional view of a dielectric substrate provided in accordance with one illustrative embodiment; [001 1]
FIG. 3 in accordance with one illustrative embodiment; [0013]
FIG. 4 in accordance with one illustrative embodiment; [0014]
FIG. 5 to correspond to the embedded electrode in accordance with one illustrative embodiment; [0015]
FIG. 6 and corresponding to the embedded electrode in accordance with one illustrative embodiment; [00 16]
FIG. 7 is a cross-sectional view showing an upper electrode formed over the graphene layer of
FIG. 8 in accordance with illustrative embodiments.
FIG. 9 is a cross-sectional view of a dielectric substrate provided in accordance with one illustrative embodiment; [0018]
FIG. 10 being patterned in accordance with one illustrative embodiment; [0020]
FIG. 11 in accordance with one illustrative embodiment; [0021]
FIG. 12 in accordance with one illustrative embodiment; [0022]
FIG. 13 in accordance with one illustrative embodiment; [0023]
FIG. 14 is a cross-sectional view showing an upper electrode formed on the dielectric layer and over the graphene layer of
FIG. 15 shows three plots of capacitance versus applied voltage to show the tunability of varactors in accordance with the present principles; [0024]
FIG. 16 is a block/flow diagram showing steps for fabricating a varactor of
FIG. 17 is a block/flow diagram showing steps for fabricating a varactor of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for fabricating a plate varactor, comprising: forming a trench in a dielectric substrate; forming an embedded electrode in the trench of the substrate; forming a capacitor dielectric layer over the embedded electrode; providing a layer of graphene over the mbedded electrode to contribute a quantum capacitance component to the dielectric layer; and forming an upper electrode on the layer of graphene, wherein the quantum capacitance component is tunable with a gain of at least an order of magnitude for an applied voltage between the mbedded electrode and the upper electrode. Currently amended
The method as recited in claim 1, wherein forming the capacitor dielectric layer includes forming a high-K dielectric over the embedded electrode on a planarized surface. Previously presented
The method as recited in claim 1, wherein forming the upper electrode includes patterning the upper electrode to cover lateral extents of the layer of graphene. Previously presented
The method as recited in claim 1, wherein providing the layer of graphene includes providing a single layer of graphene. Previously presented
The method as recited in claim 1, wherein providing the layer of graphene includes one of dip coating, transferring or depositing the layer of graphene. Previously presented
The method as recited in claim 1, further comprising tuning the quantum capacitance component of the layer of graphene by altering an applied voltage to one of the embedded electrode and the upper electrode. Original
8-14. Canceled
Canceled
A method for fabricating a plate varactor, comprising: forming a first electrode embedded in a surface of a dielectric substrate; forming a capacitor dielectric layer disposed over the first electrode; forming a layer of graphene disposed over the first electrode in contact with the dielectric layer to contribute a quantum capacitance component to the dielectric layer; and forming an upper electrode formed on the layer of graphene, wherein the quantum capacitance component of the layer of graphene provides tunability of capacitance based on an applied voltage to one of the first electrode and the upper electrode, and wherein the tunability is greater than a factor of ten for a one volt change from a zero volt reference in the applied voltage to one of the first electrode and the upper electrode. Previously presented
The method as recited in claim 15, wherein an entirety of a bottom surface of the upper electrode is in direct contact with an entirety of a top surface of the layer of graphene. Original
Layer stacks claimed or described, ordered top of device to substrate.
plate varactor with graphene quantum capacitance
Materials described outside the worked examples.
graphene
capacitor dielectric layer
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Capacitance Tunability | >10x (order of magnitude) ratio | graphene |
Voltage | 1–2 V |
Related documents with shared materials, methods, properties, or citations.
dielectric substrate
hafnium dioxide
HfO₂
hafnium oxynitride
hafnium silicate
zirconium silicate
zirconium dioxide
ZrO₂
silicon oxynitride
conductive electrode material
| — |
Voltage | ≤ 1 V | — |
GRAPHENE FIELD EFFECT TRANSISTOR
dielectric substrate
hafnium dioxide
HfO₂
hafnium oxynitride
hafnium silicate
zirconium silicate
zirconium dioxide
ZrO₂
silicon oxynitride
conductive electrode material
| — |
Voltage | ≤ 1 V | — |
GRAPHENE FIELD EFFECT TRANSISTOR
dielectric substrate
hafnium dioxide
HfO₂
hafnium oxynitride
hafnium silicate
zirconium silicate
zirconium dioxide
ZrO₂
silicon oxynitride
conductive electrode material
| — |
Voltage | ≤ 1 V | — |
GRAPHENE FIELD EFFECT TRANSISTOR
dielectric substrate
hafnium dioxide
HfO₂
hafnium oxynitride
hafnium silicate
zirconium silicate
zirconium dioxide
ZrO₂
silicon oxynitride
conductive electrode material
| — |
Voltage | ≤ 1 V | — |
GRAPHENE FIELD EFFECT TRANSISTOR