Patent
US 10,979,032TIME-PROGRAMMABLE FAILSAFE PULLDOWN CIRCUIT FOR GAN SWITCH
Kennith Kin Leong
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 10,979,032Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 illustrates a schematic diagram of a power switch device including a failsafe pulldown circuit that incorporates circuitry for modulating an effective gate resistance.
Figure 2 illustrates a waveform of the effective gate resistance around a turn-on transition of a GaN-based switch.
Figure 3 illustrates voltage and current waveforms for a driver of the device of
Figures 4A-4E illustrate current flows within the power switch device of
Figure 5 illustrates voltage and current waveforms corresponding to the power switch device of
Figure 6 illustrates a power switch system including an alternative power switch device in which programmability of the effective gate resistance is accomplished using resistors that are external to the power switch device, and that is driven by an external single-channel driver.
Figure 7 illustrates a power switch device that incorporates driver circuitry and requires no external driver.
Figure 8 illustrates another power switch device that incorporates driver circuitry and also requires no external driver.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A power switch device, comprising: a normally-off power transistor comprising a gate, a source, and a drain; a control terminal electrically connected to the gate; a control reference terminal; a normally-on pulldown transistor configured to short the gate to the source when no voltage is applied across the control terminal and the control reference terminal, and comprising a pulldown gate, a pulldown source, and a pulldown drain; and a resistance-modulation circuit comprising a modulation transistor and coupled between the source and the control reference terminal, and configured to: modulate a resistance between the control terminal and the control reference term inal, such that a charging current is provided to the gate, for a predete rm ined charging interval, responsive to application of a device turn-on voltage between the control te rm inal and the control reference term inal, and a maintenance current is provided to the gate after the predete rm ined charging interval, wherein the maintenance current has a positive level that is lower than a level of the charging current, wherein the resistance-modulation circuit comprises: a bypass resistor connected in parallel with the modulation transistor; and a voltage clamp diode, wherein the modulation transistor and the voltage clamp diode are serially connected between the pulldown source and the pulldown gate. Currently amended
The power switch device of claim 1, wherein the resistance-modulation circuit is further configured to: autonomously apply a negative voltage to the pulldown gate, relative to the pulldown source, responsive to application of the device turn-on voltage, so as to turn off the normally-on pulldown transistor; and autonomously discharge the negative voltage when the device turn-on voltage is not applied between the control terminal and the control reference terminal. Original
The power switch device of claim 1, wherein the normally-off power transistor is a Gate Injection Transistor (GIT), wherein the normally-on pulldown transistor is a High Electron Mobility Transistor (HEMT), wherein the modulation transistor is a HEMT, and wherein the normally-off power transistor, the normally-on pulldown transistor, and the modulation transistor are monolithically integrated in a same die. Original
The power switch device of claim 1, wherein the device turn-on voltage is a positive voltage that equals or exceeds a sum of a turn-on threshold voltage of the normally-off power transistor and a magnitude of a turn-off threshold voltage of the normally-on pulldown transistor. Original
Canceled
The power switch device of claim [[3]] 1, wherein the modulation transistor has a modulation gate-to-source capacitance between a modulation gate and a modulation source, and wherein the predetermined charging interval is based upon the modulation gate-to-source capacitance and a modulation resistor coupled to the modulation gate. Currently amended
The power switch device of claim 4, wherein the level of the maintenance current is based upon a resistance of a steady-state resistor coupled between the pulldown gate and the pulldown source. Original
A power switch device system, comprising: a _ power switch device; and a single-channel external driver that is powered by a driver power supply, and comp ri sing: an input terminal for inputting a digital control signal; and an output terminal for outputting an output voltage, wherein the power switch device comprises: a normally-off power transistor comprising a gate, a source, and a drain; a control terminal electrically connected to the gate; a control reference terminal; a normally-on pulldown transistor configured to short the gate to the source when no voltage is applied across the control terminal and the control reference terminal, and comprising a pulldown gate, a pulldown source, and a pulldown drain; and a resistance-modulation circuit comprising a modulation transistor and coupled between the source and the control reference terminal, and configured to modulate a resistance between the control terminal and the control reference te rm inal, such that a charging current is provided to the gate, for a predetermined charging interval, responsive to application of a device turn-on voltage between the control te rm inal and the control reference term inal, and a maintenance current is provided to the gate after the predete rm ined charging interval, wherein the maintenance current has a positive level that is lower than a level of the charging current, wherein the output te rm inal is connected to the control te rm inal of the power switch device, and wherein the output voltage alternates between two levels based upon the digital control signal. Currently amended
A power switch device with integrated driver, comprising: a normally-off power transistor comprising a gate, a source, and a drain; a first load te rm inal electrically connected to the drain; a second load terminal electrically connected to the source; a supply terminal and a supply reference te rm inal for connection to a power supply; a control terminal configured to input a digital control signal that controls conduction between the first and second load terminals; a normally-on pulldown transistor comprising a pulldown gate, a pulldown source, and a pulldown drain, and configured to short the gate to the source when the digital control signal does not command conduction of the power switch device; an integrated driver circuit configured to control conduction of the no rm ally-on pulldown transistor, based upon the digital control signal; and a resistance-modulation circuit comprising a modulation transistor and coupled between the source and the supply reference terminal, and configured to: modulate a resistance between the supply te rm inal and the supply reference terminal, such that a charging current is provided to the gate, for a predete rm ined charging interval, responsive to the digital control signal transitioning to command conduction, and a maintenance current is provided to the gate after the predetermined charging interval, wherein the maintenance current has a positive level that is lower than a level of the charging current. Original
The power switch device with integrated driver of claim 14, wherein the integrated driver circuit comprises a driver switch that switchably couples the pull-down gate to the supply reference terminal, and wherein the coupling between the source and the supply reference te rm inal is via the driver switch. Original
The power switch device with integrated driver of claim 14, wherein the norm ally-off power transistor, the no rm ally-on pulldown transistor, the integrated driver and the modulation transistor are monolithically integrated in a same die. Original
A power switch device, comprising: a normally-off power transistor comprising a gate, a source, and a drain; a control terminal electrically connected to the gate; a control reference terminal; a normally-on pulldown transistor configured to short the gate to the source when no voltage is applied across the control terminal and the control reference terminal, and comprising a pulldown gate, a pulldown source, and a pulldown drain; and a resistance-modulation circuit comprising a modulation transistor and coupled between the source and the control reference terminal, and configured to: modulate a resistance between the control terminal and the control reference terminal, such that a charging current is provided to the gate, for a predete rm ined charging interval, responsive to application of a device turn-on voltage between the control te rm inal and the control reference term inal, and a maintenance current is provided to the gate after the predete rm ined charging interval, wherein the maintenance current has a positive level that is lower than a level of the charging current, wherein the normally-off power transistor is a Gate Injection Transistor (GIT), wherein the normally-on pulldown transistor is a High Electron Mobility Transistor (HEMT), wherein the modulation transistor is a HEMT, and wherein the normally-off power transistor, the normally-on pulldown transistor, and the modulation transistor are monolithically integrated in a same die. New
The power switch device of claim 20, wherein the same die is a Gallium Nitride (GaN) die. New
The power switch device of claim 20, further comprising: a bypass resistor connected in parallel with the modulation transistor; and a voltage clamp diode connected serially to the modulation transistor such that the serially-connected voltage clamp diode and modulation transistor are coupled between the pulldown source and the pulldown gate, wherein the bypass resistor and the voltage clamp diode are monolithically integrated in the same die as the no rm ally-off power transistor, the no rm ally-on pulldown transistor, and the modulation transistor. New
Layer stacks claimed or described, ordered top of device to substrate.
normally-off power switch device with failsafe pulldown
No layer stack recorded.
power switch device system with single-channel external driver
No layer stack recorded.
power switch device with integrated driver
No layer stack recorded.
Materials described outside the worked examples.
Gallium Nitride
GaN
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
GaN GIT turn-on/off threshold voltage range (background, prior art context) | 1.2–3.5 V | — |
Voltage | 0.9–1.5 V |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,979,032Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 illustrates a schematic diagram of a power switch device including a failsafe pulldown circuit that incorporates circuitry for modulating an effective gate resistance.
Figure 2 illustrates a waveform of the effective gate resistance around a turn-on transition of a GaN-based switch.
Figure 3 illustrates voltage and current waveforms for a driver of the device of
Figures 4A-4E illustrate current flows within the power switch device of
Figure 5 illustrates voltage and current waveforms corresponding to the power switch device of
Figure 6 illustrates a power switch system including an alternative power switch device in which programmability of the effective gate resistance is accomplished using resistors that are external to the power switch device, and that is driven by an external single-channel driver.
Figure 7 illustrates a power switch device that incorporates driver circuitry and requires no external driver.
Figure 8 illustrates another power switch device that incorporates driver circuitry and also requires no external driver.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A power switch device, comprising: a normally-off power transistor comprising a gate, a source, and a drain; a control terminal electrically connected to the gate; a control reference terminal; a normally-on pulldown transistor configured to short the gate to the source when no voltage is applied across the control terminal and the control reference terminal, and comprising a pulldown gate, a pulldown source, and a pulldown drain; and a resistance-modulation circuit comprising a modulation transistor and coupled between the source and the control reference terminal, and configured to: modulate a resistance between the control terminal and the control reference term inal, such that a charging current is provided to the gate, for a predete rm ined charging interval, responsive to application of a device turn-on voltage between the control te rm inal and the control reference term inal, and a maintenance current is provided to the gate after the predete rm ined charging interval, wherein the maintenance current has a positive level that is lower than a level of the charging current, wherein the resistance-modulation circuit comprises: a bypass resistor connected in parallel with the modulation transistor; and a voltage clamp diode, wherein the modulation transistor and the voltage clamp diode are serially connected between the pulldown source and the pulldown gate. Currently amended
The power switch device of claim 1, wherein the resistance-modulation circuit is further configured to: autonomously apply a negative voltage to the pulldown gate, relative to the pulldown source, responsive to application of the device turn-on voltage, so as to turn off the normally-on pulldown transistor; and autonomously discharge the negative voltage when the device turn-on voltage is not applied between the control terminal and the control reference terminal. Original
The power switch device of claim 1, wherein the normally-off power transistor is a Gate Injection Transistor (GIT), wherein the normally-on pulldown transistor is a High Electron Mobility Transistor (HEMT), wherein the modulation transistor is a HEMT, and wherein the normally-off power transistor, the normally-on pulldown transistor, and the modulation transistor are monolithically integrated in a same die. Original
The power switch device of claim 1, wherein the device turn-on voltage is a positive voltage that equals or exceeds a sum of a turn-on threshold voltage of the normally-off power transistor and a magnitude of a turn-off threshold voltage of the normally-on pulldown transistor. Original
Canceled
The power switch device of claim [[3]] 1, wherein the modulation transistor has a modulation gate-to-source capacitance between a modulation gate and a modulation source, and wherein the predetermined charging interval is based upon the modulation gate-to-source capacitance and a modulation resistor coupled to the modulation gate. Currently amended
The power switch device of claim 4, wherein the level of the maintenance current is based upon a resistance of a steady-state resistor coupled between the pulldown gate and the pulldown source. Original
A power switch device system, comprising: a _ power switch device; and a single-channel external driver that is powered by a driver power supply, and comp ri sing: an input terminal for inputting a digital control signal; and an output terminal for outputting an output voltage, wherein the power switch device comprises: a normally-off power transistor comprising a gate, a source, and a drain; a control terminal electrically connected to the gate; a control reference terminal; a normally-on pulldown transistor configured to short the gate to the source when no voltage is applied across the control terminal and the control reference terminal, and comprising a pulldown gate, a pulldown source, and a pulldown drain; and a resistance-modulation circuit comprising a modulation transistor and coupled between the source and the control reference terminal, and configured to modulate a resistance between the control terminal and the control reference te rm inal, such that a charging current is provided to the gate, for a predetermined charging interval, responsive to application of a device turn-on voltage between the control te rm inal and the control reference term inal, and a maintenance current is provided to the gate after the predete rm ined charging interval, wherein the maintenance current has a positive level that is lower than a level of the charging current, wherein the output te rm inal is connected to the control te rm inal of the power switch device, and wherein the output voltage alternates between two levels based upon the digital control signal. Currently amended
A power switch device with integrated driver, comprising: a normally-off power transistor comprising a gate, a source, and a drain; a first load te rm inal electrically connected to the drain; a second load terminal electrically connected to the source; a supply terminal and a supply reference te rm inal for connection to a power supply; a control terminal configured to input a digital control signal that controls conduction between the first and second load terminals; a normally-on pulldown transistor comprising a pulldown gate, a pulldown source, and a pulldown drain, and configured to short the gate to the source when the digital control signal does not command conduction of the power switch device; an integrated driver circuit configured to control conduction of the no rm ally-on pulldown transistor, based upon the digital control signal; and a resistance-modulation circuit comprising a modulation transistor and coupled between the source and the supply reference terminal, and configured to: modulate a resistance between the supply te rm inal and the supply reference terminal, such that a charging current is provided to the gate, for a predete rm ined charging interval, responsive to the digital control signal transitioning to command conduction, and a maintenance current is provided to the gate after the predetermined charging interval, wherein the maintenance current has a positive level that is lower than a level of the charging current. Original
The power switch device with integrated driver of claim 14, wherein the integrated driver circuit comprises a driver switch that switchably couples the pull-down gate to the supply reference terminal, and wherein the coupling between the source and the supply reference te rm inal is via the driver switch. Original
The power switch device with integrated driver of claim 14, wherein the norm ally-off power transistor, the no rm ally-on pulldown transistor, the integrated driver and the modulation transistor are monolithically integrated in a same die. Original
A power switch device, comprising: a normally-off power transistor comprising a gate, a source, and a drain; a control terminal electrically connected to the gate; a control reference terminal; a normally-on pulldown transistor configured to short the gate to the source when no voltage is applied across the control terminal and the control reference terminal, and comprising a pulldown gate, a pulldown source, and a pulldown drain; and a resistance-modulation circuit comprising a modulation transistor and coupled between the source and the control reference terminal, and configured to: modulate a resistance between the control terminal and the control reference terminal, such that a charging current is provided to the gate, for a predete rm ined charging interval, responsive to application of a device turn-on voltage between the control te rm inal and the control reference term inal, and a maintenance current is provided to the gate after the predete rm ined charging interval, wherein the maintenance current has a positive level that is lower than a level of the charging current, wherein the normally-off power transistor is a Gate Injection Transistor (GIT), wherein the normally-on pulldown transistor is a High Electron Mobility Transistor (HEMT), wherein the modulation transistor is a HEMT, and wherein the normally-off power transistor, the normally-on pulldown transistor, and the modulation transistor are monolithically integrated in a same die. New
The power switch device of claim 20, wherein the same die is a Gallium Nitride (GaN) die. New
The power switch device of claim 20, further comprising: a bypass resistor connected in parallel with the modulation transistor; and a voltage clamp diode connected serially to the modulation transistor such that the serially-connected voltage clamp diode and modulation transistor are coupled between the pulldown source and the pulldown gate, wherein the bypass resistor and the voltage clamp diode are monolithically integrated in the same die as the no rm ally-off power transistor, the no rm ally-on pulldown transistor, and the modulation transistor. New
Layer stacks claimed or described, ordered top of device to substrate.
normally-off power switch device with failsafe pulldown
No layer stack recorded.
power switch device system with single-channel external driver
No layer stack recorded.
power switch device with integrated driver
No layer stack recorded.
Materials described outside the worked examples.
Gallium Nitride
GaN
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
GaN GIT turn-on/off threshold voltage range (background, prior art context) | 1.2–3.5 V | — |
Voltage | 0.9–1.5 V |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,979,032Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 illustrates a schematic diagram of a power switch device including a failsafe pulldown circuit that incorporates circuitry for modulating an effective gate resistance.
Figure 2 illustrates a waveform of the effective gate resistance around a turn-on transition of a GaN-based switch.
Figure 3 illustrates voltage and current waveforms for a driver of the device of
Figures 4A-4E illustrate current flows within the power switch device of
Figure 5 illustrates voltage and current waveforms corresponding to the power switch device of
Figure 6 illustrates a power switch system including an alternative power switch device in which programmability of the effective gate resistance is accomplished using resistors that are external to the power switch device, and that is driven by an external single-channel driver.
Figure 7 illustrates a power switch device that incorporates driver circuitry and requires no external driver.
Figure 8 illustrates another power switch device that incorporates driver circuitry and also requires no external driver.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A power switch device, comprising: a normally-off power transistor comprising a gate, a source, and a drain; a control terminal electrically connected to the gate; a control reference terminal; a normally-on pulldown transistor configured to short the gate to the source when no voltage is applied across the control terminal and the control reference terminal, and comprising a pulldown gate, a pulldown source, and a pulldown drain; and a resistance-modulation circuit comprising a modulation transistor and coupled between the source and the control reference terminal, and configured to: modulate a resistance between the control terminal and the control reference term inal, such that a charging current is provided to the gate, for a predete rm ined charging interval, responsive to application of a device turn-on voltage between the control te rm inal and the control reference term inal, and a maintenance current is provided to the gate after the predete rm ined charging interval, wherein the maintenance current has a positive level that is lower than a level of the charging current, wherein the resistance-modulation circuit comprises: a bypass resistor connected in parallel with the modulation transistor; and a voltage clamp diode, wherein the modulation transistor and the voltage clamp diode are serially connected between the pulldown source and the pulldown gate. Currently amended
The power switch device of claim 1, wherein the resistance-modulation circuit is further configured to: autonomously apply a negative voltage to the pulldown gate, relative to the pulldown source, responsive to application of the device turn-on voltage, so as to turn off the normally-on pulldown transistor; and autonomously discharge the negative voltage when the device turn-on voltage is not applied between the control terminal and the control reference terminal. Original
The power switch device of claim 1, wherein the normally-off power transistor is a Gate Injection Transistor (GIT), wherein the normally-on pulldown transistor is a High Electron Mobility Transistor (HEMT), wherein the modulation transistor is a HEMT, and wherein the normally-off power transistor, the normally-on pulldown transistor, and the modulation transistor are monolithically integrated in a same die. Original
The power switch device of claim 1, wherein the device turn-on voltage is a positive voltage that equals or exceeds a sum of a turn-on threshold voltage of the normally-off power transistor and a magnitude of a turn-off threshold voltage of the normally-on pulldown transistor. Original
Canceled
The power switch device of claim [[3]] 1, wherein the modulation transistor has a modulation gate-to-source capacitance between a modulation gate and a modulation source, and wherein the predetermined charging interval is based upon the modulation gate-to-source capacitance and a modulation resistor coupled to the modulation gate. Currently amended
The power switch device of claim 4, wherein the level of the maintenance current is based upon a resistance of a steady-state resistor coupled between the pulldown gate and the pulldown source. Original
A power switch device system, comprising: a _ power switch device; and a single-channel external driver that is powered by a driver power supply, and comp ri sing: an input terminal for inputting a digital control signal; and an output terminal for outputting an output voltage, wherein the power switch device comprises: a normally-off power transistor comprising a gate, a source, and a drain; a control terminal electrically connected to the gate; a control reference terminal; a normally-on pulldown transistor configured to short the gate to the source when no voltage is applied across the control terminal and the control reference terminal, and comprising a pulldown gate, a pulldown source, and a pulldown drain; and a resistance-modulation circuit comprising a modulation transistor and coupled between the source and the control reference terminal, and configured to modulate a resistance between the control terminal and the control reference te rm inal, such that a charging current is provided to the gate, for a predetermined charging interval, responsive to application of a device turn-on voltage between the control te rm inal and the control reference term inal, and a maintenance current is provided to the gate after the predete rm ined charging interval, wherein the maintenance current has a positive level that is lower than a level of the charging current, wherein the output te rm inal is connected to the control te rm inal of the power switch device, and wherein the output voltage alternates between two levels based upon the digital control signal. Currently amended
A power switch device with integrated driver, comprising: a normally-off power transistor comprising a gate, a source, and a drain; a first load te rm inal electrically connected to the drain; a second load terminal electrically connected to the source; a supply terminal and a supply reference te rm inal for connection to a power supply; a control terminal configured to input a digital control signal that controls conduction between the first and second load terminals; a normally-on pulldown transistor comprising a pulldown gate, a pulldown source, and a pulldown drain, and configured to short the gate to the source when the digital control signal does not command conduction of the power switch device; an integrated driver circuit configured to control conduction of the no rm ally-on pulldown transistor, based upon the digital control signal; and a resistance-modulation circuit comprising a modulation transistor and coupled between the source and the supply reference terminal, and configured to: modulate a resistance between the supply te rm inal and the supply reference terminal, such that a charging current is provided to the gate, for a predete rm ined charging interval, responsive to the digital control signal transitioning to command conduction, and a maintenance current is provided to the gate after the predetermined charging interval, wherein the maintenance current has a positive level that is lower than a level of the charging current. Original
The power switch device with integrated driver of claim 14, wherein the integrated driver circuit comprises a driver switch that switchably couples the pull-down gate to the supply reference terminal, and wherein the coupling between the source and the supply reference te rm inal is via the driver switch. Original
The power switch device with integrated driver of claim 14, wherein the norm ally-off power transistor, the no rm ally-on pulldown transistor, the integrated driver and the modulation transistor are monolithically integrated in a same die. Original
A power switch device, comprising: a normally-off power transistor comprising a gate, a source, and a drain; a control terminal electrically connected to the gate; a control reference terminal; a normally-on pulldown transistor configured to short the gate to the source when no voltage is applied across the control terminal and the control reference terminal, and comprising a pulldown gate, a pulldown source, and a pulldown drain; and a resistance-modulation circuit comprising a modulation transistor and coupled between the source and the control reference terminal, and configured to: modulate a resistance between the control terminal and the control reference terminal, such that a charging current is provided to the gate, for a predete rm ined charging interval, responsive to application of a device turn-on voltage between the control te rm inal and the control reference term inal, and a maintenance current is provided to the gate after the predete rm ined charging interval, wherein the maintenance current has a positive level that is lower than a level of the charging current, wherein the normally-off power transistor is a Gate Injection Transistor (GIT), wherein the normally-on pulldown transistor is a High Electron Mobility Transistor (HEMT), wherein the modulation transistor is a HEMT, and wherein the normally-off power transistor, the normally-on pulldown transistor, and the modulation transistor are monolithically integrated in a same die. New
The power switch device of claim 20, wherein the same die is a Gallium Nitride (GaN) die. New
The power switch device of claim 20, further comprising: a bypass resistor connected in parallel with the modulation transistor; and a voltage clamp diode connected serially to the modulation transistor such that the serially-connected voltage clamp diode and modulation transistor are coupled between the pulldown source and the pulldown gate, wherein the bypass resistor and the voltage clamp diode are monolithically integrated in the same die as the no rm ally-off power transistor, the no rm ally-on pulldown transistor, and the modulation transistor. New
Layer stacks claimed or described, ordered top of device to substrate.
normally-off power switch device with failsafe pulldown
No layer stack recorded.
power switch device system with single-channel external driver
No layer stack recorded.
power switch device with integrated driver
No layer stack recorded.
Materials described outside the worked examples.
Gallium Nitride
GaN
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
GaN GIT turn-on/off threshold voltage range (background, prior art context) | 1.2–3.5 V | — |
Voltage | 0.9–1.5 V |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,979,032Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 illustrates a schematic diagram of a power switch device including a failsafe pulldown circuit that incorporates circuitry for modulating an effective gate resistance.
Figure 2 illustrates a waveform of the effective gate resistance around a turn-on transition of a GaN-based switch.
Figure 3 illustrates voltage and current waveforms for a driver of the device of
Figures 4A-4E illustrate current flows within the power switch device of
Figure 5 illustrates voltage and current waveforms corresponding to the power switch device of
Figure 6 illustrates a power switch system including an alternative power switch device in which programmability of the effective gate resistance is accomplished using resistors that are external to the power switch device, and that is driven by an external single-channel driver.
Figure 7 illustrates a power switch device that incorporates driver circuitry and requires no external driver.
Figure 8 illustrates another power switch device that incorporates driver circuitry and also requires no external driver.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A power switch device, comprising: a normally-off power transistor comprising a gate, a source, and a drain; a control terminal electrically connected to the gate; a control reference terminal; a normally-on pulldown transistor configured to short the gate to the source when no voltage is applied across the control terminal and the control reference terminal, and comprising a pulldown gate, a pulldown source, and a pulldown drain; and a resistance-modulation circuit comprising a modulation transistor and coupled between the source and the control reference terminal, and configured to: modulate a resistance between the control terminal and the control reference term inal, such that a charging current is provided to the gate, for a predete rm ined charging interval, responsive to application of a device turn-on voltage between the control te rm inal and the control reference term inal, and a maintenance current is provided to the gate after the predete rm ined charging interval, wherein the maintenance current has a positive level that is lower than a level of the charging current, wherein the resistance-modulation circuit comprises: a bypass resistor connected in parallel with the modulation transistor; and a voltage clamp diode, wherein the modulation transistor and the voltage clamp diode are serially connected between the pulldown source and the pulldown gate. Currently amended
The power switch device of claim 1, wherein the resistance-modulation circuit is further configured to: autonomously apply a negative voltage to the pulldown gate, relative to the pulldown source, responsive to application of the device turn-on voltage, so as to turn off the normally-on pulldown transistor; and autonomously discharge the negative voltage when the device turn-on voltage is not applied between the control terminal and the control reference terminal. Original
The power switch device of claim 1, wherein the normally-off power transistor is a Gate Injection Transistor (GIT), wherein the normally-on pulldown transistor is a High Electron Mobility Transistor (HEMT), wherein the modulation transistor is a HEMT, and wherein the normally-off power transistor, the normally-on pulldown transistor, and the modulation transistor are monolithically integrated in a same die. Original
The power switch device of claim 1, wherein the device turn-on voltage is a positive voltage that equals or exceeds a sum of a turn-on threshold voltage of the normally-off power transistor and a magnitude of a turn-off threshold voltage of the normally-on pulldown transistor. Original
Canceled
The power switch device of claim [[3]] 1, wherein the modulation transistor has a modulation gate-to-source capacitance between a modulation gate and a modulation source, and wherein the predetermined charging interval is based upon the modulation gate-to-source capacitance and a modulation resistor coupled to the modulation gate. Currently amended
The power switch device of claim 4, wherein the level of the maintenance current is based upon a resistance of a steady-state resistor coupled between the pulldown gate and the pulldown source. Original
A power switch device system, comprising: a _ power switch device; and a single-channel external driver that is powered by a driver power supply, and comp ri sing: an input terminal for inputting a digital control signal; and an output terminal for outputting an output voltage, wherein the power switch device comprises: a normally-off power transistor comprising a gate, a source, and a drain; a control terminal electrically connected to the gate; a control reference terminal; a normally-on pulldown transistor configured to short the gate to the source when no voltage is applied across the control terminal and the control reference terminal, and comprising a pulldown gate, a pulldown source, and a pulldown drain; and a resistance-modulation circuit comprising a modulation transistor and coupled between the source and the control reference terminal, and configured to modulate a resistance between the control terminal and the control reference te rm inal, such that a charging current is provided to the gate, for a predetermined charging interval, responsive to application of a device turn-on voltage between the control te rm inal and the control reference term inal, and a maintenance current is provided to the gate after the predete rm ined charging interval, wherein the maintenance current has a positive level that is lower than a level of the charging current, wherein the output te rm inal is connected to the control te rm inal of the power switch device, and wherein the output voltage alternates between two levels based upon the digital control signal. Currently amended
A power switch device with integrated driver, comprising: a normally-off power transistor comprising a gate, a source, and a drain; a first load te rm inal electrically connected to the drain; a second load terminal electrically connected to the source; a supply terminal and a supply reference te rm inal for connection to a power supply; a control terminal configured to input a digital control signal that controls conduction between the first and second load terminals; a normally-on pulldown transistor comprising a pulldown gate, a pulldown source, and a pulldown drain, and configured to short the gate to the source when the digital control signal does not command conduction of the power switch device; an integrated driver circuit configured to control conduction of the no rm ally-on pulldown transistor, based upon the digital control signal; and a resistance-modulation circuit comprising a modulation transistor and coupled between the source and the supply reference terminal, and configured to: modulate a resistance between the supply te rm inal and the supply reference terminal, such that a charging current is provided to the gate, for a predete rm ined charging interval, responsive to the digital control signal transitioning to command conduction, and a maintenance current is provided to the gate after the predetermined charging interval, wherein the maintenance current has a positive level that is lower than a level of the charging current. Original
The power switch device with integrated driver of claim 14, wherein the integrated driver circuit comprises a driver switch that switchably couples the pull-down gate to the supply reference terminal, and wherein the coupling between the source and the supply reference te rm inal is via the driver switch. Original
The power switch device with integrated driver of claim 14, wherein the norm ally-off power transistor, the no rm ally-on pulldown transistor, the integrated driver and the modulation transistor are monolithically integrated in a same die. Original
A power switch device, comprising: a normally-off power transistor comprising a gate, a source, and a drain; a control terminal electrically connected to the gate; a control reference terminal; a normally-on pulldown transistor configured to short the gate to the source when no voltage is applied across the control terminal and the control reference terminal, and comprising a pulldown gate, a pulldown source, and a pulldown drain; and a resistance-modulation circuit comprising a modulation transistor and coupled between the source and the control reference terminal, and configured to: modulate a resistance between the control terminal and the control reference terminal, such that a charging current is provided to the gate, for a predete rm ined charging interval, responsive to application of a device turn-on voltage between the control te rm inal and the control reference term inal, and a maintenance current is provided to the gate after the predete rm ined charging interval, wherein the maintenance current has a positive level that is lower than a level of the charging current, wherein the normally-off power transistor is a Gate Injection Transistor (GIT), wherein the normally-on pulldown transistor is a High Electron Mobility Transistor (HEMT), wherein the modulation transistor is a HEMT, and wherein the normally-off power transistor, the normally-on pulldown transistor, and the modulation transistor are monolithically integrated in a same die. New
The power switch device of claim 20, wherein the same die is a Gallium Nitride (GaN) die. New
The power switch device of claim 20, further comprising: a bypass resistor connected in parallel with the modulation transistor; and a voltage clamp diode connected serially to the modulation transistor such that the serially-connected voltage clamp diode and modulation transistor are coupled between the pulldown source and the pulldown gate, wherein the bypass resistor and the voltage clamp diode are monolithically integrated in the same die as the no rm ally-off power transistor, the no rm ally-on pulldown transistor, and the modulation transistor. New
Layer stacks claimed or described, ordered top of device to substrate.
normally-off power switch device with failsafe pulldown
No layer stack recorded.
power switch device system with single-channel external driver
No layer stack recorded.
power switch device with integrated driver
No layer stack recorded.
Materials described outside the worked examples.
Gallium Nitride
GaN
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
GaN GIT turn-on/off threshold voltage range (background, prior art context) | 1.2–3.5 V | — |
Voltage | 0.9–1.5 V |
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