Patent
US 8,755,212Title: NON-VOLATILE GRAPHENE-DRUM MEMORY CHIP
David A. Badger, Joseph F. Pinkerton
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 8,755,212Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 2-3, it is possible to stack many layers (three layers 202, 203, and 204 are shown) together to achieve very high storage per unit area. Layer 204 is …
FIG. 3 depicts this stacked graphene-drum memory chip. As can be seen in
FIG. 4 depicts an embodiment of the present invention in which the graphene-dru m memory chip has graphene drums whose reasonant frequency has been altered by …
FIG. 5A, a small graphene drum 502 (such as a 5-100 n anometer diameter graphene drum) can move up toward trace 503 (as illustrated in the first position "a" of …
FIG. 6 depicts an embodiment of the present invention in which the graphene-drum memory chip has a voltage placed between the graphene and a trace. DETAILED …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
The memory chip of Claim 1, wherein the array of electrically conductive drums is an array of graphene drums.
The memory chip of Claim 2, wherein the memory chip comprises a layer, wherein the layer comprises the array of graphene drums.
The memory chip of Claim 2, further comprising a selection trace system, wherein (a) the selection trace system comprises a plurality of selection traces; and (b) each of the graphene memory chip cells is operably connected to a corresponding pair of selection traces in the selection traces such that each of the graphene memory chip cells can be individually selected by selecting the corresponding pair of selection traces for the graphene-drum memory chip cell.
The memory chip of Claim 2, further comprising a trace system, wherein (a) the trace system comprises at least a first trace and a second trace; (b) a graphene drum in the plurality of graphene-drum memory chip cells is in the "on " pos i tion when the graphene drum is in a stable equilibrium between the van der Waals forces caused by the first trace and a mechanical restoration force; and (c) the graphene drum in the plurality of graphene-drum memory chip cells is in the "off " position when the graphene drum is in a stable equilibrium between the van der Waals forces caused by the second trace and the mechanical restoration force. I 1. The memory chip of Claim 10, wherein the graphene drum does not contact the first trace when in the first position, and the graphene drum does not contact the second trace when in the second position. 16 23711- 011 WOI 12. The memory chip of Claim 10, wherein the graphene drum is operable to receive a voltag e such that a th e rmal amplitud e of th e graphenc drum can caus e an AC tunneling current that can be detected to determine whether the graphene drum is in the "on" position or the "off ' position.
The memory chip of Claim 2, further comprising a trace system having at least a first trace and a second trace, wherein (a) the first trace is in contact with a first layer of oxide positioned between the first trace and the graphene drum; and (b) the first layer of oxide is in contact with a first layer of metal positioned between the first layer of oxide and the graphene drum.
The memory chip of Claim 2, wherein the memory chip has a plurality of layers, wherein each layer of the plurality layers comprises an array of graphene drums.
The memory chip of Claim 1, wherein at least some of the drums in the array of electrically conductive drums have particles of material on one side, where the electrically conductive drums that have particles have an altered resonant frequency due to the particles there upon.
The memory chip of Claim 18, wherein the particles of material are balls of materials.
The memory chip of Claim 18, wherein the array of electrically conductive drums is an array of graphene drums.
The memory chip of Claim 18, wherein the material of the particles comprises a metal.
The memory chip of Claim 18, wherein the particles are particles of sputtered metal.
The memory chip of Claim 18, wherein the amount of alteration of the resonant frequency of the electrically conductive drums depends on the number, size, and location of the particles upon the electrically conductive drums.
A method of reading a memory state of an electrica l ly conducti v e drum in an electrically conductive memory chip cell, wherein the electrically conductive drum is operable for moving between a first position and a second position, the method comprising: (a) applying a voltage between the electrically conductive drum and a nearby electrically conductive member that can cause a tunneling current due to the thermal amplitude of the graphene drum; (b) sensing the frequency of the tunneling current; and (c) determining whether the electrically conducti v e drum is in the first position or the second position, wherein the first position and second position are selected from the group consisting of (a) the "on" position and the "off ' position, respectively, and (b) the "off ' position and the "on" position, respectively.
The method of Claim 28, wherein the electrically conductive drum is a graphene drum.
The method of Claim 28, wherein (a) the electrically conductive drum is contacting the electrically conductive member when the electrically conductive drum is in the first position; and (b) the electrically conductive drum is not contacting the electrically conductive member when the electrically conductive drum is in the second position. 19 23711- 01I WOI 3 1. Th e method of Claim 30, wherein the s e cond position is a stable equilibrium position where van der Waals forces are balanced with mechanical restoration forces upon the electrically conductive drum when positioned at the second position.
The method of Claim 28, wherein (a) the electrically conductive drum is not contacting the electrically conductive member when the electrically conductive drum is in the first position; and (b) the electrically conductive drum is not contacting the electrically conductive member when the electrically conductive drum is in the second position.
The method of Claim 28, wherein (a) the electrically conductive member is in contact with a first layer of oxide positioned between the electrically conductive member and the electrically conductive drum; and (b) the first layer of oxide is in contact with a first layer of metal positioned between the first layer of oxide and the electrically conductive drum.
The method of Claim 28 further comprising selecting the electrically conductive drum using a selection trace system operatively connected to the electrically conductive dr u m memory chip cell, wherein: (a) the selection trace system comprises a plurality of selection traces, and (b) the electrically conductive drum memory chip cell is operably connected to a corresponding pair of selection traces in the selection traces such that the electrically conductive memory chip cell can be individually selected by selecting the corresponding pair of selection traces for the electrically conductive drum memory chip cell. 21 23711-01 1 WOI What is claimed is:
Layer stacks claimed or described, ordered top of device to substrate.
non-volatile graphene-drum memory chip
Materials described outside the worked examples.
electrically conductive drum
graphene
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 5A, a small graphene drum 502 (such as a 5-100 n anometer diameter graphene drum) can move up toward trace 503 (as illustrated in the first position "a" of …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
graphene drum diameter range | — | graphene |
memory density at 90 nm feature size | — | — |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,755,212Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 2-3, it is possible to stack many layers (three layers 202, 203, and 204 are shown) together to achieve very high storage per unit area. Layer 204 is …
FIG. 3 depicts this stacked graphene-drum memory chip. As can be seen in
FIG. 4 depicts an embodiment of the present invention in which the graphene-dru m memory chip has graphene drums whose reasonant frequency has been altered by …
FIG. 5A, a small graphene drum 502 (such as a 5-100 n anometer diameter graphene drum) can move up toward trace 503 (as illustrated in the first position "a" of …
FIG. 6 depicts an embodiment of the present invention in which the graphene-drum memory chip has a voltage placed between the graphene and a trace. DETAILED …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
The memory chip of Claim 1, wherein the array of electrically conductive drums is an array of graphene drums.
The memory chip of Claim 2, wherein the memory chip comprises a layer, wherein the layer comprises the array of graphene drums.
The memory chip of Claim 2, further comprising a selection trace system, wherein (a) the selection trace system comprises a plurality of selection traces; and (b) each of the graphene memory chip cells is operably connected to a corresponding pair of selection traces in the selection traces such that each of the graphene memory chip cells can be individually selected by selecting the corresponding pair of selection traces for the graphene-drum memory chip cell.
The memory chip of Claim 2, further comprising a trace system, wherein (a) the trace system comprises at least a first trace and a second trace; (b) a graphene drum in the plurality of graphene-drum memory chip cells is in the "on " pos i tion when the graphene drum is in a stable equilibrium between the van der Waals forces caused by the first trace and a mechanical restoration force; and (c) the graphene drum in the plurality of graphene-drum memory chip cells is in the "off " position when the graphene drum is in a stable equilibrium between the van der Waals forces caused by the second trace and the mechanical restoration force. I 1. The memory chip of Claim 10, wherein the graphene drum does not contact the first trace when in the first position, and the graphene drum does not contact the second trace when in the second position. 16 23711- 011 WOI 12. The memory chip of Claim 10, wherein the graphene drum is operable to receive a voltag e such that a th e rmal amplitud e of th e graphenc drum can caus e an AC tunneling current that can be detected to determine whether the graphene drum is in the "on" position or the "off ' position.
The memory chip of Claim 2, further comprising a trace system having at least a first trace and a second trace, wherein (a) the first trace is in contact with a first layer of oxide positioned between the first trace and the graphene drum; and (b) the first layer of oxide is in contact with a first layer of metal positioned between the first layer of oxide and the graphene drum.
The memory chip of Claim 2, wherein the memory chip has a plurality of layers, wherein each layer of the plurality layers comprises an array of graphene drums.
The memory chip of Claim 1, wherein at least some of the drums in the array of electrically conductive drums have particles of material on one side, where the electrically conductive drums that have particles have an altered resonant frequency due to the particles there upon.
The memory chip of Claim 18, wherein the particles of material are balls of materials.
The memory chip of Claim 18, wherein the array of electrically conductive drums is an array of graphene drums.
The memory chip of Claim 18, wherein the material of the particles comprises a metal.
The memory chip of Claim 18, wherein the particles are particles of sputtered metal.
The memory chip of Claim 18, wherein the amount of alteration of the resonant frequency of the electrically conductive drums depends on the number, size, and location of the particles upon the electrically conductive drums.
A method of reading a memory state of an electrica l ly conducti v e drum in an electrically conductive memory chip cell, wherein the electrically conductive drum is operable for moving between a first position and a second position, the method comprising: (a) applying a voltage between the electrically conductive drum and a nearby electrically conductive member that can cause a tunneling current due to the thermal amplitude of the graphene drum; (b) sensing the frequency of the tunneling current; and (c) determining whether the electrically conducti v e drum is in the first position or the second position, wherein the first position and second position are selected from the group consisting of (a) the "on" position and the "off ' position, respectively, and (b) the "off ' position and the "on" position, respectively.
The method of Claim 28, wherein the electrically conductive drum is a graphene drum.
The method of Claim 28, wherein (a) the electrically conductive drum is contacting the electrically conductive member when the electrically conductive drum is in the first position; and (b) the electrically conductive drum is not contacting the electrically conductive member when the electrically conductive drum is in the second position. 19 23711- 01I WOI 3 1. Th e method of Claim 30, wherein the s e cond position is a stable equilibrium position where van der Waals forces are balanced with mechanical restoration forces upon the electrically conductive drum when positioned at the second position.
The method of Claim 28, wherein (a) the electrically conductive drum is not contacting the electrically conductive member when the electrically conductive drum is in the first position; and (b) the electrically conductive drum is not contacting the electrically conductive member when the electrically conductive drum is in the second position.
The method of Claim 28, wherein (a) the electrically conductive member is in contact with a first layer of oxide positioned between the electrically conductive member and the electrically conductive drum; and (b) the first layer of oxide is in contact with a first layer of metal positioned between the first layer of oxide and the electrically conductive drum.
The method of Claim 28 further comprising selecting the electrically conductive drum using a selection trace system operatively connected to the electrically conductive dr u m memory chip cell, wherein: (a) the selection trace system comprises a plurality of selection traces, and (b) the electrically conductive drum memory chip cell is operably connected to a corresponding pair of selection traces in the selection traces such that the electrically conductive memory chip cell can be individually selected by selecting the corresponding pair of selection traces for the electrically conductive drum memory chip cell. 21 23711-01 1 WOI What is claimed is:
Layer stacks claimed or described, ordered top of device to substrate.
non-volatile graphene-drum memory chip
Materials described outside the worked examples.
electrically conductive drum
graphene
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 5A, a small graphene drum 502 (such as a 5-100 n anometer diameter graphene drum) can move up toward trace 503 (as illustrated in the first position "a" of …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
graphene drum diameter range | — | graphene |
memory density at 90 nm feature size | — | — |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,755,212Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 2-3, it is possible to stack many layers (three layers 202, 203, and 204 are shown) together to achieve very high storage per unit area. Layer 204 is …
FIG. 3 depicts this stacked graphene-drum memory chip. As can be seen in
FIG. 4 depicts an embodiment of the present invention in which the graphene-dru m memory chip has graphene drums whose reasonant frequency has been altered by …
FIG. 5A, a small graphene drum 502 (such as a 5-100 n anometer diameter graphene drum) can move up toward trace 503 (as illustrated in the first position "a" of …
FIG. 6 depicts an embodiment of the present invention in which the graphene-drum memory chip has a voltage placed between the graphene and a trace. DETAILED …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
The memory chip of Claim 1, wherein the array of electrically conductive drums is an array of graphene drums.
The memory chip of Claim 2, wherein the memory chip comprises a layer, wherein the layer comprises the array of graphene drums.
The memory chip of Claim 2, further comprising a selection trace system, wherein (a) the selection trace system comprises a plurality of selection traces; and (b) each of the graphene memory chip cells is operably connected to a corresponding pair of selection traces in the selection traces such that each of the graphene memory chip cells can be individually selected by selecting the corresponding pair of selection traces for the graphene-drum memory chip cell.
The memory chip of Claim 2, further comprising a trace system, wherein (a) the trace system comprises at least a first trace and a second trace; (b) a graphene drum in the plurality of graphene-drum memory chip cells is in the "on " pos i tion when the graphene drum is in a stable equilibrium between the van der Waals forces caused by the first trace and a mechanical restoration force; and (c) the graphene drum in the plurality of graphene-drum memory chip cells is in the "off " position when the graphene drum is in a stable equilibrium between the van der Waals forces caused by the second trace and the mechanical restoration force. I 1. The memory chip of Claim 10, wherein the graphene drum does not contact the first trace when in the first position, and the graphene drum does not contact the second trace when in the second position. 16 23711- 011 WOI 12. The memory chip of Claim 10, wherein the graphene drum is operable to receive a voltag e such that a th e rmal amplitud e of th e graphenc drum can caus e an AC tunneling current that can be detected to determine whether the graphene drum is in the "on" position or the "off ' position.
The memory chip of Claim 2, further comprising a trace system having at least a first trace and a second trace, wherein (a) the first trace is in contact with a first layer of oxide positioned between the first trace and the graphene drum; and (b) the first layer of oxide is in contact with a first layer of metal positioned between the first layer of oxide and the graphene drum.
The memory chip of Claim 2, wherein the memory chip has a plurality of layers, wherein each layer of the plurality layers comprises an array of graphene drums.
The memory chip of Claim 1, wherein at least some of the drums in the array of electrically conductive drums have particles of material on one side, where the electrically conductive drums that have particles have an altered resonant frequency due to the particles there upon.
The memory chip of Claim 18, wherein the particles of material are balls of materials.
The memory chip of Claim 18, wherein the array of electrically conductive drums is an array of graphene drums.
The memory chip of Claim 18, wherein the material of the particles comprises a metal.
The memory chip of Claim 18, wherein the particles are particles of sputtered metal.
The memory chip of Claim 18, wherein the amount of alteration of the resonant frequency of the electrically conductive drums depends on the number, size, and location of the particles upon the electrically conductive drums.
A method of reading a memory state of an electrica l ly conducti v e drum in an electrically conductive memory chip cell, wherein the electrically conductive drum is operable for moving between a first position and a second position, the method comprising: (a) applying a voltage between the electrically conductive drum and a nearby electrically conductive member that can cause a tunneling current due to the thermal amplitude of the graphene drum; (b) sensing the frequency of the tunneling current; and (c) determining whether the electrically conducti v e drum is in the first position or the second position, wherein the first position and second position are selected from the group consisting of (a) the "on" position and the "off ' position, respectively, and (b) the "off ' position and the "on" position, respectively.
The method of Claim 28, wherein the electrically conductive drum is a graphene drum.
The method of Claim 28, wherein (a) the electrically conductive drum is contacting the electrically conductive member when the electrically conductive drum is in the first position; and (b) the electrically conductive drum is not contacting the electrically conductive member when the electrically conductive drum is in the second position. 19 23711- 01I WOI 3 1. Th e method of Claim 30, wherein the s e cond position is a stable equilibrium position where van der Waals forces are balanced with mechanical restoration forces upon the electrically conductive drum when positioned at the second position.
The method of Claim 28, wherein (a) the electrically conductive drum is not contacting the electrically conductive member when the electrically conductive drum is in the first position; and (b) the electrically conductive drum is not contacting the electrically conductive member when the electrically conductive drum is in the second position.
The method of Claim 28, wherein (a) the electrically conductive member is in contact with a first layer of oxide positioned between the electrically conductive member and the electrically conductive drum; and (b) the first layer of oxide is in contact with a first layer of metal positioned between the first layer of oxide and the electrically conductive drum.
The method of Claim 28 further comprising selecting the electrically conductive drum using a selection trace system operatively connected to the electrically conductive dr u m memory chip cell, wherein: (a) the selection trace system comprises a plurality of selection traces, and (b) the electrically conductive drum memory chip cell is operably connected to a corresponding pair of selection traces in the selection traces such that the electrically conductive memory chip cell can be individually selected by selecting the corresponding pair of selection traces for the electrically conductive drum memory chip cell. 21 23711-01 1 WOI What is claimed is:
Layer stacks claimed or described, ordered top of device to substrate.
non-volatile graphene-drum memory chip
Materials described outside the worked examples.
electrically conductive drum
graphene
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 5A, a small graphene drum 502 (such as a 5-100 n anometer diameter graphene drum) can move up toward trace 503 (as illustrated in the first position "a" of …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
graphene drum diameter range | — | graphene |
memory density at 90 nm feature size | — | — |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,755,212Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 2-3, it is possible to stack many layers (three layers 202, 203, and 204 are shown) together to achieve very high storage per unit area. Layer 204 is …
FIG. 3 depicts this stacked graphene-drum memory chip. As can be seen in
FIG. 4 depicts an embodiment of the present invention in which the graphene-dru m memory chip has graphene drums whose reasonant frequency has been altered by …
FIG. 5A, a small graphene drum 502 (such as a 5-100 n anometer diameter graphene drum) can move up toward trace 503 (as illustrated in the first position "a" of …
FIG. 6 depicts an embodiment of the present invention in which the graphene-drum memory chip has a voltage placed between the graphene and a trace. DETAILED …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
The memory chip of Claim 1, wherein the array of electrically conductive drums is an array of graphene drums.
The memory chip of Claim 2, wherein the memory chip comprises a layer, wherein the layer comprises the array of graphene drums.
The memory chip of Claim 2, further comprising a selection trace system, wherein (a) the selection trace system comprises a plurality of selection traces; and (b) each of the graphene memory chip cells is operably connected to a corresponding pair of selection traces in the selection traces such that each of the graphene memory chip cells can be individually selected by selecting the corresponding pair of selection traces for the graphene-drum memory chip cell.
The memory chip of Claim 2, further comprising a trace system, wherein (a) the trace system comprises at least a first trace and a second trace; (b) a graphene drum in the plurality of graphene-drum memory chip cells is in the "on " pos i tion when the graphene drum is in a stable equilibrium between the van der Waals forces caused by the first trace and a mechanical restoration force; and (c) the graphene drum in the plurality of graphene-drum memory chip cells is in the "off " position when the graphene drum is in a stable equilibrium between the van der Waals forces caused by the second trace and the mechanical restoration force. I 1. The memory chip of Claim 10, wherein the graphene drum does not contact the first trace when in the first position, and the graphene drum does not contact the second trace when in the second position. 16 23711- 011 WOI 12. The memory chip of Claim 10, wherein the graphene drum is operable to receive a voltag e such that a th e rmal amplitud e of th e graphenc drum can caus e an AC tunneling current that can be detected to determine whether the graphene drum is in the "on" position or the "off ' position.
The memory chip of Claim 2, further comprising a trace system having at least a first trace and a second trace, wherein (a) the first trace is in contact with a first layer of oxide positioned between the first trace and the graphene drum; and (b) the first layer of oxide is in contact with a first layer of metal positioned between the first layer of oxide and the graphene drum.
The memory chip of Claim 2, wherein the memory chip has a plurality of layers, wherein each layer of the plurality layers comprises an array of graphene drums.
The memory chip of Claim 1, wherein at least some of the drums in the array of electrically conductive drums have particles of material on one side, where the electrically conductive drums that have particles have an altered resonant frequency due to the particles there upon.
The memory chip of Claim 18, wherein the particles of material are balls of materials.
The memory chip of Claim 18, wherein the array of electrically conductive drums is an array of graphene drums.
The memory chip of Claim 18, wherein the material of the particles comprises a metal.
The memory chip of Claim 18, wherein the particles are particles of sputtered metal.
The memory chip of Claim 18, wherein the amount of alteration of the resonant frequency of the electrically conductive drums depends on the number, size, and location of the particles upon the electrically conductive drums.
A method of reading a memory state of an electrica l ly conducti v e drum in an electrically conductive memory chip cell, wherein the electrically conductive drum is operable for moving between a first position and a second position, the method comprising: (a) applying a voltage between the electrically conductive drum and a nearby electrically conductive member that can cause a tunneling current due to the thermal amplitude of the graphene drum; (b) sensing the frequency of the tunneling current; and (c) determining whether the electrically conducti v e drum is in the first position or the second position, wherein the first position and second position are selected from the group consisting of (a) the "on" position and the "off ' position, respectively, and (b) the "off ' position and the "on" position, respectively.
The method of Claim 28, wherein the electrically conductive drum is a graphene drum.
The method of Claim 28, wherein (a) the electrically conductive drum is contacting the electrically conductive member when the electrically conductive drum is in the first position; and (b) the electrically conductive drum is not contacting the electrically conductive member when the electrically conductive drum is in the second position. 19 23711- 01I WOI 3 1. Th e method of Claim 30, wherein the s e cond position is a stable equilibrium position where van der Waals forces are balanced with mechanical restoration forces upon the electrically conductive drum when positioned at the second position.
The method of Claim 28, wherein (a) the electrically conductive drum is not contacting the electrically conductive member when the electrically conductive drum is in the first position; and (b) the electrically conductive drum is not contacting the electrically conductive member when the electrically conductive drum is in the second position.
The method of Claim 28, wherein (a) the electrically conductive member is in contact with a first layer of oxide positioned between the electrically conductive member and the electrically conductive drum; and (b) the first layer of oxide is in contact with a first layer of metal positioned between the first layer of oxide and the electrically conductive drum.
The method of Claim 28 further comprising selecting the electrically conductive drum using a selection trace system operatively connected to the electrically conductive dr u m memory chip cell, wherein: (a) the selection trace system comprises a plurality of selection traces, and (b) the electrically conductive drum memory chip cell is operably connected to a corresponding pair of selection traces in the selection traces such that the electrically conductive memory chip cell can be individually selected by selecting the corresponding pair of selection traces for the electrically conductive drum memory chip cell. 21 23711-01 1 WOI What is claimed is:
Layer stacks claimed or described, ordered top of device to substrate.
non-volatile graphene-drum memory chip
Materials described outside the worked examples.
electrically conductive drum
graphene
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 5A, a small graphene drum 502 (such as a 5-100 n anometer diameter graphene drum) can move up toward trace 503 (as illustrated in the first position "a" of …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
graphene drum diameter range | — | graphene |
memory density at 90 nm feature size | — | — |
Related documents with shared materials, methods, properties, or citations.
oxide layer
metal layer
metal particles
sputtered metal particles
graphene oxide
FIG. 5A, a small graphene drum 502 (such as a 5-100 n anometer diameter graphene drum) can move up toward trace 503 (as illustrated in the first position "a" of …
read/write voltage (typically less than) | — | graphene |
Thickness | 1–3 nm | — |
Thickness | 3–10 Å | — |
GRAPHENE OXIDE POLYMER WITH NONLINEAR RESISTIVITY
oxide layer
metal layer
metal particles
sputtered metal particles
graphene oxide
FIG. 5A, a small graphene drum 502 (such as a 5-100 n anometer diameter graphene drum) can move up toward trace 503 (as illustrated in the first position "a" of …
read/write voltage (typically less than) | — | graphene |
Thickness | 1–3 nm | — |
Thickness | 3–10 Å | — |
GRAPHENE OXIDE POLYMER WITH NONLINEAR RESISTIVITY
oxide layer
metal layer
metal particles
sputtered metal particles
graphene oxide
FIG. 5A, a small graphene drum 502 (such as a 5-100 n anometer diameter graphene drum) can move up toward trace 503 (as illustrated in the first position "a" of …
read/write voltage (typically less than) | — | graphene |
Thickness | 1–3 nm | — |
Thickness | 3–10 Å | — |
GRAPHENE OXIDE POLYMER WITH NONLINEAR RESISTIVITY
oxide layer
metal layer
metal particles
sputtered metal particles
graphene oxide
FIG. 5A, a small graphene drum 502 (such as a 5-100 n anometer diameter graphene drum) can move up toward trace 503 (as illustrated in the first position "a" of …
read/write voltage (typically less than) | — | graphene |
Thickness | 1–3 nm | — |
Thickness | 3–10 Å | — |