VERTICALLY STACKED HETEROSTRUCTURES INCLUDING GRAPHENE

c/o The Regents of the EE; c/o The TR)

Patent

Atlas literature

Patent

US 9,685,559

VERTICALLY STACKED HETEROSTRUCTURES INCLUDING GRAPHENE

DUAN, Xiangfeng, YU, Woojong

THE REGENTS OF THE UNIVERSITY OF CALIFORNIA·US

Drawings

Patent drawings and their descriptions. Click a drawing to enlarge it.

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Claims

Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.

2 independent · 18 dependent

1
Independentgraphenesemiconducting channel material (non-graphene)vertical field-effect transistor (VFET) — bottom graphene source configuration
A vertically stacked heterostructure device, comprising: a substrate; and vertically stacked layers disposed over the substrate and including a source electrode including a layer of graphene; a drain electrode; and a semiconducting channel disposed between the source electrode and the drain electrode, the semiconducting channel including a material diﬀerent from graphene wherein, during operation of the device, a current is conﬁgured to ﬂow between the source electrode and the drain electrode through the semiconducting channel.
1. 2
  Dependent← claim 1vertical field-effect transistor (VFET) — bottom graphene source configuration
  The vertically stacked heterostructure device of claim 1, further comprising a dielectric layer disposed over the substrate, and the substrate corresponds to a back gate.
2. 10
  Dependent← claim 1vertical field-effect transistor (VFET) — top graphene source with top gate configuration
  The vertically stacked heterostructure device of claim 1, wherein the drain electrode is disposed over the substrate, the semiconducting channel is disposed over the drain electrode, the source electrode is disposed over the semiconducting channel, and at least a portion of the source electrode overlies at least a portion of the drain electrode to deﬁne an overlapping area.
3. 18
  Dependent← claim 1vertical field-effect transistor (VFET) — bottom graphene source configuration
  The vertically stacked heterostructure device of claim 1, wherein the substrate is a ﬂexible substrate.
19
Independentgraphenesemiconducting channel material (non-graphene)vertical field-effect transistor (VFET) — bottom graphene source configurationvertical field-effect transistor (VFET) — top graphene source with top gate configuration
A method of photocurrent generation, comprising: providing a vertical stack of layers disposed over a substrate, wherein the vertical stack of layers includes a top electrode, a bottom electrode, and a semiconducting channel disposed between the top electrode and the bottom electrode, the semiconducting channel includes a material diﬀerent from graphene, and at least one of the top electrode and the bottom electrode includes a layer of graphene; and generating a photocurrent by illuminating the vertical stack of layers, wherein the photocurrent ﬂows between the top electrode and the bottom electrode through the semiconducting channel, and generating the photocurrent includes applying a back gate photocurrent.
1. 20
  Dependent← claim 19vertical field-effect transistor (VFET) — top graphene source with top gate configuration
  The method of claim 19, wherein the vertical disposed over the top electrode, and generating gate voltage to the top gate to modulate the NFOA 4841-4491-98661 voltage to the substrate to modulate the stack of layers further includes a top gate the photocurrent further includes applying a top photocurrent. -4- Senal No. 14/654,164 Response to

Device structures

Layer stacks claimed or described, ordered top of device to substrate.

vertical field-effect transistor (VFET) — bottom graphene source configuration

metal (drain electrode)drain electrode

semiconducting channel material (non-graphene)channel

graphenesource electrode

SiO₂dielectric

substrate/back_gatesubstrate/back gate

vertical field-effect transistor (VFET) — top graphene source with top gate configuration

Materials

Materials described outside the worked examples.

graphene

Electrode Source

semiconducting channel material (non-graphene)

Claimed Channel Material

transition metal dichalcogenide

Process steps

Additional fabrication and treatment steps described in the patent.

Cvd Growth

Step 1

Process details

description:Monolayer graphene grown by chemical vapor deposition (CVD) and transferred onto a silicon wafer with about 300 nm thick SiO₂ layer

Materials:

Reported properties

Performance values and ranges asserted in the specification or claims.

Property	Value	Material
room temperature on-off current ratio	≥ 10 dimensionless	MoS₂
room temperature on-off current ratio (claim 9)	≥ 1000 dimensionless

Why these are connected

Related documents with shared materials, methods, properties, or citations.

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