Ultra-clean interface between high k dielectric and 2D MoS2

Han Yan; Yan Wang; Yang Li; Dibya Phuyal; Lixin Liu; Hailing Guo; Yuzheng Guo; Tien-Lin Lee; Min Hyuk Kim; Hu Young Jeong; Manish Chhowalla

doi:10.48550/arxiv.2507.18010

Paper details

Research paper

Experimental CharacterizationComputational DFT

Ultra-clean interface between high k dielectric and 2D MoS₂

Han Yan, Yan Wang, Yang Li, Dibya Phuyal et al.

2025

Samples

Each sample groups how it was prepared, characterized, and measured. Click a card to expand.

Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately doped Si substrate for AFM, Raman, PL, XPS, and device measurements.

2 preparations5 characterizations4 properties4 figures

ExperimentalMoS₂Studied MaterialSiO₂Substrate / DielectricSiSubstrate / Dielectric

Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately doped Si substrate for AFM, Raman, PL, XPS, and device measurements.

2 preparations5 characterizations3 properties4 figures

ExperimentalMoS₂Studied MaterialHfO₂Substrate / DielectricSiSubstrate / Dielectric

Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately doped Si substrate for AFM, Raman, PL, XPS, and device measurements.

2 preparations5 characterizations3 properties4 figures

ExperimentalMoS₂Studied MaterialZrO₂Substrate / DielectricSiSubstrate / Dielectric

Few-layer WSe₂ mechanically exfoliated and placed on SiO₂ / degenerately doped Si substrate for FET comparison.

1 preparation1 characterization3 properties2 figures

ExperimentalWSe₂Studied MaterialSiO₂Substrate / DielectricSiSubstrate / Dielectric

Few-layer WSe₂ mechanically exfoliated and placed on HfO₂ / degenerately doped Si substrate for FET comparison.

1 preparation1 characterization3 properties2 figures

ExperimentalWSe₂Studied MaterialHfO₂Substrate / DielectricSiSubstrate / Dielectric

Few-layer WSe₂ mechanically exfoliated and placed on ZrO₂ / degenerately doped Si substrate for FET comparison.

1 preparation1 characterization3 properties2 figures

ExperimentalWSe₂Studied MaterialZrO₂Substrate / DielectricSiSubstrate / Dielectric

Top-gate FET stack based on multilayer or monolayer MoS₂ with ZrO₂ dielectric and Pd/Au gate metal.

1 preparation2 characterizations2 properties1 figure

ExperimentalMoS₂Studied MaterialZrO₂Substrate / DielectricPdCapping Or ContactAuCapping Or Contact

Materials

MoS₂

Studied Material

Variables

dimensionality= 2D TMD

studied material

WSe₂

Studied Material

Variables

dimensionality

Why these are connected

Related documents with shared materials, methods, properties, or citations.

Ultra-clean interface between high k dielectric and 2D MoS2 | Matter42 Literature

Properties

Type	Label	Value	Material	Sample	Source
Layer Thickness	MoS₂ thickness	0.7nm	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately	—
Raman Peak	E2g	—cm⁻¹	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Raman Peak	A1g	—cm⁻¹	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
PL Peak	exciton/trion emission	—eV	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Fet Threshold Voltage	threshold voltage	0.36V	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Fet Subthreshold Swing	SS	75mV/dec	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Fet On Current	ON current	400uA	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Fet On Current	ON current	200uA/um	WSe₂	Few-layer WSe₂ mechanically exfoliated and placed on SiO₂ / Few-layer WSe₂ mechanically exfoliated and placed on HfO₂ / Few-layer WSe₂ mechanically exfoliated and placed on ZrO₂ /	—
Fet On Current	ON current	30uA/um	WSe₂	Few-layer WSe₂ mechanically exfoliated and placed on SiO₂ / Few-layer WSe₂ mechanically exfoliated and placed on HfO₂ / Few-layer WSe₂ mechanically exfoliated and placed on ZrO₂ /	—
Fet On Current	ON current	1.5uA/um	WSe₂	Few-layer WSe₂ mechanically exfoliated and placed on SiO₂ / Few-layer WSe₂ mechanically exfoliated and placed on HfO₂ / Few-layer WSe₂ mechanically exfoliated and placed on ZrO₂ /	—
Equivalent Oxide Thickness	EOT	0.86nm	ZrO₂	Top-gate FET stack based on multilayer or monolayer MoS₂ wit	—
Fet Subthreshold Swing	SS	80mV/dec	MoS₂	Top-gate FET stack based on multilayer or monolayer MoS₂ wit	—

Properties

Type	Label	Value	Material	Sample	Source
Layer Thickness	MoS₂ thickness	0.7nm	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately	—
Raman Peak	E2g	—cm⁻¹	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Raman Peak	A1g	—cm⁻¹	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
PL Peak	exciton/trion emission	—eV	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Fet Threshold Voltage	threshold voltage	0.36V	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Fet Subthreshold Swing	SS	75mV/dec	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Fet On Current	ON current	400uA	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Fet On Current	ON current	200uA/um	WSe₂	Few-layer WSe₂ mechanically exfoliated and placed on SiO₂ / Few-layer WSe₂ mechanically exfoliated and placed on HfO₂ / Few-layer WSe₂ mechanically exfoliated and placed on ZrO₂ /	—
Fet On Current	ON current	30uA/um	WSe₂	Few-layer WSe₂ mechanically exfoliated and placed on SiO₂ / Few-layer WSe₂ mechanically exfoliated and placed on HfO₂ / Few-layer WSe₂ mechanically exfoliated and placed on ZrO₂ /	—
Fet On Current	ON current	1.5uA/um	WSe₂	Few-layer WSe₂ mechanically exfoliated and placed on SiO₂ / Few-layer WSe₂ mechanically exfoliated and placed on HfO₂ / Few-layer WSe₂ mechanically exfoliated and placed on ZrO₂ /	—
Equivalent Oxide Thickness	EOT	0.86nm	ZrO₂	Top-gate FET stack based on multilayer or monolayer MoS₂ wit	—
Fet Subthreshold Swing	SS	80mV/dec	MoS₂	Top-gate FET stack based on multilayer or monolayer MoS₂ wit	—

Properties

Type	Label	Value	Material	Sample	Source
Layer Thickness	MoS₂ thickness	0.7nm	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately	—
Raman Peak	E2g	—cm⁻¹	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Raman Peak	A1g	—cm⁻¹	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
PL Peak	exciton/trion emission	—eV	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Fet Threshold Voltage	threshold voltage	0.36V	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Fet Subthreshold Swing	SS	75mV/dec	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Fet On Current	ON current	400uA	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Fet On Current	ON current	200uA/um	WSe₂	Few-layer WSe₂ mechanically exfoliated and placed on SiO₂ / Few-layer WSe₂ mechanically exfoliated and placed on HfO₂ / Few-layer WSe₂ mechanically exfoliated and placed on ZrO₂ /	—
Fet On Current	ON current	30uA/um	WSe₂	Few-layer WSe₂ mechanically exfoliated and placed on SiO₂ / Few-layer WSe₂ mechanically exfoliated and placed on HfO₂ / Few-layer WSe₂ mechanically exfoliated and placed on ZrO₂ /	—
Fet On Current	ON current	1.5uA/um	WSe₂	Few-layer WSe₂ mechanically exfoliated and placed on SiO₂ / Few-layer WSe₂ mechanically exfoliated and placed on HfO₂ / Few-layer WSe₂ mechanically exfoliated and placed on ZrO₂ /	—
Equivalent Oxide Thickness	EOT	0.86nm	ZrO₂	Top-gate FET stack based on multilayer or monolayer MoS₂ wit	—
Fet Subthreshold Swing	SS	80mV/dec	MoS₂	Top-gate FET stack based on multilayer or monolayer MoS₂ wit	—

Properties

Type	Label	Value	Material	Sample	Source
Layer Thickness	MoS₂ thickness	0.7nm	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately	—
Raman Peak	E2g	—cm⁻¹	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Raman Peak	A1g	—cm⁻¹	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
PL Peak	exciton/trion emission	—eV	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Fet Threshold Voltage	threshold voltage	0.36V	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Fet Subthreshold Swing	SS	75mV/dec	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Fet On Current	ON current	400uA	MoS₂	Transferred CVD monolayer MoS₂ on 90 nm SiO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm HfO₂ / degenerately Transferred CVD monolayer MoS₂ on 40 nm ZrO₂ / degenerately	—
Fet On Current	ON current	200uA/um	WSe₂	Few-layer WSe₂ mechanically exfoliated and placed on SiO₂ / Few-layer WSe₂ mechanically exfoliated and placed on HfO₂ / Few-layer WSe₂ mechanically exfoliated and placed on ZrO₂ /	—
Fet On Current	ON current	30uA/um	WSe₂	Few-layer WSe₂ mechanically exfoliated and placed on SiO₂ / Few-layer WSe₂ mechanically exfoliated and placed on HfO₂ / Few-layer WSe₂ mechanically exfoliated and placed on ZrO₂ /	—
Fet On Current	ON current	1.5uA/um	WSe₂	Few-layer WSe₂ mechanically exfoliated and placed on SiO₂ / Few-layer WSe₂ mechanically exfoliated and placed on HfO₂ / Few-layer WSe₂ mechanically exfoliated and placed on ZrO₂ /	—
Equivalent Oxide Thickness	EOT	0.86nm	ZrO₂	Top-gate FET stack based on multilayer or monolayer MoS₂ wit	—
Fet Subthreshold Swing	SS	80mV/dec	MoS₂	Top-gate FET stack based on multilayer or monolayer MoS₂ wit	—