Patent
US 8,852,342FORMATION OF A VICINAL SEMICONDUCTOR-CARBON ALLOY SURFACE AND A GRAPHENE LAYER THEREUPON
Christos D. Dimitrakopoulos
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 8,852,342Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is an atomic force microscopy (AFM) image of a 20 m x 20 m area of a surface of a prior art single crystalline silicon carbide substrate that has been …
FIG. 2 is a schematic vertical cross-sectional view of an exemplary structure prior to deposition of semiconductor islands according to an embodiment of the …
FIG. 3 is a schematic vertical cross-sectional view of the exemplary structure after deposition of semiconductor islands according to an embodiment of the …
FIGS. 4A, 4 B, 4C, and 4D are atomic force microscopy (AFM) images of a sample of a single crystalline silicon carbide surface on which silicon islands are …
FIG. 5 is a schematic vertical cross-sectional view of the exemplary structure after placement of a substrate according to an embodiment of the present …
FIG. 6 is a schematic vertical cross-sectional view of the exemplary structure during an anneal of an assembly including the single crystalline …
FIG. 7 is a schematic vertical cross-sectional view of an exemplary substrate having a vicinal surface according to an embodiment of the present disclosure. …
FIG. 8 is a schematic vertical cross-sectional view of a first exemplary structure after an anneal according to a first embodiment of the present disclosure. …
FIG. 9 is a schematic vertical cross-sectional view of the first exemplary structure after separation of the single crystalline semiconductor-carbon alloy layer …
FIG. 10 is a schematic vertical cross-sectional view of a second exemplary structure after formation of a graphene layer according to a second embodiment of …
FIG. 11 is a schematic vertical cross-sectional view of the second exemplary structure after separation of the single crystalline semiconductor-carbon alloy …
FIGS. 12A, 12B, and 12C are atomic force microscopy (AFM) images of vicinal surfaces including a graphene layer on silicon carbide substrate samples annealed …
FIG. 13 is a graph showing the Raman spectroscopy data from a surface of a sample of a vicinal surface including a graphene layer formed on a silicon carbide …
FIG. 14 is a vertical cross-sectional view of an exemplary graphene-based field effect transistor according to an embodiment of the present disclosure.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of forming a structure, said method comprising: femnmin g depositing semiconductor islands on a surface of a single crystalline semiconductor-carbon alloy layer by adding a semiconductor material onto said surface of said sin gl e crystalline semiconductor-carbon alloy layer, said semiconductor islands having a different composition than said single crystalline semiconductor-carbon alloy layer and including a non-carbon material of said single crystalline semiconductor-carbon alloy layer and not including carbon; and annealing said single crystalline semiconductor-carbon alloy layer while a substrate is placed on said semiconductor islands, wherein said surface of said single crystalline semiconductor-carbon alloy layer becomes a vicinal surface during said annealing.
The method of Claim 1, wherein said semiconductor islands comprise a same semiconductor material as a component semiconductor material of said single crystalline semiconductor-carbon alloy layer.
The method of Claim 1, wherein said semiconductor islands do not contact one another immediately after formation.
The method of Claim 1, wherein said annealing is performed at a temperature that induces evaporation of said semiconductor islands from between said surface of a single crystalline semiconductor-carbon alloy layer and said substrate.
The method of Claim 1, wherein said surface of said single crystalline semiconductor-carbon alloy layer is at an angle between 88 degrees and 89.999 degrees with a crystallographic orientation of said single crystalline semiconductor-carbon alloy layer.
The method of Claim 1, wherein said single crystalline semiconductor-carbon alloy layer is a single crystalline silicon carbide layer.
The method of Claim 1, wherein said substrate includes another single crystalline semiconductor-carbon alloy layer, wherein a surface of said another single crystalline semiconductor-carbon alloy layer faces said surface of said single crystalline semiconductor-carbon alloy layer during said annealing.
The method of Claim 1, wherein a graphene layer including at least one graphene monolayer is formed at said vicinal surface as semiconductor atoms evaporate from said vicinal surface during said annealing.
A structure comprising: a single crystalline semiconductor-carbon alloy layer having a vicinal surface; and a graphene layer including at least one graphene monolayer and located on said vicinal surface. withdrawn
The structure of Claim 19, wherein said single crystalline semiconductor- carbon alloy layer is a single crystalline silicon carbide layer, and said vicinal surface has ledges having a width greater than 100 nm and steps having a height of a single atomic bilayer of silicon carbide between adjacent ledges. withdrawn
The structure of Claim 19, further comprising at least one device configured to pass electrical current through a portion of said graphene layer. 5 I:\IBM\ 1 05\24984 \A MEND\24984.a m 2.doc withdrawn
The structure of Claim 19, wherein said surface carbon alloy layer is is at an angle between 88 orientation of said single crystalline semiconductor-carbon
The structure of Claim 19, wherein said single a single crystalline silicon carbide layer. 6 I:\ I BM\ withdrawn of said single crystalline semiconductor-degrees and 89.999 degrees with a crystallographic alloy layer. withdrawn crystallographic orientation is a maj or indices are less than 7 in absolute value. crystalline semiconductor- carbon alloy layer is 1 05\24984\AMEND\24984.am2.doc
Layer stacks claimed or described, ordered top of device to substrate.
graphene on vicinal SiC structure
graphene-based field effect transistor
Materials described outside the worked examples.
single crystalline semiconductor-carbon alloy layer
semiconductor islands
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 is an atomic force microscopy (AFM) image of a 20 m x 20 m area of a surface of a prior art single crystalline silicon carbide substrate that has been …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 10–500 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
GRAPHENE-BIOMOLECULE BIOELECTRONIC DEVICES
GRAPHENE OXIDE SHEET, ARTICLE CONTAINING GRAPHENE-CONTAINING SUBSTANCE PRODUCED BY REDUCING THE GRAPHENE OXIDE SHEET, AND PROCESS FOR PRODUCTION OF THE GRAPHENE OXIDE SHEET
Patent
Atlas literature
Patent
US 8,852,342Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is an atomic force microscopy (AFM) image of a 20 m x 20 m area of a surface of a prior art single crystalline silicon carbide substrate that has been …
FIG. 2 is a schematic vertical cross-sectional view of an exemplary structure prior to deposition of semiconductor islands according to an embodiment of the …
FIG. 3 is a schematic vertical cross-sectional view of the exemplary structure after deposition of semiconductor islands according to an embodiment of the …
FIGS. 4A, 4 B, 4C, and 4D are atomic force microscopy (AFM) images of a sample of a single crystalline silicon carbide surface on which silicon islands are …
FIG. 5 is a schematic vertical cross-sectional view of the exemplary structure after placement of a substrate according to an embodiment of the present …
FIG. 6 is a schematic vertical cross-sectional view of the exemplary structure during an anneal of an assembly including the single crystalline …
FIG. 7 is a schematic vertical cross-sectional view of an exemplary substrate having a vicinal surface according to an embodiment of the present disclosure. …
FIG. 8 is a schematic vertical cross-sectional view of a first exemplary structure after an anneal according to a first embodiment of the present disclosure. …
FIG. 9 is a schematic vertical cross-sectional view of the first exemplary structure after separation of the single crystalline semiconductor-carbon alloy layer …
FIG. 10 is a schematic vertical cross-sectional view of a second exemplary structure after formation of a graphene layer according to a second embodiment of …
FIG. 11 is a schematic vertical cross-sectional view of the second exemplary structure after separation of the single crystalline semiconductor-carbon alloy …
FIGS. 12A, 12B, and 12C are atomic force microscopy (AFM) images of vicinal surfaces including a graphene layer on silicon carbide substrate samples annealed …
FIG. 13 is a graph showing the Raman spectroscopy data from a surface of a sample of a vicinal surface including a graphene layer formed on a silicon carbide …
FIG. 14 is a vertical cross-sectional view of an exemplary graphene-based field effect transistor according to an embodiment of the present disclosure.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of forming a structure, said method comprising: femnmin g depositing semiconductor islands on a surface of a single crystalline semiconductor-carbon alloy layer by adding a semiconductor material onto said surface of said sin gl e crystalline semiconductor-carbon alloy layer, said semiconductor islands having a different composition than said single crystalline semiconductor-carbon alloy layer and including a non-carbon material of said single crystalline semiconductor-carbon alloy layer and not including carbon; and annealing said single crystalline semiconductor-carbon alloy layer while a substrate is placed on said semiconductor islands, wherein said surface of said single crystalline semiconductor-carbon alloy layer becomes a vicinal surface during said annealing.
The method of Claim 1, wherein said semiconductor islands comprise a same semiconductor material as a component semiconductor material of said single crystalline semiconductor-carbon alloy layer.
The method of Claim 1, wherein said semiconductor islands do not contact one another immediately after formation.
The method of Claim 1, wherein said annealing is performed at a temperature that induces evaporation of said semiconductor islands from between said surface of a single crystalline semiconductor-carbon alloy layer and said substrate.
The method of Claim 1, wherein said surface of said single crystalline semiconductor-carbon alloy layer is at an angle between 88 degrees and 89.999 degrees with a crystallographic orientation of said single crystalline semiconductor-carbon alloy layer.
The method of Claim 1, wherein said single crystalline semiconductor-carbon alloy layer is a single crystalline silicon carbide layer.
The method of Claim 1, wherein said substrate includes another single crystalline semiconductor-carbon alloy layer, wherein a surface of said another single crystalline semiconductor-carbon alloy layer faces said surface of said single crystalline semiconductor-carbon alloy layer during said annealing.
The method of Claim 1, wherein a graphene layer including at least one graphene monolayer is formed at said vicinal surface as semiconductor atoms evaporate from said vicinal surface during said annealing.
A structure comprising: a single crystalline semiconductor-carbon alloy layer having a vicinal surface; and a graphene layer including at least one graphene monolayer and located on said vicinal surface. withdrawn
The structure of Claim 19, wherein said single crystalline semiconductor- carbon alloy layer is a single crystalline silicon carbide layer, and said vicinal surface has ledges having a width greater than 100 nm and steps having a height of a single atomic bilayer of silicon carbide between adjacent ledges. withdrawn
The structure of Claim 19, further comprising at least one device configured to pass electrical current through a portion of said graphene layer. 5 I:\IBM\ 1 05\24984 \A MEND\24984.a m 2.doc withdrawn
The structure of Claim 19, wherein said surface carbon alloy layer is is at an angle between 88 orientation of said single crystalline semiconductor-carbon
The structure of Claim 19, wherein said single a single crystalline silicon carbide layer. 6 I:\ I BM\ withdrawn of said single crystalline semiconductor-degrees and 89.999 degrees with a crystallographic alloy layer. withdrawn crystallographic orientation is a maj or indices are less than 7 in absolute value. crystalline semiconductor- carbon alloy layer is 1 05\24984\AMEND\24984.am2.doc
Layer stacks claimed or described, ordered top of device to substrate.
graphene on vicinal SiC structure
graphene-based field effect transistor
Materials described outside the worked examples.
single crystalline semiconductor-carbon alloy layer
semiconductor islands
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 is an atomic force microscopy (AFM) image of a 20 m x 20 m area of a surface of a prior art single crystalline silicon carbide substrate that has been …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 10–500 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
GRAPHENE-BIOMOLECULE BIOELECTRONIC DEVICES
GRAPHENE OXIDE SHEET, ARTICLE CONTAINING GRAPHENE-CONTAINING SUBSTANCE PRODUCED BY REDUCING THE GRAPHENE OXIDE SHEET, AND PROCESS FOR PRODUCTION OF THE GRAPHENE OXIDE SHEET
Patent
Atlas literature
Patent
US 8,852,342Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is an atomic force microscopy (AFM) image of a 20 m x 20 m area of a surface of a prior art single crystalline silicon carbide substrate that has been …
FIG. 2 is a schematic vertical cross-sectional view of an exemplary structure prior to deposition of semiconductor islands according to an embodiment of the …
FIG. 3 is a schematic vertical cross-sectional view of the exemplary structure after deposition of semiconductor islands according to an embodiment of the …
FIGS. 4A, 4 B, 4C, and 4D are atomic force microscopy (AFM) images of a sample of a single crystalline silicon carbide surface on which silicon islands are …
FIG. 5 is a schematic vertical cross-sectional view of the exemplary structure after placement of a substrate according to an embodiment of the present …
FIG. 6 is a schematic vertical cross-sectional view of the exemplary structure during an anneal of an assembly including the single crystalline …
FIG. 7 is a schematic vertical cross-sectional view of an exemplary substrate having a vicinal surface according to an embodiment of the present disclosure. …
FIG. 8 is a schematic vertical cross-sectional view of a first exemplary structure after an anneal according to a first embodiment of the present disclosure. …
FIG. 9 is a schematic vertical cross-sectional view of the first exemplary structure after separation of the single crystalline semiconductor-carbon alloy layer …
FIG. 10 is a schematic vertical cross-sectional view of a second exemplary structure after formation of a graphene layer according to a second embodiment of …
FIG. 11 is a schematic vertical cross-sectional view of the second exemplary structure after separation of the single crystalline semiconductor-carbon alloy …
FIGS. 12A, 12B, and 12C are atomic force microscopy (AFM) images of vicinal surfaces including a graphene layer on silicon carbide substrate samples annealed …
FIG. 13 is a graph showing the Raman spectroscopy data from a surface of a sample of a vicinal surface including a graphene layer formed on a silicon carbide …
FIG. 14 is a vertical cross-sectional view of an exemplary graphene-based field effect transistor according to an embodiment of the present disclosure.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of forming a structure, said method comprising: femnmin g depositing semiconductor islands on a surface of a single crystalline semiconductor-carbon alloy layer by adding a semiconductor material onto said surface of said sin gl e crystalline semiconductor-carbon alloy layer, said semiconductor islands having a different composition than said single crystalline semiconductor-carbon alloy layer and including a non-carbon material of said single crystalline semiconductor-carbon alloy layer and not including carbon; and annealing said single crystalline semiconductor-carbon alloy layer while a substrate is placed on said semiconductor islands, wherein said surface of said single crystalline semiconductor-carbon alloy layer becomes a vicinal surface during said annealing.
The method of Claim 1, wherein said semiconductor islands comprise a same semiconductor material as a component semiconductor material of said single crystalline semiconductor-carbon alloy layer.
The method of Claim 1, wherein said semiconductor islands do not contact one another immediately after formation.
The method of Claim 1, wherein said annealing is performed at a temperature that induces evaporation of said semiconductor islands from between said surface of a single crystalline semiconductor-carbon alloy layer and said substrate.
The method of Claim 1, wherein said surface of said single crystalline semiconductor-carbon alloy layer is at an angle between 88 degrees and 89.999 degrees with a crystallographic orientation of said single crystalline semiconductor-carbon alloy layer.
The method of Claim 1, wherein said single crystalline semiconductor-carbon alloy layer is a single crystalline silicon carbide layer.
The method of Claim 1, wherein said substrate includes another single crystalline semiconductor-carbon alloy layer, wherein a surface of said another single crystalline semiconductor-carbon alloy layer faces said surface of said single crystalline semiconductor-carbon alloy layer during said annealing.
The method of Claim 1, wherein a graphene layer including at least one graphene monolayer is formed at said vicinal surface as semiconductor atoms evaporate from said vicinal surface during said annealing.
A structure comprising: a single crystalline semiconductor-carbon alloy layer having a vicinal surface; and a graphene layer including at least one graphene monolayer and located on said vicinal surface. withdrawn
The structure of Claim 19, wherein said single crystalline semiconductor- carbon alloy layer is a single crystalline silicon carbide layer, and said vicinal surface has ledges having a width greater than 100 nm and steps having a height of a single atomic bilayer of silicon carbide between adjacent ledges. withdrawn
The structure of Claim 19, further comprising at least one device configured to pass electrical current through a portion of said graphene layer. 5 I:\IBM\ 1 05\24984 \A MEND\24984.a m 2.doc withdrawn
The structure of Claim 19, wherein said surface carbon alloy layer is is at an angle between 88 orientation of said single crystalline semiconductor-carbon
The structure of Claim 19, wherein said single a single crystalline silicon carbide layer. 6 I:\ I BM\ withdrawn of said single crystalline semiconductor-degrees and 89.999 degrees with a crystallographic alloy layer. withdrawn crystallographic orientation is a maj or indices are less than 7 in absolute value. crystalline semiconductor- carbon alloy layer is 1 05\24984\AMEND\24984.am2.doc
Layer stacks claimed or described, ordered top of device to substrate.
graphene on vicinal SiC structure
graphene-based field effect transistor
Materials described outside the worked examples.
single crystalline semiconductor-carbon alloy layer
semiconductor islands
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 is an atomic force microscopy (AFM) image of a 20 m x 20 m area of a surface of a prior art single crystalline silicon carbide substrate that has been …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 10–500 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
GRAPHENE-BIOMOLECULE BIOELECTRONIC DEVICES
GRAPHENE OXIDE SHEET, ARTICLE CONTAINING GRAPHENE-CONTAINING SUBSTANCE PRODUCED BY REDUCING THE GRAPHENE OXIDE SHEET, AND PROCESS FOR PRODUCTION OF THE GRAPHENE OXIDE SHEET
Patent
Atlas literature
Patent
US 8,852,342Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is an atomic force microscopy (AFM) image of a 20 m x 20 m area of a surface of a prior art single crystalline silicon carbide substrate that has been …
FIG. 2 is a schematic vertical cross-sectional view of an exemplary structure prior to deposition of semiconductor islands according to an embodiment of the …
FIG. 3 is a schematic vertical cross-sectional view of the exemplary structure after deposition of semiconductor islands according to an embodiment of the …
FIGS. 4A, 4 B, 4C, and 4D are atomic force microscopy (AFM) images of a sample of a single crystalline silicon carbide surface on which silicon islands are …
FIG. 5 is a schematic vertical cross-sectional view of the exemplary structure after placement of a substrate according to an embodiment of the present …
FIG. 6 is a schematic vertical cross-sectional view of the exemplary structure during an anneal of an assembly including the single crystalline …
FIG. 7 is a schematic vertical cross-sectional view of an exemplary substrate having a vicinal surface according to an embodiment of the present disclosure. …
FIG. 8 is a schematic vertical cross-sectional view of a first exemplary structure after an anneal according to a first embodiment of the present disclosure. …
FIG. 9 is a schematic vertical cross-sectional view of the first exemplary structure after separation of the single crystalline semiconductor-carbon alloy layer …
FIG. 10 is a schematic vertical cross-sectional view of a second exemplary structure after formation of a graphene layer according to a second embodiment of …
FIG. 11 is a schematic vertical cross-sectional view of the second exemplary structure after separation of the single crystalline semiconductor-carbon alloy …
FIGS. 12A, 12B, and 12C are atomic force microscopy (AFM) images of vicinal surfaces including a graphene layer on silicon carbide substrate samples annealed …
FIG. 13 is a graph showing the Raman spectroscopy data from a surface of a sample of a vicinal surface including a graphene layer formed on a silicon carbide …
FIG. 14 is a vertical cross-sectional view of an exemplary graphene-based field effect transistor according to an embodiment of the present disclosure.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of forming a structure, said method comprising: femnmin g depositing semiconductor islands on a surface of a single crystalline semiconductor-carbon alloy layer by adding a semiconductor material onto said surface of said sin gl e crystalline semiconductor-carbon alloy layer, said semiconductor islands having a different composition than said single crystalline semiconductor-carbon alloy layer and including a non-carbon material of said single crystalline semiconductor-carbon alloy layer and not including carbon; and annealing said single crystalline semiconductor-carbon alloy layer while a substrate is placed on said semiconductor islands, wherein said surface of said single crystalline semiconductor-carbon alloy layer becomes a vicinal surface during said annealing.
The method of Claim 1, wherein said semiconductor islands comprise a same semiconductor material as a component semiconductor material of said single crystalline semiconductor-carbon alloy layer.
The method of Claim 1, wherein said semiconductor islands do not contact one another immediately after formation.
The method of Claim 1, wherein said annealing is performed at a temperature that induces evaporation of said semiconductor islands from between said surface of a single crystalline semiconductor-carbon alloy layer and said substrate.
The method of Claim 1, wherein said surface of said single crystalline semiconductor-carbon alloy layer is at an angle between 88 degrees and 89.999 degrees with a crystallographic orientation of said single crystalline semiconductor-carbon alloy layer.
The method of Claim 1, wherein said single crystalline semiconductor-carbon alloy layer is a single crystalline silicon carbide layer.
The method of Claim 1, wherein said substrate includes another single crystalline semiconductor-carbon alloy layer, wherein a surface of said another single crystalline semiconductor-carbon alloy layer faces said surface of said single crystalline semiconductor-carbon alloy layer during said annealing.
The method of Claim 1, wherein a graphene layer including at least one graphene monolayer is formed at said vicinal surface as semiconductor atoms evaporate from said vicinal surface during said annealing.
A structure comprising: a single crystalline semiconductor-carbon alloy layer having a vicinal surface; and a graphene layer including at least one graphene monolayer and located on said vicinal surface. withdrawn
The structure of Claim 19, wherein said single crystalline semiconductor- carbon alloy layer is a single crystalline silicon carbide layer, and said vicinal surface has ledges having a width greater than 100 nm and steps having a height of a single atomic bilayer of silicon carbide between adjacent ledges. withdrawn
The structure of Claim 19, further comprising at least one device configured to pass electrical current through a portion of said graphene layer. 5 I:\IBM\ 1 05\24984 \A MEND\24984.a m 2.doc withdrawn
The structure of Claim 19, wherein said surface carbon alloy layer is is at an angle between 88 orientation of said single crystalline semiconductor-carbon
The structure of Claim 19, wherein said single a single crystalline silicon carbide layer. 6 I:\ I BM\ withdrawn of said single crystalline semiconductor-degrees and 89.999 degrees with a crystallographic alloy layer. withdrawn crystallographic orientation is a maj or indices are less than 7 in absolute value. crystalline semiconductor- carbon alloy layer is 1 05\24984\AMEND\24984.am2.doc
Layer stacks claimed or described, ordered top of device to substrate.
graphene on vicinal SiC structure
graphene-based field effect transistor
Materials described outside the worked examples.
single crystalline semiconductor-carbon alloy layer
semiconductor islands
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 is an atomic force microscopy (AFM) image of a 20 m x 20 m area of a surface of a prior art single crystalline silicon carbide substrate that has been …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 10–500 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
GRAPHENE-BIOMOLECULE BIOELECTRONIC DEVICES
GRAPHENE OXIDE SHEET, ARTICLE CONTAINING GRAPHENE-CONTAINING SUBSTANCE PRODUCED BY REDUCING THE GRAPHENE OXIDE SHEET, AND PROCESS FOR PRODUCTION OF THE GRAPHENE OXIDE SHEET
semiconductor material (non-carbon)
single crystalline silicon carbide
SiC
silicon islands
Si
graphene layer
C
single crystalline germanium carbide layer
high purity graphite handle substrate
FIGS. 4A, 4 B, 4C, and 4D are atomic force microscopy (AFM) images of a sample of a single crystalline silicon carbide surface on which silicon islands are …
FIGS. 12A, 12B, and 12C are atomic force microscopy (AFM) images of vicinal surfaces including a graphene layer on silicon carbide substrate samples annealed …
FIG. 13 is a graph showing the Raman spectroscopy data from a surface of a sample of a vicinal surface including a graphene layer formed on a silicon carbide …
FIG. 13 is a graph showing the Raman spectroscopy data from a surface of a sample of a vicinal surface including a graphene layer formed on a silicon carbide …
FIG. 14 is a vertical cross-sectional view of an exemplary graphene-based field effect transistor according to an embodiment of the present disclosure.
| 50–300 nm |
| — |
Temperature | 500–850 °C | — |
Temperature | 550–800 °C | — |
Flow Rate | 0.1–100 sccm | — |
Duration | 600–43200 s | — |
Pressure | 0.0001–760 Torr | — |
Duration | 10–3600 s | — |
Duration | 30–600 s | — |
Pressure | 0.000001 Torr | — |
Thickness | ≤ 1 µm | — |
Temperature | ≥ 1414 °C | — |
Temperature | ≥ 938.25 °C | — |
Thickness | ≥ 1 nm | — |
semiconductor material (non-carbon)
single crystalline silicon carbide
SiC
silicon islands
Si
graphene layer
C
single crystalline germanium carbide layer
high purity graphite handle substrate
FIGS. 4A, 4 B, 4C, and 4D are atomic force microscopy (AFM) images of a sample of a single crystalline silicon carbide surface on which silicon islands are …
FIGS. 12A, 12B, and 12C are atomic force microscopy (AFM) images of vicinal surfaces including a graphene layer on silicon carbide substrate samples annealed …
FIG. 13 is a graph showing the Raman spectroscopy data from a surface of a sample of a vicinal surface including a graphene layer formed on a silicon carbide …
FIG. 13 is a graph showing the Raman spectroscopy data from a surface of a sample of a vicinal surface including a graphene layer formed on a silicon carbide …
FIG. 14 is a vertical cross-sectional view of an exemplary graphene-based field effect transistor according to an embodiment of the present disclosure.
| 50–300 nm |
| — |
Temperature | 500–850 °C | — |
Temperature | 550–800 °C | — |
Flow Rate | 0.1–100 sccm | — |
Duration | 600–43200 s | — |
Pressure | 0.0001–760 Torr | — |
Duration | 10–3600 s | — |
Duration | 30–600 s | — |
Pressure | 0.000001 Torr | — |
Thickness | ≤ 1 µm | — |
Temperature | ≥ 1414 °C | — |
Temperature | ≥ 938.25 °C | — |
Thickness | ≥ 1 nm | — |
semiconductor material (non-carbon)
single crystalline silicon carbide
SiC
silicon islands
Si
graphene layer
C
single crystalline germanium carbide layer
high purity graphite handle substrate
FIGS. 4A, 4 B, 4C, and 4D are atomic force microscopy (AFM) images of a sample of a single crystalline silicon carbide surface on which silicon islands are …
FIGS. 12A, 12B, and 12C are atomic force microscopy (AFM) images of vicinal surfaces including a graphene layer on silicon carbide substrate samples annealed …
FIG. 13 is a graph showing the Raman spectroscopy data from a surface of a sample of a vicinal surface including a graphene layer formed on a silicon carbide …
FIG. 13 is a graph showing the Raman spectroscopy data from a surface of a sample of a vicinal surface including a graphene layer formed on a silicon carbide …
FIG. 14 is a vertical cross-sectional view of an exemplary graphene-based field effect transistor according to an embodiment of the present disclosure.
| 50–300 nm |
| — |
Temperature | 500–850 °C | — |
Temperature | 550–800 °C | — |
Flow Rate | 0.1–100 sccm | — |
Duration | 600–43200 s | — |
Pressure | 0.0001–760 Torr | — |
Duration | 10–3600 s | — |
Duration | 30–600 s | — |
Pressure | 0.000001 Torr | — |
Thickness | ≤ 1 µm | — |
Temperature | ≥ 1414 °C | — |
Temperature | ≥ 938.25 °C | — |
Thickness | ≥ 1 nm | — |
semiconductor material (non-carbon)
single crystalline silicon carbide
SiC
silicon islands
Si
graphene layer
C
single crystalline germanium carbide layer
high purity graphite handle substrate
FIGS. 4A, 4 B, 4C, and 4D are atomic force microscopy (AFM) images of a sample of a single crystalline silicon carbide surface on which silicon islands are …
FIGS. 12A, 12B, and 12C are atomic force microscopy (AFM) images of vicinal surfaces including a graphene layer on silicon carbide substrate samples annealed …
FIG. 13 is a graph showing the Raman spectroscopy data from a surface of a sample of a vicinal surface including a graphene layer formed on a silicon carbide …
FIG. 13 is a graph showing the Raman spectroscopy data from a surface of a sample of a vicinal surface including a graphene layer formed on a silicon carbide …
FIG. 14 is a vertical cross-sectional view of an exemplary graphene-based field effect transistor according to an embodiment of the present disclosure.
| 50–300 nm |
| — |
Temperature | 500–850 °C | — |
Temperature | 550–800 °C | — |
Flow Rate | 0.1–100 sccm | — |
Duration | 600–43200 s | — |
Pressure | 0.0001–760 Torr | — |
Duration | 10–3600 s | — |
Duration | 30–600 s | — |
Pressure | 0.000001 Torr | — |
Thickness | ≤ 1 µm | — |
Temperature | ≥ 1414 °C | — |
Temperature | ≥ 938.25 °C | — |
Thickness | ≥ 1 nm | — |