Patent
Atlas literature
Patent
US 11,376,703Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 4a and 4bare each a cross-sectional view of t he {100 } indium phosphide (InP) wafer after having been cut and subjected to chamfering. In FIG 5, FIG 5 a …
FIGS. 5 b and 5c are respectively PL intensity maps showing the uniformity of the peak wavelength and luminescence intensity of the indium-gallium-arsenide …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1-10. Canceled
Canceled
A {100} indium phosphide wafer comprising: a wafer having a back side surface; and olive-shaped pits on the surface, wherein the olive shape is an oval-like shape with first and second ends that are narrow relative to a middle which is relatively wide, and he back side surface such that the t s have oval shapes with acute angles between long axes or between short axes of i e pits of not more than 10 0. Currently amended
The {100} indium phosphide wafer according to claim 11, wherein the pits are regularly distributed on the back side surface such that the pits have oval shapes with acute angles between long axes or between short axes of the pits of not more than. Currently amended
The {100} indium phosphide wafer according to claim 11, wherein the wafer has a first side surface and a second side surface; and pits on the first side surface or on the first and second sides surfaces. Previously presented
The {100} indium phosphide wafer according to claim 11, wherein the pits have an average long-axis length of 3 to 50 pm, and an average short-axis length of 1 to 30 pm. Previously presented
The {100} indium phosphide wafer according to claim 11, wherein the back side of the wafer has a surface roughness Ra in a range of 0.2 to 1.5 pm. Previously presented
The {100} indium phosphide wafer according to claim 11, wherein the pits on the back side of the wafer have a maximum depth of 5.0 pm, and not less than 30% of the pits have a depth more than 2.0 pm. Previously presented
A method for manufacturing the {100} indium phosphide wafer according to claim 11, wherein the method comprises: subjecting the indium phosphide wafer to surface lapping on both sides; etching the indium phosphide wafer by immersing it into etching solutions to produce etch pits; removing the indium phosphide wafer that has been etched and washing it with deionized water; protecting the back side surface of the indium phosphide wafer that has been etched; subjecting the indium phosphide wafer which has had the back side surface etched and protected to mechanical polishing and chemical polishing on the front side surface, and then washing it with deionized water; and de-protecting the back side surface of the indium phosphide wafer, wherein the etching solutions comprise an acidic substance, deionized water and an oxidizing agent; the acidic substance, deionized water and oxidizing agent present in the etching solutions are in ratios of 1:(0.02- 0.6):(1.5-6), based on mole ratio; the etching temperature has a range from 15 to 95 0C; and the etching time is from 10 to 600 s. Previously presented
The {1 00} indium phosphide wafer according of the wafer have a maximum depth of 3.5 pm, more than 1.0 pm. New layer detaches after heating. Previously {100} indium phosphide wafer according to claim water and an oxidizing agent, wherein the acidic present in etching solutions are in the ratios of 1: presented to claim 11, wherein the pits on the back side and not less than 30% of the pits have a depth
Canceled
The {100} indium phosphide wafer according to ' a, wherein the pits have an average long-axis length of 3 to pm, and an average short-axis length of 1 to pm. Currently amended
The {100} indium phosphide wafer according to r, wherein the back side of the wafer has a surface roughness Ra in a range of pm. Currently amended
The {100} indium phosphide wafer according to-, wherein the pits on the back side of the wafer have a maximum depth of 5 pm, and not less than of the pits have a depth more than pm. Currently amended
An etching solution for manufacturing the 11, comprising an acidic substance, a deionized substance, deionized water and oxidizing agent (0.02 to 0.6):(1.5-6), based on mole ratio. Previously
Embodiments described in the patent, grouped by the materials and process steps they use.
2 materials1 process step
Preparation of {100} InP wafer with regular olive-shaped pits on the back side surface. The wafer was lapped, etched in acidic solution with oxidizing agent, back side protected, front side mechanically and chemically polished. The back side surface was characterized by optical microscope at 500x showing regular olive-shaped pit morphology; long-axis parallel to [011], short-axis parallel to [0-11].
2 materials1 process step
Preparation of {100} InP wafer with regular olive-shaped pits on the back side surface under different etching conditions. Back side surface characterized by optical microscope at 500x showing regular olive-shaped pit morphology.
2 materials1 process step
Preparation of {100} InP wafer with irregular olive-shaped pits on the back side surface. Back side surface characterized by optical microscope at 500x showing irregular pit morphology compared with Examples 1 and 2.
2 materials
PL measurement of an InGaAs epitaxial layer grown on the {100} InP substrate having olive-shaped pits on the back side (from Example 1). PL spectra measured at 800-1800 nm at a single center point and PL intensity maps showing uniformity of peak wavelength and luminescence intensity across the wafer, compared to a control substrate with irregular backside morphology.
Layer stacks claimed or described, ordered top of device to substrate.
{100} indium phosphide wafer with olive-shaped back side pits
Measurements and analyses referenced in the patent, with their drawing references.
FIGS. 4a and 4bare each a cross-sectional view of t he {100 } indium phosphide (InP) wafer after having been cut and subjected to chamfering. In FIG 5, FIG 5 a …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Surface Roughness Ra | 0.2–1.5 µm | InP |
Pit Long Axis Length Average | 3–50 µm |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,376,703Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 4a and 4bare each a cross-sectional view of t he {100 } indium phosphide (InP) wafer after having been cut and subjected to chamfering. In FIG 5, FIG 5 a …
FIGS. 5 b and 5c are respectively PL intensity maps showing the uniformity of the peak wavelength and luminescence intensity of the indium-gallium-arsenide …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1-10. Canceled
Canceled
A {100} indium phosphide wafer comprising: a wafer having a back side surface; and olive-shaped pits on the surface, wherein the olive shape is an oval-like shape with first and second ends that are narrow relative to a middle which is relatively wide, and he back side surface such that the t s have oval shapes with acute angles between long axes or between short axes of i e pits of not more than 10 0. Currently amended
The {100} indium phosphide wafer according to claim 11, wherein the pits are regularly distributed on the back side surface such that the pits have oval shapes with acute angles between long axes or between short axes of the pits of not more than. Currently amended
The {100} indium phosphide wafer according to claim 11, wherein the wafer has a first side surface and a second side surface; and pits on the first side surface or on the first and second sides surfaces. Previously presented
The {100} indium phosphide wafer according to claim 11, wherein the pits have an average long-axis length of 3 to 50 pm, and an average short-axis length of 1 to 30 pm. Previously presented
The {100} indium phosphide wafer according to claim 11, wherein the back side of the wafer has a surface roughness Ra in a range of 0.2 to 1.5 pm. Previously presented
The {100} indium phosphide wafer according to claim 11, wherein the pits on the back side of the wafer have a maximum depth of 5.0 pm, and not less than 30% of the pits have a depth more than 2.0 pm. Previously presented
A method for manufacturing the {100} indium phosphide wafer according to claim 11, wherein the method comprises: subjecting the indium phosphide wafer to surface lapping on both sides; etching the indium phosphide wafer by immersing it into etching solutions to produce etch pits; removing the indium phosphide wafer that has been etched and washing it with deionized water; protecting the back side surface of the indium phosphide wafer that has been etched; subjecting the indium phosphide wafer which has had the back side surface etched and protected to mechanical polishing and chemical polishing on the front side surface, and then washing it with deionized water; and de-protecting the back side surface of the indium phosphide wafer, wherein the etching solutions comprise an acidic substance, deionized water and an oxidizing agent; the acidic substance, deionized water and oxidizing agent present in the etching solutions are in ratios of 1:(0.02- 0.6):(1.5-6), based on mole ratio; the etching temperature has a range from 15 to 95 0C; and the etching time is from 10 to 600 s. Previously presented
The {1 00} indium phosphide wafer according of the wafer have a maximum depth of 3.5 pm, more than 1.0 pm. New layer detaches after heating. Previously {100} indium phosphide wafer according to claim water and an oxidizing agent, wherein the acidic present in etching solutions are in the ratios of 1: presented to claim 11, wherein the pits on the back side and not less than 30% of the pits have a depth
Canceled
The {100} indium phosphide wafer according to ' a, wherein the pits have an average long-axis length of 3 to pm, and an average short-axis length of 1 to pm. Currently amended
The {100} indium phosphide wafer according to r, wherein the back side of the wafer has a surface roughness Ra in a range of pm. Currently amended
The {100} indium phosphide wafer according to-, wherein the pits on the back side of the wafer have a maximum depth of 5 pm, and not less than of the pits have a depth more than pm. Currently amended
An etching solution for manufacturing the 11, comprising an acidic substance, a deionized substance, deionized water and oxidizing agent (0.02 to 0.6):(1.5-6), based on mole ratio. Previously
Embodiments described in the patent, grouped by the materials and process steps they use.
2 materials1 process step
Preparation of {100} InP wafer with regular olive-shaped pits on the back side surface. The wafer was lapped, etched in acidic solution with oxidizing agent, back side protected, front side mechanically and chemically polished. The back side surface was characterized by optical microscope at 500x showing regular olive-shaped pit morphology; long-axis parallel to [011], short-axis parallel to [0-11].
2 materials1 process step
Preparation of {100} InP wafer with regular olive-shaped pits on the back side surface under different etching conditions. Back side surface characterized by optical microscope at 500x showing regular olive-shaped pit morphology.
2 materials1 process step
Preparation of {100} InP wafer with irregular olive-shaped pits on the back side surface. Back side surface characterized by optical microscope at 500x showing irregular pit morphology compared with Examples 1 and 2.
2 materials
PL measurement of an InGaAs epitaxial layer grown on the {100} InP substrate having olive-shaped pits on the back side (from Example 1). PL spectra measured at 800-1800 nm at a single center point and PL intensity maps showing uniformity of peak wavelength and luminescence intensity across the wafer, compared to a control substrate with irregular backside morphology.
Layer stacks claimed or described, ordered top of device to substrate.
{100} indium phosphide wafer with olive-shaped back side pits
Measurements and analyses referenced in the patent, with their drawing references.
FIGS. 4a and 4bare each a cross-sectional view of t he {100 } indium phosphide (InP) wafer after having been cut and subjected to chamfering. In FIG 5, FIG 5 a …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Surface Roughness Ra | 0.2–1.5 µm | InP |
Pit Long Axis Length Average | 3–50 µm |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,376,703Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 4a and 4bare each a cross-sectional view of t he {100 } indium phosphide (InP) wafer after having been cut and subjected to chamfering. In FIG 5, FIG 5 a …
FIGS. 5 b and 5c are respectively PL intensity maps showing the uniformity of the peak wavelength and luminescence intensity of the indium-gallium-arsenide …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1-10. Canceled
Canceled
A {100} indium phosphide wafer comprising: a wafer having a back side surface; and olive-shaped pits on the surface, wherein the olive shape is an oval-like shape with first and second ends that are narrow relative to a middle which is relatively wide, and he back side surface such that the t s have oval shapes with acute angles between long axes or between short axes of i e pits of not more than 10 0. Currently amended
The {100} indium phosphide wafer according to claim 11, wherein the pits are regularly distributed on the back side surface such that the pits have oval shapes with acute angles between long axes or between short axes of the pits of not more than. Currently amended
The {100} indium phosphide wafer according to claim 11, wherein the wafer has a first side surface and a second side surface; and pits on the first side surface or on the first and second sides surfaces. Previously presented
The {100} indium phosphide wafer according to claim 11, wherein the pits have an average long-axis length of 3 to 50 pm, and an average short-axis length of 1 to 30 pm. Previously presented
The {100} indium phosphide wafer according to claim 11, wherein the back side of the wafer has a surface roughness Ra in a range of 0.2 to 1.5 pm. Previously presented
The {100} indium phosphide wafer according to claim 11, wherein the pits on the back side of the wafer have a maximum depth of 5.0 pm, and not less than 30% of the pits have a depth more than 2.0 pm. Previously presented
A method for manufacturing the {100} indium phosphide wafer according to claim 11, wherein the method comprises: subjecting the indium phosphide wafer to surface lapping on both sides; etching the indium phosphide wafer by immersing it into etching solutions to produce etch pits; removing the indium phosphide wafer that has been etched and washing it with deionized water; protecting the back side surface of the indium phosphide wafer that has been etched; subjecting the indium phosphide wafer which has had the back side surface etched and protected to mechanical polishing and chemical polishing on the front side surface, and then washing it with deionized water; and de-protecting the back side surface of the indium phosphide wafer, wherein the etching solutions comprise an acidic substance, deionized water and an oxidizing agent; the acidic substance, deionized water and oxidizing agent present in the etching solutions are in ratios of 1:(0.02- 0.6):(1.5-6), based on mole ratio; the etching temperature has a range from 15 to 95 0C; and the etching time is from 10 to 600 s. Previously presented
The {1 00} indium phosphide wafer according of the wafer have a maximum depth of 3.5 pm, more than 1.0 pm. New layer detaches after heating. Previously {100} indium phosphide wafer according to claim water and an oxidizing agent, wherein the acidic present in etching solutions are in the ratios of 1: presented to claim 11, wherein the pits on the back side and not less than 30% of the pits have a depth
Canceled
The {100} indium phosphide wafer according to ' a, wherein the pits have an average long-axis length of 3 to pm, and an average short-axis length of 1 to pm. Currently amended
The {100} indium phosphide wafer according to r, wherein the back side of the wafer has a surface roughness Ra in a range of pm. Currently amended
The {100} indium phosphide wafer according to-, wherein the pits on the back side of the wafer have a maximum depth of 5 pm, and not less than of the pits have a depth more than pm. Currently amended
An etching solution for manufacturing the 11, comprising an acidic substance, a deionized substance, deionized water and oxidizing agent (0.02 to 0.6):(1.5-6), based on mole ratio. Previously
Embodiments described in the patent, grouped by the materials and process steps they use.
2 materials1 process step
Preparation of {100} InP wafer with regular olive-shaped pits on the back side surface. The wafer was lapped, etched in acidic solution with oxidizing agent, back side protected, front side mechanically and chemically polished. The back side surface was characterized by optical microscope at 500x showing regular olive-shaped pit morphology; long-axis parallel to [011], short-axis parallel to [0-11].
2 materials1 process step
Preparation of {100} InP wafer with regular olive-shaped pits on the back side surface under different etching conditions. Back side surface characterized by optical microscope at 500x showing regular olive-shaped pit morphology.
2 materials1 process step
Preparation of {100} InP wafer with irregular olive-shaped pits on the back side surface. Back side surface characterized by optical microscope at 500x showing irregular pit morphology compared with Examples 1 and 2.
2 materials
PL measurement of an InGaAs epitaxial layer grown on the {100} InP substrate having olive-shaped pits on the back side (from Example 1). PL spectra measured at 800-1800 nm at a single center point and PL intensity maps showing uniformity of peak wavelength and luminescence intensity across the wafer, compared to a control substrate with irregular backside morphology.
Layer stacks claimed or described, ordered top of device to substrate.
{100} indium phosphide wafer with olive-shaped back side pits
Measurements and analyses referenced in the patent, with their drawing references.
FIGS. 4a and 4bare each a cross-sectional view of t he {100 } indium phosphide (InP) wafer after having been cut and subjected to chamfering. In FIG 5, FIG 5 a …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Surface Roughness Ra | 0.2–1.5 µm | InP |
Pit Long Axis Length Average | 3–50 µm |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,376,703Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 4a and 4bare each a cross-sectional view of t he {100 } indium phosphide (InP) wafer after having been cut and subjected to chamfering. In FIG 5, FIG 5 a …
FIGS. 5 b and 5c are respectively PL intensity maps showing the uniformity of the peak wavelength and luminescence intensity of the indium-gallium-arsenide …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1-10. Canceled
Canceled
A {100} indium phosphide wafer comprising: a wafer having a back side surface; and olive-shaped pits on the surface, wherein the olive shape is an oval-like shape with first and second ends that are narrow relative to a middle which is relatively wide, and he back side surface such that the t s have oval shapes with acute angles between long axes or between short axes of i e pits of not more than 10 0. Currently amended
The {100} indium phosphide wafer according to claim 11, wherein the pits are regularly distributed on the back side surface such that the pits have oval shapes with acute angles between long axes or between short axes of the pits of not more than. Currently amended
The {100} indium phosphide wafer according to claim 11, wherein the wafer has a first side surface and a second side surface; and pits on the first side surface or on the first and second sides surfaces. Previously presented
The {100} indium phosphide wafer according to claim 11, wherein the pits have an average long-axis length of 3 to 50 pm, and an average short-axis length of 1 to 30 pm. Previously presented
The {100} indium phosphide wafer according to claim 11, wherein the back side of the wafer has a surface roughness Ra in a range of 0.2 to 1.5 pm. Previously presented
The {100} indium phosphide wafer according to claim 11, wherein the pits on the back side of the wafer have a maximum depth of 5.0 pm, and not less than 30% of the pits have a depth more than 2.0 pm. Previously presented
A method for manufacturing the {100} indium phosphide wafer according to claim 11, wherein the method comprises: subjecting the indium phosphide wafer to surface lapping on both sides; etching the indium phosphide wafer by immersing it into etching solutions to produce etch pits; removing the indium phosphide wafer that has been etched and washing it with deionized water; protecting the back side surface of the indium phosphide wafer that has been etched; subjecting the indium phosphide wafer which has had the back side surface etched and protected to mechanical polishing and chemical polishing on the front side surface, and then washing it with deionized water; and de-protecting the back side surface of the indium phosphide wafer, wherein the etching solutions comprise an acidic substance, deionized water and an oxidizing agent; the acidic substance, deionized water and oxidizing agent present in the etching solutions are in ratios of 1:(0.02- 0.6):(1.5-6), based on mole ratio; the etching temperature has a range from 15 to 95 0C; and the etching time is from 10 to 600 s. Previously presented
The {1 00} indium phosphide wafer according of the wafer have a maximum depth of 3.5 pm, more than 1.0 pm. New layer detaches after heating. Previously {100} indium phosphide wafer according to claim water and an oxidizing agent, wherein the acidic present in etching solutions are in the ratios of 1: presented to claim 11, wherein the pits on the back side and not less than 30% of the pits have a depth
Canceled
The {100} indium phosphide wafer according to ' a, wherein the pits have an average long-axis length of 3 to pm, and an average short-axis length of 1 to pm. Currently amended
The {100} indium phosphide wafer according to r, wherein the back side of the wafer has a surface roughness Ra in a range of pm. Currently amended
The {100} indium phosphide wafer according to-, wherein the pits on the back side of the wafer have a maximum depth of 5 pm, and not less than of the pits have a depth more than pm. Currently amended
An etching solution for manufacturing the 11, comprising an acidic substance, a deionized substance, deionized water and oxidizing agent (0.02 to 0.6):(1.5-6), based on mole ratio. Previously
Embodiments described in the patent, grouped by the materials and process steps they use.
2 materials1 process step
Preparation of {100} InP wafer with regular olive-shaped pits on the back side surface. The wafer was lapped, etched in acidic solution with oxidizing agent, back side protected, front side mechanically and chemically polished. The back side surface was characterized by optical microscope at 500x showing regular olive-shaped pit morphology; long-axis parallel to [011], short-axis parallel to [0-11].
2 materials1 process step
Preparation of {100} InP wafer with regular olive-shaped pits on the back side surface under different etching conditions. Back side surface characterized by optical microscope at 500x showing regular olive-shaped pit morphology.
2 materials1 process step
Preparation of {100} InP wafer with irregular olive-shaped pits on the back side surface. Back side surface characterized by optical microscope at 500x showing irregular pit morphology compared with Examples 1 and 2.
2 materials
PL measurement of an InGaAs epitaxial layer grown on the {100} InP substrate having olive-shaped pits on the back side (from Example 1). PL spectra measured at 800-1800 nm at a single center point and PL intensity maps showing uniformity of peak wavelength and luminescence intensity across the wafer, compared to a control substrate with irregular backside morphology.
Layer stacks claimed or described, ordered top of device to substrate.
{100} indium phosphide wafer with olive-shaped back side pits
Measurements and analyses referenced in the patent, with their drawing references.
FIGS. 4a and 4bare each a cross-sectional view of t he {100 } indium phosphide (InP) wafer after having been cut and subjected to chamfering. In FIG 5, FIG 5 a …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Surface Roughness Ra | 0.2–1.5 µm | InP |
Pit Long Axis Length Average | 3–50 µm |
Related documents with shared materials, methods, properties, or citations.
FIGS. 5 b and 5c are respectively PL intensity maps showing the uniformity of the peak wavelength and luminescence intensity of the indium-gallium-arsenide …
Pit Short Axis Length Average | 1–30 µm | InP |
Pit Maximum Depth | 5 µm | InP |
Pit Maximum Depth | 3.5 µm | InP |
Thickness | 2–15 cm | — |
Thickness | 800–1800 nm | — |
Temperature | 20–40 °C | — |
Thickness | 5–12 cm | — |
Thickness | 0.2–0.5 nm | — |
Thickness | 0.2–0.4 nm | — |
Thickness | 0.2–0.35 nm | — |
Thickness | ≥ 0.5 nm | — |
FIGS. 5 b and 5c are respectively PL intensity maps showing the uniformity of the peak wavelength and luminescence intensity of the indium-gallium-arsenide …
Pit Short Axis Length Average | 1–30 µm | InP |
Pit Maximum Depth | 5 µm | InP |
Pit Maximum Depth | 3.5 µm | InP |
Thickness | 2–15 cm | — |
Thickness | 800–1800 nm | — |
Temperature | 20–40 °C | — |
Thickness | 5–12 cm | — |
Thickness | 0.2–0.5 nm | — |
Thickness | 0.2–0.4 nm | — |
Thickness | 0.2–0.35 nm | — |
Thickness | ≥ 0.5 nm | — |
FIGS. 5 b and 5c are respectively PL intensity maps showing the uniformity of the peak wavelength and luminescence intensity of the indium-gallium-arsenide …
Pit Short Axis Length Average | 1–30 µm | InP |
Pit Maximum Depth | 5 µm | InP |
Pit Maximum Depth | 3.5 µm | InP |
Thickness | 2–15 cm | — |
Thickness | 800–1800 nm | — |
Temperature | 20–40 °C | — |
Thickness | 5–12 cm | — |
Thickness | 0.2–0.5 nm | — |
Thickness | 0.2–0.4 nm | — |
Thickness | 0.2–0.35 nm | — |
Thickness | ≥ 0.5 nm | — |
FIGS. 5 b and 5c are respectively PL intensity maps showing the uniformity of the peak wavelength and luminescence intensity of the indium-gallium-arsenide …
Pit Short Axis Length Average | 1–30 µm | InP |
Pit Maximum Depth | 5 µm | InP |
Pit Maximum Depth | 3.5 µm | InP |
Thickness | 2–15 cm | — |
Thickness | 800–1800 nm | — |
Temperature | 20–40 °C | — |
Thickness | 5–12 cm | — |
Thickness | 0.2–0.5 nm | — |
Thickness | 0.2–0.4 nm | — |
Thickness | 0.2–0.35 nm | — |
Thickness | ≥ 0.5 nm | — |
