Patent
US 9,514,962Method for Performing Activation of Dopants in a GaN-Based Semiconductor Layer
Claire AGRAFFEIL
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 9,514,962Patent drawings and their descriptions. Click a drawing to enlarge it.
Figures 13 to 15 schematically illustrate the concentration profiles of p-type dopants in a GaN-based semiconductor for different stacks designed to protect the semiconductor when the anneals are performed. Implantation of the dopants was performed before or after deposition of the AIN-based 20 …
Figure 15 illustrates the case where semiconductor layer l b is successively covered by a cap block 3 comprising an AIGaN layer 3a and a layer of Mg or MgO 3b, and a silicon-based covering layer 20 The combination of these different layers not only enables a much larger quantity of dopants to be …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1-16. canceled
A method for performing activation of p-type dopants in a GaN-based semiconductor comprising the following steps:-providing a substrate comprising: o a layer made from GaN-based semiconductor material layer provided with p-type electric dopant impurities, o a cap block in contact with the GaN-based semiconductor material layer and comprising a la v er consisting essentially of Mg or MgO layer, the cap block being devoid of any silicon-based compound, and o a silicon-based covering layer covering the cap block, and-performing a heat treatment at a temperature of more than 850 ° C so as to activate the p-type electric dopant impurities in the GaN-based semiconductor material layer.
The method for performing activation of p-type dopants according to claim 17, wherein the Mg or MgO layer has a thickness comprised between 1 nm and 30 nm.
The method for performing activation of p-type dopants according to claim 17, wherein the cap block further comprises an AlGaN layer positioned between the GaN-based semiconductor material layer and the Mg or MgO layer, the AlGaN layer having a thickness comprised between 1 nm and 40 nm. -3- Application No. 14/859,860
The method for performing activation of p-type dopants according to claim 17, wherein the cap block further comprises an A l N layer positioned between the GaN-based semiconductor material layer and the Mg or MgO layer, the A l N layer having a thickness comprised between 1 nm and 40 nm.
The method for performing activation of p-type dopants according to claim 17, wherein deposition of the silicon-based covering layer is performed at a temperature of less than 850 °C.
The method for performing activation of p-type dopants according to claim 17, wherein the thickness a thickness of the silicon-based covering layer is comprised between 5 nm and 500 nm.
The method for performing activation of p-type dopants according to claim 17, wherein the cap block is deposited on the GaN-based semiconductor material layer, and the p-type electric dopant impurities are then implanted in the GaN-based semiconductor material layer through the cap block before the heat treatment is performed.
The method for performing activation of p-type dopants according to claim 17, wherein the silicon-based covering layer is deposited on the -4- Application No. 14/859,860 cap block, and the p-type electric dopant impurities are then implanted in the GaN-based semiconductor material layer through the cap block and through the silicon-based covering layer before the heat treatment is performed.
canceled
28-32. canceled
A method for performing activation of p-type dopants in a GaN-based semiconductor comprising the following steps:-providing a substrate comprising: o a layer made from GaN-based semiconductor material laver provided with implanted p-type electric dopant impurities, o a cap block in contact with the semiconductor material layer and comprising a layer consisting essentially of Mg or MgO layer, devoid of any silicon- based compound, and o a silicon-based covering layer covering the cap block, and-performing a heat treatment at a temperature of more than 850 ° C so as to activate the implanted p-type electric dopant impurities in the GaN-based semiconductor material layer.
The method for performing activation of p-type dopants according to claim 33, wherein the Mg or MgO layer has a thickness comprised between 1 nm and 30 nm.
The method for performing activation of p-type dopants according to claim 33, wherein deposition of the silicon-based covering layer is performed at a temperature of less than 850 °C.
The method for performing activation of p-type dopants according to claim 33, wherein the cap block is deposited on the GaN-based semiconductor material layer, and the p-type electric dopant impurities are then implanted in the GaN-based semiconductor material layer through the cap block before the heat treatment is performed.
The method for performing activation of p-type dopants according to claim 33, wherein the silicon-based covering layer is deposited on the cap block, and the p- type electric dopant impurities are then implanted in the GaN-based semiconductor material layer through the cap block and through the silicon-based covering layer before the heat treatment is performed.
A method for performing activation of p-type dopants in a GaN-based semiconductor comprising the following steps:-providing a substrate comprising: o a layer made from GaN-based semiconductor material laver provided with implanted p-type electric dopant impurities, and o a cap block devoid of any silicon-based compound, in contact with the semiconductor material layer, the cap block comprising Q a Mg or MgO layer, -5- Application No. 14/859,860 Q a first AlGaN layer positioned between the GaN-based semiconductor material layer and the Mg or MgO layer, and Q a second AlGaN layer positioned between the Mg or MgO layer and a silicon-based covering layer covering the cap block, and-performing a heat treatment at a temperature of more than 850 ° C so as to activate the implanted p-type electric dopant impurities in the GaN-based semiconductor material layer.
The method for performing activation of p-type dopants according to claim 34, wherein deposition of the silicon-based covering layer is performed at a temperature of less than 850 °C. -6- Application No. 14/859,860
The method for performing activation of p-type dopants according to claim 34, wherein a thickness of the silicon-based covering layer is comprised between 5 nm and 500 nm.
The method for performing activation of p-type silicon-based covering layer is deposited on the impurities are then implanted in the GaN-based block and through the silicon-based covering layer dopants according to claim 34, wherein the material layer, and the p-type electric GaN-based semiconductor material layer through the dopants according to claim 34, wherein the cap block, and the p- type electric dopant semiconductor material layer through the cap before the heat treatment is performed. -7-
The method for performing activation of p-type cap block is deposited on the GaN-based semiconductor dopant impurities are then implanted in the cap block before the heat treatment is performed.
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based semiconductor substrate with Mg/MgO cap block and silicon-based covering layer
GaN-based semiconductor substrate with AlGaN/Mg-MgO/AlGaN cap block and silicon-based covering layer
Materials described outside the worked examples.
GaN-based semiconductor material
Mg or MgO layer
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 1–30 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,514,962Patent drawings and their descriptions. Click a drawing to enlarge it.
Figures 13 to 15 schematically illustrate the concentration profiles of p-type dopants in a GaN-based semiconductor for different stacks designed to protect the semiconductor when the anneals are performed. Implantation of the dopants was performed before or after deposition of the AIN-based 20 …
Figure 15 illustrates the case where semiconductor layer l b is successively covered by a cap block 3 comprising an AIGaN layer 3a and a layer of Mg or MgO 3b, and a silicon-based covering layer 20 The combination of these different layers not only enables a much larger quantity of dopants to be …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1-16. canceled
A method for performing activation of p-type dopants in a GaN-based semiconductor comprising the following steps:-providing a substrate comprising: o a layer made from GaN-based semiconductor material layer provided with p-type electric dopant impurities, o a cap block in contact with the GaN-based semiconductor material layer and comprising a la v er consisting essentially of Mg or MgO layer, the cap block being devoid of any silicon-based compound, and o a silicon-based covering layer covering the cap block, and-performing a heat treatment at a temperature of more than 850 ° C so as to activate the p-type electric dopant impurities in the GaN-based semiconductor material layer.
The method for performing activation of p-type dopants according to claim 17, wherein the Mg or MgO layer has a thickness comprised between 1 nm and 30 nm.
The method for performing activation of p-type dopants according to claim 17, wherein the cap block further comprises an AlGaN layer positioned between the GaN-based semiconductor material layer and the Mg or MgO layer, the AlGaN layer having a thickness comprised between 1 nm and 40 nm. -3- Application No. 14/859,860
The method for performing activation of p-type dopants according to claim 17, wherein the cap block further comprises an A l N layer positioned between the GaN-based semiconductor material layer and the Mg or MgO layer, the A l N layer having a thickness comprised between 1 nm and 40 nm.
The method for performing activation of p-type dopants according to claim 17, wherein deposition of the silicon-based covering layer is performed at a temperature of less than 850 °C.
The method for performing activation of p-type dopants according to claim 17, wherein the thickness a thickness of the silicon-based covering layer is comprised between 5 nm and 500 nm.
The method for performing activation of p-type dopants according to claim 17, wherein the cap block is deposited on the GaN-based semiconductor material layer, and the p-type electric dopant impurities are then implanted in the GaN-based semiconductor material layer through the cap block before the heat treatment is performed.
The method for performing activation of p-type dopants according to claim 17, wherein the silicon-based covering layer is deposited on the -4- Application No. 14/859,860 cap block, and the p-type electric dopant impurities are then implanted in the GaN-based semiconductor material layer through the cap block and through the silicon-based covering layer before the heat treatment is performed.
canceled
28-32. canceled
A method for performing activation of p-type dopants in a GaN-based semiconductor comprising the following steps:-providing a substrate comprising: o a layer made from GaN-based semiconductor material laver provided with implanted p-type electric dopant impurities, o a cap block in contact with the semiconductor material layer and comprising a layer consisting essentially of Mg or MgO layer, devoid of any silicon- based compound, and o a silicon-based covering layer covering the cap block, and-performing a heat treatment at a temperature of more than 850 ° C so as to activate the implanted p-type electric dopant impurities in the GaN-based semiconductor material layer.
The method for performing activation of p-type dopants according to claim 33, wherein the Mg or MgO layer has a thickness comprised between 1 nm and 30 nm.
The method for performing activation of p-type dopants according to claim 33, wherein deposition of the silicon-based covering layer is performed at a temperature of less than 850 °C.
The method for performing activation of p-type dopants according to claim 33, wherein the cap block is deposited on the GaN-based semiconductor material layer, and the p-type electric dopant impurities are then implanted in the GaN-based semiconductor material layer through the cap block before the heat treatment is performed.
The method for performing activation of p-type dopants according to claim 33, wherein the silicon-based covering layer is deposited on the cap block, and the p- type electric dopant impurities are then implanted in the GaN-based semiconductor material layer through the cap block and through the silicon-based covering layer before the heat treatment is performed.
A method for performing activation of p-type dopants in a GaN-based semiconductor comprising the following steps:-providing a substrate comprising: o a layer made from GaN-based semiconductor material laver provided with implanted p-type electric dopant impurities, and o a cap block devoid of any silicon-based compound, in contact with the semiconductor material layer, the cap block comprising Q a Mg or MgO layer, -5- Application No. 14/859,860 Q a first AlGaN layer positioned between the GaN-based semiconductor material layer and the Mg or MgO layer, and Q a second AlGaN layer positioned between the Mg or MgO layer and a silicon-based covering layer covering the cap block, and-performing a heat treatment at a temperature of more than 850 ° C so as to activate the implanted p-type electric dopant impurities in the GaN-based semiconductor material layer.
The method for performing activation of p-type dopants according to claim 34, wherein deposition of the silicon-based covering layer is performed at a temperature of less than 850 °C. -6- Application No. 14/859,860
The method for performing activation of p-type dopants according to claim 34, wherein a thickness of the silicon-based covering layer is comprised between 5 nm and 500 nm.
The method for performing activation of p-type silicon-based covering layer is deposited on the impurities are then implanted in the GaN-based block and through the silicon-based covering layer dopants according to claim 34, wherein the material layer, and the p-type electric GaN-based semiconductor material layer through the dopants according to claim 34, wherein the cap block, and the p- type electric dopant semiconductor material layer through the cap before the heat treatment is performed. -7-
The method for performing activation of p-type cap block is deposited on the GaN-based semiconductor dopant impurities are then implanted in the cap block before the heat treatment is performed.
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based semiconductor substrate with Mg/MgO cap block and silicon-based covering layer
GaN-based semiconductor substrate with AlGaN/Mg-MgO/AlGaN cap block and silicon-based covering layer
Materials described outside the worked examples.
GaN-based semiconductor material
Mg or MgO layer
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 1–30 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,514,962Patent drawings and their descriptions. Click a drawing to enlarge it.
Figures 13 to 15 schematically illustrate the concentration profiles of p-type dopants in a GaN-based semiconductor for different stacks designed to protect the semiconductor when the anneals are performed. Implantation of the dopants was performed before or after deposition of the AIN-based 20 …
Figure 15 illustrates the case where semiconductor layer l b is successively covered by a cap block 3 comprising an AIGaN layer 3a and a layer of Mg or MgO 3b, and a silicon-based covering layer 20 The combination of these different layers not only enables a much larger quantity of dopants to be …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1-16. canceled
A method for performing activation of p-type dopants in a GaN-based semiconductor comprising the following steps:-providing a substrate comprising: o a layer made from GaN-based semiconductor material layer provided with p-type electric dopant impurities, o a cap block in contact with the GaN-based semiconductor material layer and comprising a la v er consisting essentially of Mg or MgO layer, the cap block being devoid of any silicon-based compound, and o a silicon-based covering layer covering the cap block, and-performing a heat treatment at a temperature of more than 850 ° C so as to activate the p-type electric dopant impurities in the GaN-based semiconductor material layer.
The method for performing activation of p-type dopants according to claim 17, wherein the Mg or MgO layer has a thickness comprised between 1 nm and 30 nm.
The method for performing activation of p-type dopants according to claim 17, wherein the cap block further comprises an AlGaN layer positioned between the GaN-based semiconductor material layer and the Mg or MgO layer, the AlGaN layer having a thickness comprised between 1 nm and 40 nm. -3- Application No. 14/859,860
The method for performing activation of p-type dopants according to claim 17, wherein the cap block further comprises an A l N layer positioned between the GaN-based semiconductor material layer and the Mg or MgO layer, the A l N layer having a thickness comprised between 1 nm and 40 nm.
The method for performing activation of p-type dopants according to claim 17, wherein deposition of the silicon-based covering layer is performed at a temperature of less than 850 °C.
The method for performing activation of p-type dopants according to claim 17, wherein the thickness a thickness of the silicon-based covering layer is comprised between 5 nm and 500 nm.
The method for performing activation of p-type dopants according to claim 17, wherein the cap block is deposited on the GaN-based semiconductor material layer, and the p-type electric dopant impurities are then implanted in the GaN-based semiconductor material layer through the cap block before the heat treatment is performed.
The method for performing activation of p-type dopants according to claim 17, wherein the silicon-based covering layer is deposited on the -4- Application No. 14/859,860 cap block, and the p-type electric dopant impurities are then implanted in the GaN-based semiconductor material layer through the cap block and through the silicon-based covering layer before the heat treatment is performed.
canceled
28-32. canceled
A method for performing activation of p-type dopants in a GaN-based semiconductor comprising the following steps:-providing a substrate comprising: o a layer made from GaN-based semiconductor material laver provided with implanted p-type electric dopant impurities, o a cap block in contact with the semiconductor material layer and comprising a layer consisting essentially of Mg or MgO layer, devoid of any silicon- based compound, and o a silicon-based covering layer covering the cap block, and-performing a heat treatment at a temperature of more than 850 ° C so as to activate the implanted p-type electric dopant impurities in the GaN-based semiconductor material layer.
The method for performing activation of p-type dopants according to claim 33, wherein the Mg or MgO layer has a thickness comprised between 1 nm and 30 nm.
The method for performing activation of p-type dopants according to claim 33, wherein deposition of the silicon-based covering layer is performed at a temperature of less than 850 °C.
The method for performing activation of p-type dopants according to claim 33, wherein the cap block is deposited on the GaN-based semiconductor material layer, and the p-type electric dopant impurities are then implanted in the GaN-based semiconductor material layer through the cap block before the heat treatment is performed.
The method for performing activation of p-type dopants according to claim 33, wherein the silicon-based covering layer is deposited on the cap block, and the p- type electric dopant impurities are then implanted in the GaN-based semiconductor material layer through the cap block and through the silicon-based covering layer before the heat treatment is performed.
A method for performing activation of p-type dopants in a GaN-based semiconductor comprising the following steps:-providing a substrate comprising: o a layer made from GaN-based semiconductor material laver provided with implanted p-type electric dopant impurities, and o a cap block devoid of any silicon-based compound, in contact with the semiconductor material layer, the cap block comprising Q a Mg or MgO layer, -5- Application No. 14/859,860 Q a first AlGaN layer positioned between the GaN-based semiconductor material layer and the Mg or MgO layer, and Q a second AlGaN layer positioned between the Mg or MgO layer and a silicon-based covering layer covering the cap block, and-performing a heat treatment at a temperature of more than 850 ° C so as to activate the implanted p-type electric dopant impurities in the GaN-based semiconductor material layer.
The method for performing activation of p-type dopants according to claim 34, wherein deposition of the silicon-based covering layer is performed at a temperature of less than 850 °C. -6- Application No. 14/859,860
The method for performing activation of p-type dopants according to claim 34, wherein a thickness of the silicon-based covering layer is comprised between 5 nm and 500 nm.
The method for performing activation of p-type silicon-based covering layer is deposited on the impurities are then implanted in the GaN-based block and through the silicon-based covering layer dopants according to claim 34, wherein the material layer, and the p-type electric GaN-based semiconductor material layer through the dopants according to claim 34, wherein the cap block, and the p- type electric dopant semiconductor material layer through the cap before the heat treatment is performed. -7-
The method for performing activation of p-type cap block is deposited on the GaN-based semiconductor dopant impurities are then implanted in the cap block before the heat treatment is performed.
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based semiconductor substrate with Mg/MgO cap block and silicon-based covering layer
GaN-based semiconductor substrate with AlGaN/Mg-MgO/AlGaN cap block and silicon-based covering layer
Materials described outside the worked examples.
GaN-based semiconductor material
Mg or MgO layer
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 1–30 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,514,962Patent drawings and their descriptions. Click a drawing to enlarge it.
Figures 13 to 15 schematically illustrate the concentration profiles of p-type dopants in a GaN-based semiconductor for different stacks designed to protect the semiconductor when the anneals are performed. Implantation of the dopants was performed before or after deposition of the AIN-based 20 …
Figure 15 illustrates the case where semiconductor layer l b is successively covered by a cap block 3 comprising an AIGaN layer 3a and a layer of Mg or MgO 3b, and a silicon-based covering layer 20 The combination of these different layers not only enables a much larger quantity of dopants to be …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1-16. canceled
A method for performing activation of p-type dopants in a GaN-based semiconductor comprising the following steps:-providing a substrate comprising: o a layer made from GaN-based semiconductor material layer provided with p-type electric dopant impurities, o a cap block in contact with the GaN-based semiconductor material layer and comprising a la v er consisting essentially of Mg or MgO layer, the cap block being devoid of any silicon-based compound, and o a silicon-based covering layer covering the cap block, and-performing a heat treatment at a temperature of more than 850 ° C so as to activate the p-type electric dopant impurities in the GaN-based semiconductor material layer.
The method for performing activation of p-type dopants according to claim 17, wherein the Mg or MgO layer has a thickness comprised between 1 nm and 30 nm.
The method for performing activation of p-type dopants according to claim 17, wherein the cap block further comprises an AlGaN layer positioned between the GaN-based semiconductor material layer and the Mg or MgO layer, the AlGaN layer having a thickness comprised between 1 nm and 40 nm. -3- Application No. 14/859,860
The method for performing activation of p-type dopants according to claim 17, wherein the cap block further comprises an A l N layer positioned between the GaN-based semiconductor material layer and the Mg or MgO layer, the A l N layer having a thickness comprised between 1 nm and 40 nm.
The method for performing activation of p-type dopants according to claim 17, wherein deposition of the silicon-based covering layer is performed at a temperature of less than 850 °C.
The method for performing activation of p-type dopants according to claim 17, wherein the thickness a thickness of the silicon-based covering layer is comprised between 5 nm and 500 nm.
The method for performing activation of p-type dopants according to claim 17, wherein the cap block is deposited on the GaN-based semiconductor material layer, and the p-type electric dopant impurities are then implanted in the GaN-based semiconductor material layer through the cap block before the heat treatment is performed.
The method for performing activation of p-type dopants according to claim 17, wherein the silicon-based covering layer is deposited on the -4- Application No. 14/859,860 cap block, and the p-type electric dopant impurities are then implanted in the GaN-based semiconductor material layer through the cap block and through the silicon-based covering layer before the heat treatment is performed.
canceled
28-32. canceled
A method for performing activation of p-type dopants in a GaN-based semiconductor comprising the following steps:-providing a substrate comprising: o a layer made from GaN-based semiconductor material laver provided with implanted p-type electric dopant impurities, o a cap block in contact with the semiconductor material layer and comprising a layer consisting essentially of Mg or MgO layer, devoid of any silicon- based compound, and o a silicon-based covering layer covering the cap block, and-performing a heat treatment at a temperature of more than 850 ° C so as to activate the implanted p-type electric dopant impurities in the GaN-based semiconductor material layer.
The method for performing activation of p-type dopants according to claim 33, wherein the Mg or MgO layer has a thickness comprised between 1 nm and 30 nm.
The method for performing activation of p-type dopants according to claim 33, wherein deposition of the silicon-based covering layer is performed at a temperature of less than 850 °C.
The method for performing activation of p-type dopants according to claim 33, wherein the cap block is deposited on the GaN-based semiconductor material layer, and the p-type electric dopant impurities are then implanted in the GaN-based semiconductor material layer through the cap block before the heat treatment is performed.
The method for performing activation of p-type dopants according to claim 33, wherein the silicon-based covering layer is deposited on the cap block, and the p- type electric dopant impurities are then implanted in the GaN-based semiconductor material layer through the cap block and through the silicon-based covering layer before the heat treatment is performed.
A method for performing activation of p-type dopants in a GaN-based semiconductor comprising the following steps:-providing a substrate comprising: o a layer made from GaN-based semiconductor material laver provided with implanted p-type electric dopant impurities, and o a cap block devoid of any silicon-based compound, in contact with the semiconductor material layer, the cap block comprising Q a Mg or MgO layer, -5- Application No. 14/859,860 Q a first AlGaN layer positioned between the GaN-based semiconductor material layer and the Mg or MgO layer, and Q a second AlGaN layer positioned between the Mg or MgO layer and a silicon-based covering layer covering the cap block, and-performing a heat treatment at a temperature of more than 850 ° C so as to activate the implanted p-type electric dopant impurities in the GaN-based semiconductor material layer.
The method for performing activation of p-type dopants according to claim 34, wherein deposition of the silicon-based covering layer is performed at a temperature of less than 850 °C. -6- Application No. 14/859,860
The method for performing activation of p-type dopants according to claim 34, wherein a thickness of the silicon-based covering layer is comprised between 5 nm and 500 nm.
The method for performing activation of p-type silicon-based covering layer is deposited on the impurities are then implanted in the GaN-based block and through the silicon-based covering layer dopants according to claim 34, wherein the material layer, and the p-type electric GaN-based semiconductor material layer through the dopants according to claim 34, wherein the cap block, and the p- type electric dopant semiconductor material layer through the cap before the heat treatment is performed. -7-
The method for performing activation of p-type cap block is deposited on the GaN-based semiconductor dopant impurities are then implanted in the cap block before the heat treatment is performed.
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based semiconductor substrate with Mg/MgO cap block and silicon-based covering layer
GaN-based semiconductor substrate with AlGaN/Mg-MgO/AlGaN cap block and silicon-based covering layer
Materials described outside the worked examples.
GaN-based semiconductor material
Mg or MgO layer
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 1–30 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
cap block
silicon-based covering layer
AlGaN layer
AlN layer
AlN
silicon
Si
silicon oxide
SiOx
silicon nitride
SiNx
p-type dopant impurities (Mg+)
| — |
Thickness | 5–500 nm | — |
Temperature | ≤ 850 °C | — |
Temperature | ≥ 850 °C | — |
cap block
silicon-based covering layer
AlGaN layer
AlN layer
AlN
silicon
Si
silicon oxide
SiOx
silicon nitride
SiNx
p-type dopant impurities (Mg+)
| — |
Thickness | 5–500 nm | — |
Temperature | ≤ 850 °C | — |
Temperature | ≥ 850 °C | — |
cap block
silicon-based covering layer
AlGaN layer
AlN layer
AlN
silicon
Si
silicon oxide
SiOx
silicon nitride
SiNx
p-type dopant impurities (Mg+)
| — |
Thickness | 5–500 nm | — |
Temperature | ≤ 850 °C | — |
Temperature | ≥ 850 °C | — |
cap block
silicon-based covering layer
AlGaN layer
AlN layer
AlN
silicon
Si
silicon oxide
SiOx
silicon nitride
SiNx
p-type dopant impurities (Mg+)
| — |
Thickness | 5–500 nm | — |
Temperature | ≤ 850 °C | — |
Temperature | ≥ 850 °C | — |