Abstract

Assembling two-dimensional van der Waals layered materials into heterostructures is an exciting development that sparked the discovery of rich correlated electronic phenomena and offers possibilities for designer device applications. However, resist residue from fabrication processes is a major limitation. Resulting disordered interfaces degrade device performance and mask underlying transport physics. Conventional cleaning processes are inefficient and can cause material and device damage. Here, we show that thermal scanning probe based cleaning can effectively eliminate resist residue to recover pristine material surfaces. Our technique is compatible at both the material- and device-level, and we demonstrate the significant improvement in the electrical performance of 2D WS₂ transistors. We also demonstrate the cleaning of van der Waals heterostructures to achieve interfaces with low disorder. This enables the electrical formation and control of quantum dots that can be tuned from macroscopic current flow to the single-electron tunnelling regime. Such material processing advances are crucial for constructing high-quality vdW heterostructures that are important platforms for fundamental studies and building blocks for quantum and nano-electronics applications.

Abstract

Assembling two-dimensional van der Waals layered materials into heterostructures is an exciting development that sparked the discovery of rich correlated electronic phenomena and offers possibilities for designer device applications. However, resist residue from fabrication processes is a major limitation. Resulting disordered interfaces degrade device performance and mask underlying transport physics. Conventional cleaning processes are inefficient and can cause material and device damage. Here, we show that thermal scanning probe based cleaning can effectively eliminate resist residue to recover pristine material surfaces. Our technique is compatible at both the material- and device-level, and we demonstrate the significant improvement in the electrical performance of 2D WS₂ transistors. We also demonstrate the cleaning of van der Waals heterostructures to achieve interfaces with low disorder. This enables the electrical formation and control of quantum dots that can be tuned from macroscopic current flow to the single-electron tunnelling regime. Such material processing advances are crucial for constructing high-quality vdW heterostructures that are important platforms for fundamental studies and building blocks for quantum and nano-electronics applications.

Abstract

Assembling two-dimensional van der Waals layered materials into heterostructures is an exciting development that sparked the discovery of rich correlated electronic phenomena and offers possibilities for designer device applications. However, resist residue from fabrication processes is a major limitation. Resulting disordered interfaces degrade device performance and mask underlying transport physics. Conventional cleaning processes are inefficient and can cause material and device damage. Here, we show that thermal scanning probe based cleaning can effectively eliminate resist residue to recover pristine material surfaces. Our technique is compatible at both the material- and device-level, and we demonstrate the significant improvement in the electrical performance of 2D WS₂ transistors. We also demonstrate the cleaning of van der Waals heterostructures to achieve interfaces with low disorder. This enables the electrical formation and control of quantum dots that can be tuned from macroscopic current flow to the single-electron tunnelling regime. Such material processing advances are crucial for constructing high-quality vdW heterostructures that are important platforms for fundamental studies and building blocks for quantum and nano-electronics applications.

Abstract

Assembling two-dimensional van der Waals layered materials into heterostructures is an exciting development that sparked the discovery of rich correlated electronic phenomena and offers possibilities for designer device applications. However, resist residue from fabrication processes is a major limitation. Resulting disordered interfaces degrade device performance and mask underlying transport physics. Conventional cleaning processes are inefficient and can cause material and device damage. Here, we show that thermal scanning probe based cleaning can effectively eliminate resist residue to recover pristine material surfaces. Our technique is compatible at both the material- and device-level, and we demonstrate the significant improvement in the electrical performance of 2D WS₂ transistors. We also demonstrate the cleaning of van der Waals heterostructures to achieve interfaces with low disorder. This enables the electrical formation and control of quantum dots that can be tuned from macroscopic current flow to the single-electron tunnelling regime. Such material processing advances are crucial for constructing high-quality vdW heterostructures that are important platforms for fundamental studies and building blocks for quantum and nano-electronics applications.