BIDIRECTIONAL GaN FET WITH SINGLE GATE | Matter42 Literature
Patent
Atlas literature
Patent
US 12,658,915 B2
BIDIRECTIONAL GaN FET WITH SINGLE GATE
Wen-Chia Liao, Jianjun Cao, Robert Beach, Zhikai Tang et al.
Efficient Power Conversion Corporation, El Segundo, CA (US)·Jun. 16, 2026·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
process tool top view
FIG. 1 illustrates a top view of the bidirectional enhance- ment mode GaN switch of the present invention, including first and second sub-switches.
FIG. 2
FIG. 2 is a cross-sectional view of a first embodiment of the bidirectional enhancement mode GaN switch of the present invention.
FIG. 3
FIGS. 3A and 3C illustrate an equivalent circuit and a block diagram of the bidirectional enhancement mode GaN switch.
FIG. 4
FIG. 4 is a cross-sectional view of a second embodiment of the bidirectional enhancement mode GaN switch of the present invention.
FIG. 5
FIG. 5 is a cross-sectional view of a third embodiment of the bidirectional enhancement mode GaN switch of the present invention.
FIG. 6
FIG. 6, except the substrate is electrically grounded, rather than being electri- cally shorted to gate 160.
FIG. 7
FIG. 7 is a cross-sectional view of a fifth embodiment of the bidirectional enhancement mode GaN switch of the present invention.
FIG. 8
FIG. 8 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with a sixth …
FIG. 9
FIG. 9 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with a seventh …
FIG. 10
FIG. 10 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with an …
FIG. 11
process tool top view
FIG. 11 is a top view of a bidirectional enhancement mode GaN switch including two sub-switches in a different layout.
FIG. 12
FIG. 12 is a cross-sectional view of a bidirectional enhancement mode GaN switch with gate protection cir- cuitry.
FIG. 13
FIG. 13.
FIG. 14
FIG. 14 is a cross-sectional view of the first sub-switch of the bidirectional enhancement mode GaN switch of
FIG. 15
FIG. 15 is a cross-sectional view of a first sub-switch which is similar to the first sub-switch of bi-directional enhancement-mode GaN switch shown in
FIG. 16
FIG. 16 is a cross-sectional view of a first sub-switch which is similar to the first sub-switch of the bi-directional enhancement-mode GaN switch shown in
Claims
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1 independent · 9 dependent
1
IndependentGaNAlGaNbidirectional GaN FET switch with single gate
A bidirectional GaN FET switch with a single gate, comprising: a substrate, a GaN layer on the substrate, an AlGaN layer on the GaN layer, a first power electrode and a second power electrode, a third power electrode and a gate, wherein the bidirectional GaN FET switch is formed of a first sub-switch and a second sub-switch integrated together in the bidirectional GaN FET switch on a die having an area and connected in parallel in an equiva-lent circuit, wherein: the first sub-switch comprises a single gate GaN field effect transistor (FET), wherein the first and the second power electrodes serve as source/drain electrodes and wherein the gate is centrally located between the first and second power electrodes, whereby the gate is spaced an equal distance from the first and second power electrodes; the second sub-switch comprises a first GaN FET and a second GaN FET connected in a back-to-back configu-ration having a common gate, wherein the third power electrode acts as a common source, and wherein the first power electrode and the second power electrode serve as the respective drain electrode of the first GaN FET and the second GaN FET; and the gate of the single gate GaN FET of the first sub-switch is electrically connected to the common gate of the first and second back-to-back GaN FETs of the second sub-switch to form the single gate of the bidirectional GaN FET switch; wherein the first sub-switch occupies most of the die area, and the second sub-switch occupies only a small per-centage of the die area, such that current passing through the bidirectional GaN FET switch, when the switch is ON, flows primarily under the single gate of the first sub-switch.
2
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is electrically connected to the single gate.
3
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is electrically connected to the common source of the second sub-switch.
4
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, further comprising at least one field plate, wherein the at least one field plate is connected to the common source of the second sub-switch.
6
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is electrically connected to the power elec-trodes of the first sub-switch by respective diodes.
8
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is electrically connected to the power terminals of the first sub-switch by an active circuit comprising a B₂ comparator connected to first and second transistors which are respectively connected between the first and second power electrodes and the substrate, wherein the comparator is configured to: compare electrical potentials of the first and second power electrodes; and turn on the one of the first and second transistors corre-sponding to the power electrode having a lower poten-tial.
9
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is connected to ground.
10
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, further comprising a voltage divider electrically connected between the single gate and ground, the voltage divider being elec-trically connected to the substrate, such that the substrate has a potential which follows a potential of the single gate at a fraction of the potential of the single gate. ∗ ∗ ∗ ∗ ∗
Device structures
Layer stacks claimed or described, ordered top of device to substrate.
bidirectional GaN FET switch with single gate
AlGaNbarrier layer
GaNchannel layer
substratesubstrate
Materials
Materials described outside the worked examples.
GaN
Channel Layer
AlGaN
Barrier Layer
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
fet electrical
Fet Electrical
FIG. 6, except the substrate is electrically grounded, rather than being electri- cally shorted to gate 160.
Wen-Chia Liao, Jianjun Cao, Robert Beach, Zhikai Tang et al.
Efficient Power Conversion Corporation, El Segundo, CA (US)·Jun. 16, 2026·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
process tool top view
FIG. 1 illustrates a top view of the bidirectional enhance- ment mode GaN switch of the present invention, including first and second sub-switches.
FIG. 2
FIG. 2 is a cross-sectional view of a first embodiment of the bidirectional enhancement mode GaN switch of the present invention.
FIG. 3
FIGS. 3A and 3C illustrate an equivalent circuit and a block diagram of the bidirectional enhancement mode GaN switch.
FIG. 4
FIG. 4 is a cross-sectional view of a second embodiment of the bidirectional enhancement mode GaN switch of the present invention.
FIG. 5
FIG. 5 is a cross-sectional view of a third embodiment of the bidirectional enhancement mode GaN switch of the present invention.
FIG. 6
FIG. 6, except the substrate is electrically grounded, rather than being electri- cally shorted to gate 160.
FIG. 7
FIG. 7 is a cross-sectional view of a fifth embodiment of the bidirectional enhancement mode GaN switch of the present invention.
FIG. 8
FIG. 8 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with a sixth …
FIG. 9
FIG. 9 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with a seventh …
FIG. 10
FIG. 10 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with an …
FIG. 11
process tool top view
FIG. 11 is a top view of a bidirectional enhancement mode GaN switch including two sub-switches in a different layout.
FIG. 12
FIG. 12 is a cross-sectional view of a bidirectional enhancement mode GaN switch with gate protection cir- cuitry.
FIG. 13
FIG. 13.
FIG. 14
FIG. 14 is a cross-sectional view of the first sub-switch of the bidirectional enhancement mode GaN switch of
FIG. 15
FIG. 15 is a cross-sectional view of a first sub-switch which is similar to the first sub-switch of bi-directional enhancement-mode GaN switch shown in
FIG. 16
FIG. 16 is a cross-sectional view of a first sub-switch which is similar to the first sub-switch of the bi-directional enhancement-mode GaN switch shown in
Claims
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1 independent · 9 dependent
1
IndependentGaNAlGaNbidirectional GaN FET switch with single gate
A bidirectional GaN FET switch with a single gate, comprising: a substrate, a GaN layer on the substrate, an AlGaN layer on the GaN layer, a first power electrode and a second power electrode, a third power electrode and a gate, wherein the bidirectional GaN FET switch is formed of a first sub-switch and a second sub-switch integrated together in the bidirectional GaN FET switch on a die having an area and connected in parallel in an equiva-lent circuit, wherein: the first sub-switch comprises a single gate GaN field effect transistor (FET), wherein the first and the second power electrodes serve as source/drain electrodes and wherein the gate is centrally located between the first and second power electrodes, whereby the gate is spaced an equal distance from the first and second power electrodes; the second sub-switch comprises a first GaN FET and a second GaN FET connected in a back-to-back configu-ration having a common gate, wherein the third power electrode acts as a common source, and wherein the first power electrode and the second power electrode serve as the respective drain electrode of the first GaN FET and the second GaN FET; and the gate of the single gate GaN FET of the first sub-switch is electrically connected to the common gate of the first and second back-to-back GaN FETs of the second sub-switch to form the single gate of the bidirectional GaN FET switch; wherein the first sub-switch occupies most of the die area, and the second sub-switch occupies only a small per-centage of the die area, such that current passing through the bidirectional GaN FET switch, when the switch is ON, flows primarily under the single gate of the first sub-switch.
2
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is electrically connected to the single gate.
3
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is electrically connected to the common source of the second sub-switch.
4
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, further comprising at least one field plate, wherein the at least one field plate is connected to the common source of the second sub-switch.
6
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is electrically connected to the power elec-trodes of the first sub-switch by respective diodes.
8
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is electrically connected to the power terminals of the first sub-switch by an active circuit comprising a B₂ comparator connected to first and second transistors which are respectively connected between the first and second power electrodes and the substrate, wherein the comparator is configured to: compare electrical potentials of the first and second power electrodes; and turn on the one of the first and second transistors corre-sponding to the power electrode having a lower poten-tial.
9
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is connected to ground.
10
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, further comprising a voltage divider electrically connected between the single gate and ground, the voltage divider being elec-trically connected to the substrate, such that the substrate has a potential which follows a potential of the single gate at a fraction of the potential of the single gate. ∗ ∗ ∗ ∗ ∗
Device structures
Layer stacks claimed or described, ordered top of device to substrate.
bidirectional GaN FET switch with single gate
AlGaNbarrier layer
GaNchannel layer
substratesubstrate
Materials
Materials described outside the worked examples.
GaN
Channel Layer
AlGaN
Barrier Layer
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
fet electrical
Fet Electrical
FIG. 6, except the substrate is electrically grounded, rather than being electri- cally shorted to gate 160.
Wen-Chia Liao, Jianjun Cao, Robert Beach, Zhikai Tang et al.
Efficient Power Conversion Corporation, El Segundo, CA (US)·Jun. 16, 2026·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
process tool top view
FIG. 1 illustrates a top view of the bidirectional enhance- ment mode GaN switch of the present invention, including first and second sub-switches.
FIG. 2
FIG. 2 is a cross-sectional view of a first embodiment of the bidirectional enhancement mode GaN switch of the present invention.
FIG. 3
FIGS. 3A and 3C illustrate an equivalent circuit and a block diagram of the bidirectional enhancement mode GaN switch.
FIG. 4
FIG. 4 is a cross-sectional view of a second embodiment of the bidirectional enhancement mode GaN switch of the present invention.
FIG. 5
FIG. 5 is a cross-sectional view of a third embodiment of the bidirectional enhancement mode GaN switch of the present invention.
FIG. 6
FIG. 6, except the substrate is electrically grounded, rather than being electri- cally shorted to gate 160.
FIG. 7
FIG. 7 is a cross-sectional view of a fifth embodiment of the bidirectional enhancement mode GaN switch of the present invention.
FIG. 8
FIG. 8 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with a sixth …
FIG. 9
FIG. 9 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with a seventh …
FIG. 10
FIG. 10 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with an …
FIG. 11
process tool top view
FIG. 11 is a top view of a bidirectional enhancement mode GaN switch including two sub-switches in a different layout.
FIG. 12
FIG. 12 is a cross-sectional view of a bidirectional enhancement mode GaN switch with gate protection cir- cuitry.
FIG. 13
FIG. 13.
FIG. 14
FIG. 14 is a cross-sectional view of the first sub-switch of the bidirectional enhancement mode GaN switch of
FIG. 15
FIG. 15 is a cross-sectional view of a first sub-switch which is similar to the first sub-switch of bi-directional enhancement-mode GaN switch shown in
FIG. 16
FIG. 16 is a cross-sectional view of a first sub-switch which is similar to the first sub-switch of the bi-directional enhancement-mode GaN switch shown in
Claims
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1 independent · 9 dependent
1
IndependentGaNAlGaNbidirectional GaN FET switch with single gate
A bidirectional GaN FET switch with a single gate, comprising: a substrate, a GaN layer on the substrate, an AlGaN layer on the GaN layer, a first power electrode and a second power electrode, a third power electrode and a gate, wherein the bidirectional GaN FET switch is formed of a first sub-switch and a second sub-switch integrated together in the bidirectional GaN FET switch on a die having an area and connected in parallel in an equiva-lent circuit, wherein: the first sub-switch comprises a single gate GaN field effect transistor (FET), wherein the first and the second power electrodes serve as source/drain electrodes and wherein the gate is centrally located between the first and second power electrodes, whereby the gate is spaced an equal distance from the first and second power electrodes; the second sub-switch comprises a first GaN FET and a second GaN FET connected in a back-to-back configu-ration having a common gate, wherein the third power electrode acts as a common source, and wherein the first power electrode and the second power electrode serve as the respective drain electrode of the first GaN FET and the second GaN FET; and the gate of the single gate GaN FET of the first sub-switch is electrically connected to the common gate of the first and second back-to-back GaN FETs of the second sub-switch to form the single gate of the bidirectional GaN FET switch; wherein the first sub-switch occupies most of the die area, and the second sub-switch occupies only a small per-centage of the die area, such that current passing through the bidirectional GaN FET switch, when the switch is ON, flows primarily under the single gate of the first sub-switch.
2
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is electrically connected to the single gate.
3
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is electrically connected to the common source of the second sub-switch.
4
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, further comprising at least one field plate, wherein the at least one field plate is connected to the common source of the second sub-switch.
6
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is electrically connected to the power elec-trodes of the first sub-switch by respective diodes.
8
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is electrically connected to the power terminals of the first sub-switch by an active circuit comprising a B₂ comparator connected to first and second transistors which are respectively connected between the first and second power electrodes and the substrate, wherein the comparator is configured to: compare electrical potentials of the first and second power electrodes; and turn on the one of the first and second transistors corre-sponding to the power electrode having a lower poten-tial.
9
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is connected to ground.
10
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, further comprising a voltage divider electrically connected between the single gate and ground, the voltage divider being elec-trically connected to the substrate, such that the substrate has a potential which follows a potential of the single gate at a fraction of the potential of the single gate. ∗ ∗ ∗ ∗ ∗
Device structures
Layer stacks claimed or described, ordered top of device to substrate.
bidirectional GaN FET switch with single gate
AlGaNbarrier layer
GaNchannel layer
substratesubstrate
Materials
Materials described outside the worked examples.
GaN
Channel Layer
AlGaN
Barrier Layer
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
fet electrical
Fet Electrical
FIG. 6, except the substrate is electrically grounded, rather than being electri- cally shorted to gate 160.
Wen-Chia Liao, Jianjun Cao, Robert Beach, Zhikai Tang et al.
Efficient Power Conversion Corporation, El Segundo, CA (US)·Jun. 16, 2026·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
process tool top view
FIG. 1 illustrates a top view of the bidirectional enhance- ment mode GaN switch of the present invention, including first and second sub-switches.
FIG. 2
FIG. 2 is a cross-sectional view of a first embodiment of the bidirectional enhancement mode GaN switch of the present invention.
FIG. 3
FIGS. 3A and 3C illustrate an equivalent circuit and a block diagram of the bidirectional enhancement mode GaN switch.
FIG. 4
FIG. 4 is a cross-sectional view of a second embodiment of the bidirectional enhancement mode GaN switch of the present invention.
FIG. 5
FIG. 5 is a cross-sectional view of a third embodiment of the bidirectional enhancement mode GaN switch of the present invention.
FIG. 6
FIG. 6, except the substrate is electrically grounded, rather than being electri- cally shorted to gate 160.
FIG. 7
FIG. 7 is a cross-sectional view of a fifth embodiment of the bidirectional enhancement mode GaN switch of the present invention.
FIG. 8
FIG. 8 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with a sixth …
FIG. 9
FIG. 9 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with a seventh …
FIG. 10
FIG. 10 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with an …
FIG. 11
process tool top view
FIG. 11 is a top view of a bidirectional enhancement mode GaN switch including two sub-switches in a different layout.
FIG. 12
FIG. 12 is a cross-sectional view of a bidirectional enhancement mode GaN switch with gate protection cir- cuitry.
FIG. 13
FIG. 13.
FIG. 14
FIG. 14 is a cross-sectional view of the first sub-switch of the bidirectional enhancement mode GaN switch of
FIG. 15
FIG. 15 is a cross-sectional view of a first sub-switch which is similar to the first sub-switch of bi-directional enhancement-mode GaN switch shown in
FIG. 16
FIG. 16 is a cross-sectional view of a first sub-switch which is similar to the first sub-switch of the bi-directional enhancement-mode GaN switch shown in
Claims
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
1 independent · 9 dependent
1
IndependentGaNAlGaNbidirectional GaN FET switch with single gate
A bidirectional GaN FET switch with a single gate, comprising: a substrate, a GaN layer on the substrate, an AlGaN layer on the GaN layer, a first power electrode and a second power electrode, a third power electrode and a gate, wherein the bidirectional GaN FET switch is formed of a first sub-switch and a second sub-switch integrated together in the bidirectional GaN FET switch on a die having an area and connected in parallel in an equiva-lent circuit, wherein: the first sub-switch comprises a single gate GaN field effect transistor (FET), wherein the first and the second power electrodes serve as source/drain electrodes and wherein the gate is centrally located between the first and second power electrodes, whereby the gate is spaced an equal distance from the first and second power electrodes; the second sub-switch comprises a first GaN FET and a second GaN FET connected in a back-to-back configu-ration having a common gate, wherein the third power electrode acts as a common source, and wherein the first power electrode and the second power electrode serve as the respective drain electrode of the first GaN FET and the second GaN FET; and the gate of the single gate GaN FET of the first sub-switch is electrically connected to the common gate of the first and second back-to-back GaN FETs of the second sub-switch to form the single gate of the bidirectional GaN FET switch; wherein the first sub-switch occupies most of the die area, and the second sub-switch occupies only a small per-centage of the die area, such that current passing through the bidirectional GaN FET switch, when the switch is ON, flows primarily under the single gate of the first sub-switch.
2
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is electrically connected to the single gate.
3
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is electrically connected to the common source of the second sub-switch.
4
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, further comprising at least one field plate, wherein the at least one field plate is connected to the common source of the second sub-switch.
6
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is electrically connected to the power elec-trodes of the first sub-switch by respective diodes.
8
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is electrically connected to the power terminals of the first sub-switch by an active circuit comprising a B₂ comparator connected to first and second transistors which are respectively connected between the first and second power electrodes and the substrate, wherein the comparator is configured to: compare electrical potentials of the first and second power electrodes; and turn on the one of the first and second transistors corre-sponding to the power electrode having a lower poten-tial.
9
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, wherein the substrate is connected to ground.
10
Dependent← claim 1bidirectional GaN FET switch with single gate
The bidirectional GaN FET switch of claim 1, further comprising a voltage divider electrically connected between the single gate and ground, the voltage divider being elec-trically connected to the substrate, such that the substrate has a potential which follows a potential of the single gate at a fraction of the potential of the single gate. ∗ ∗ ∗ ∗ ∗
Device structures
Layer stacks claimed or described, ordered top of device to substrate.
bidirectional GaN FET switch with single gate
AlGaNbarrier layer
GaNchannel layer
substratesubstrate
Materials
Materials described outside the worked examples.
GaN
Channel Layer
AlGaN
Barrier Layer
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
fet electrical
Fet Electrical
FIG. 6, except the substrate is electrically grounded, rather than being electri- cally shorted to gate 160.
FIG. 8 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with a sixth …
FIG. 9 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with a seventh …
FIG. 10 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with an …
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FIG. 8 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with a sixth …
FIG. 9 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with a seventh …
FIG. 10 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with an …
US 9,847,394 B29,847,394 B2 12/2017 Prechtl et al.
US 10,033,296 B110,033,296 B1 * 7/2018 Lee....................... H02M 7/217examiner
US 10,128,228 B110,128,228 B1 * 11/2018 Gao..................... H10D 62/824examiner
US 2006/0071295 A12006/0071295 A1 4/2006 Chang
US 2010/0259321 A12010/0259321 A1 10/2010 Tserng et al.
US 2012/0153300 A12012/0153300 A1 * 6/2012 Lidow................... H01L 23/535examiner
US 2012/0280280 A12012/0280280 A1 * 11/2012 Zhang.................. H10D 30/475examiner
US 2014/0087673 A12014/0087673 A1 3/2014 Mostov et al.
US 2014/0374766 A12014/0374766 A1 12/2014 Bahl et al.
US 2015/0014701 A12015/0014701 A1 1/2015 Briere
US 2016/0218189 A12016/0218189 A1 * 7/2016 Oasa.................... H10D 64/112examiner
US 2017/0103978 A12017/0103978 A1 4/2017 Preschtl et al.
US 2018/0374943 A12018/0374943 A1 * 12/2018 Liu...................... H10D 62/824examiner
US 2019/0207590 A12019/0207590 A1 * 7/2019 Lueders............. H03K 17/0822examiner
US 2021/0408273 A12021/0408273 A1 * 12/2021 Wu................... H01L 23/49562examiner
US 2023/0111542 A12023/0111542 A1 4/2023 Liao et al.
US 2024/0170979 A12024/0170979 A1 * 5/2024 Zhang................. H02J 7/00308examiner
DE 102015117394 B2DE 102015117394 B2 6/2020
JP 7128715 B2JP 7128715 B2 8/2022
TW 201521360 ATW 201521360 A 6/2015
Cited non-patent literature · 2
Zhang et al. High electron mobility transistor HEMT device, wafer packaging device, and electronic device, 2022, machine translation of WO 2022068835A1, pp. 1-32. (Year: 2022).
650 V 3.1m'Ωcm2 GaN-based Monolithic Bidi- rectional Switch Using Normally-off Gate Injection Transistor. International Search Report and Written Opinion dated Jan. 16, 2023 from corresponding PCT/US2022/077731. T. Morita et al., “650 V 3.1m'Ωcm2 GaN-based Monolithic Bidi- rectional Switch Using Normally-off Gate Injection Transistor”, 2007 IEEE International Electron Devices Meeting, 2007, pp. 865-868, doi: 10.1109/IEDM.2007.4419086. Y. Shi et al., “AGaN enhancement-mode reverse blocking MISHEMT with MIS field-effect drain for bidirectional switch”, J Comput Electron, vol. 17, pp. 238-245 (2018). Y. Shi et al., “A non-Ohmic normally-off GaN monolithic bidirec- tional switch with MIS field effect schottky tunnel junction”, Superlattices and Microstructures, vol. 109, pp. 414-422 (2017).10.1109/IEDM.2007.4419086
FIG. 8 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with a sixth …
FIG. 9 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with a seventh …
FIG. 10 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with an …
US 9,847,394 B29,847,394 B2 12/2017 Prechtl et al.
US 10,033,296 B110,033,296 B1 * 7/2018 Lee....................... H02M 7/217examiner
US 10,128,228 B110,128,228 B1 * 11/2018 Gao..................... H10D 62/824examiner
US 2006/0071295 A12006/0071295 A1 4/2006 Chang
US 2010/0259321 A12010/0259321 A1 10/2010 Tserng et al.
US 2012/0153300 A12012/0153300 A1 * 6/2012 Lidow................... H01L 23/535examiner
US 2012/0280280 A12012/0280280 A1 * 11/2012 Zhang.................. H10D 30/475examiner
US 2014/0087673 A12014/0087673 A1 3/2014 Mostov et al.
US 2014/0374766 A12014/0374766 A1 12/2014 Bahl et al.
US 2015/0014701 A12015/0014701 A1 1/2015 Briere
US 2016/0218189 A12016/0218189 A1 * 7/2016 Oasa.................... H10D 64/112examiner
US 2017/0103978 A12017/0103978 A1 4/2017 Preschtl et al.
US 2018/0374943 A12018/0374943 A1 * 12/2018 Liu...................... H10D 62/824examiner
US 2019/0207590 A12019/0207590 A1 * 7/2019 Lueders............. H03K 17/0822examiner
US 2021/0408273 A12021/0408273 A1 * 12/2021 Wu................... H01L 23/49562examiner
US 2023/0111542 A12023/0111542 A1 4/2023 Liao et al.
US 2024/0170979 A12024/0170979 A1 * 5/2024 Zhang................. H02J 7/00308examiner
DE 102015117394 B2DE 102015117394 B2 6/2020
JP 7128715 B2JP 7128715 B2 8/2022
TW 201521360 ATW 201521360 A 6/2015
Cited non-patent literature · 2
Zhang et al. High electron mobility transistor HEMT device, wafer packaging device, and electronic device, 2022, machine translation of WO 2022068835A1, pp. 1-32. (Year: 2022).
650 V 3.1m'Ωcm2 GaN-based Monolithic Bidi- rectional Switch Using Normally-off Gate Injection Transistor. International Search Report and Written Opinion dated Jan. 16, 2023 from corresponding PCT/US2022/077731. T. Morita et al., “650 V 3.1m'Ωcm2 GaN-based Monolithic Bidi- rectional Switch Using Normally-off Gate Injection Transistor”, 2007 IEEE International Electron Devices Meeting, 2007, pp. 865-868, doi: 10.1109/IEDM.2007.4419086. Y. Shi et al., “AGaN enhancement-mode reverse blocking MISHEMT with MIS field-effect drain for bidirectional switch”, J Comput Electron, vol. 17, pp. 238-245 (2018). Y. Shi et al., “A non-Ohmic normally-off GaN monolithic bidirec- tional switch with MIS field effect schottky tunnel junction”, Superlattices and Microstructures, vol. 109, pp. 414-422 (2017).10.1109/IEDM.2007.4419086
FIG. 8 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with a sixth …
FIG. 9 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with a seventh …
FIG. 10 is a cross-sectional view of a first sub-switch, i.e., a single gate GaN FET of a bidirectional enhancement mode GaN switch, in accordance with an …
US 9,847,394 B29,847,394 B2 12/2017 Prechtl et al.
US 10,033,296 B110,033,296 B1 * 7/2018 Lee....................... H02M 7/217examiner
US 10,128,228 B110,128,228 B1 * 11/2018 Gao..................... H10D 62/824examiner
US 2006/0071295 A12006/0071295 A1 4/2006 Chang
US 2010/0259321 A12010/0259321 A1 10/2010 Tserng et al.
US 2012/0153300 A12012/0153300 A1 * 6/2012 Lidow................... H01L 23/535examiner
US 2012/0280280 A12012/0280280 A1 * 11/2012 Zhang.................. H10D 30/475examiner
US 2014/0087673 A12014/0087673 A1 3/2014 Mostov et al.
US 2014/0374766 A12014/0374766 A1 12/2014 Bahl et al.
US 2015/0014701 A12015/0014701 A1 1/2015 Briere
US 2016/0218189 A12016/0218189 A1 * 7/2016 Oasa.................... H10D 64/112examiner
US 2017/0103978 A12017/0103978 A1 4/2017 Preschtl et al.
US 2018/0374943 A12018/0374943 A1 * 12/2018 Liu...................... H10D 62/824examiner
US 2019/0207590 A12019/0207590 A1 * 7/2019 Lueders............. H03K 17/0822examiner
US 2021/0408273 A12021/0408273 A1 * 12/2021 Wu................... H01L 23/49562examiner
US 2023/0111542 A12023/0111542 A1 4/2023 Liao et al.
US 2024/0170979 A12024/0170979 A1 * 5/2024 Zhang................. H02J 7/00308examiner
DE 102015117394 B2DE 102015117394 B2 6/2020
JP 7128715 B2JP 7128715 B2 8/2022
TW 201521360 ATW 201521360 A 6/2015
Cited non-patent literature · 2
Zhang et al. High electron mobility transistor HEMT device, wafer packaging device, and electronic device, 2022, machine translation of WO 2022068835A1, pp. 1-32. (Year: 2022).
650 V 3.1m'Ωcm2 GaN-based Monolithic Bidi- rectional Switch Using Normally-off Gate Injection Transistor. International Search Report and Written Opinion dated Jan. 16, 2023 from corresponding PCT/US2022/077731. T. Morita et al., “650 V 3.1m'Ωcm2 GaN-based Monolithic Bidi- rectional Switch Using Normally-off Gate Injection Transistor”, 2007 IEEE International Electron Devices Meeting, 2007, pp. 865-868, doi: 10.1109/IEDM.2007.4419086. Y. Shi et al., “AGaN enhancement-mode reverse blocking MISHEMT with MIS field-effect drain for bidirectional switch”, J Comput Electron, vol. 17, pp. 238-245 (2018). Y. Shi et al., “A non-Ohmic normally-off GaN monolithic bidirec- tional switch with MIS field effect schottky tunnel junction”, Superlattices and Microstructures, vol. 109, pp. 414-422 (2017).10.1109/IEDM.2007.4419086