Patent
US 10,224,201C-PLANE GaN SUBSTRATE
Kenji ISO
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 10,224,201Patent drawings and their descriptions. Click a drawing to enlarge it.
Figures 1 A and 1 B are drawings illustrating one example of a C-plane GaN substrate of the present invention, with
Figure 1 B being a side view.
Figures 2A to 2C are drawings describing how facet growth areas are formed.
Figures 3A and 3B are drawings each illustrating an arrangement example of dot masks, with
Figure 3B illustrating a square lattice arrangement and a triangle lattice arrangement, respectively.
Figures 4A and 4B are drawings each illustrating lattice pattern example, with
Figure 4B illustrating a square lattice and a triangle lattice, respectively.
Figures 5 A and 5 B are drawings each illustrating a mode of coexistence of dot masks different in dimension.
Figures 6A to 6E are drawings each illustrating a net pattern example.
Figures 7A to 7C are drawings each illustrating a dot pattern example.
Figure 8 is a drawing illustrating a complicated pattern.
Figure 9 is a plan view illustrating a virtual grid drawn on a gallium polar surface of a C-plane GaN substrate.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
(Cu rr ently Amended) A C-plane GaN substrate comprising: a plurality of facet growth areas each having a closed ring outline-shape on a SVG 15675230.07-10-2018.JJG₂₅T₆FRXEAPX2.CLM.1.svg 0.16 2.02 Black and white a spiral dislocation density is less than 1 x 10 6 cm- 2 anywhere on the gallium polar surface, and the gallium polar surface is free from any inversion domain. Currently amended
The C-plane GaN substrate according to claim 1, wherein the spiral dislocation density is less than 8 x 1 0 5 cm- 2 anywhere on the gallium polar surface. Original
The C-plane GaN substrate according to claim 1, wherein the substrate comprises a high dislocation density part having a dislocation density of more than 1 x 1 0 7 cm⁻² and a low dislocation density part having a dislocation density of less than 1 x 10 6 cm- 2 on the gallium polar surface. Original
The C-plane GaN substrate according to claim 1, wherein the substrate is doped with oxygen. Original
The C-plane GaN substrate according to claim 1, wherein the substrate is doped with either or both of silicon and germanium. Original
The C-plane GaN substrate according to claim 1, wherein the substrate has an electrical resistivity of 0.1. cm or less. Original
The C-plane GaN substrate according to claim 1, wherein the plurality of facet growth areas are at least partially regularly a rr anged on the main surface. Original
A method for producing a nitride semiconductor device, comprising a step of preparing the C-plane GaN substrate according to claim 1, and a step of epitaxially growing at least one nitride semiconductor layer on the prepared C-plane GaN substrate. Original
A method for producing an epitaxial wafer, comprising a step of preparing the C-plane GaN substrate according to claim 1, and a step of epitaxially growing at least one nitride semiconductor layer on the prepared C-plane GaN substrate. Original
A C-plane GaN substrate having a gallium polar surface, the substrate comprising: a plurality of facet growth areas each having a closed ring outline-shape on the gallium polar surface, wherein when a virtual square grid of 2 cm x 2 cm is drawn on the gallium polar surface, each cell of the grid comprises at least one 1 cm x 1 cm square area in which a spiral dislocation density is anywhere less than 1 x 10 6 cm⁻², and the gallium polar surface is free from any inversion domain. Currently amended
The C-plane GaN substrate according to claim 11, wherein each cell of the grid comprises at least one 1 cm x 1 cm square area in which a spiral dislocation density is anywhere less than 8 x 1 0 5 cm 2. Original
The C-plane GaN substrate according to claim 11, wherein the substrate comprises a high dislocation density part having a dislocation density of more than 1 x 1 0 7 cm⁻² and a low dislocation density area having a dislocation density of less than 1 x 10 6 cm- 2 on the gallium polar surface. Original
The C-plane GaN substrate according to claim 11, wherein the substrate is doped with oxygen. Original
The C-plane GaN substrate according to claim 11, wherein the substrate is doped with either or both of silicon and germanium. Original
The C-plane GaN substrate according to claim 11, wherein the substrate has an electrical resistivity of 0.1. cm or less. Original
The C-plane GaN substrate according to claim 11, wherein the plurality of facet growth areas are at least partially regularly a rr anged on the main surface. Original
A method for producing a nitride semiconductor device, comprising a step of preparing the C-plane GaN substrate according to claim 11, and a step of epitaxially growing at least one nitride semiconductor layer on the prepared C-plane GaN substrate. Original
A method for producing an epitaxial wafer, comprising a step of preparing the C-plane GaN substrate according to claim 11, and a step of epitaxially growing at least one nitride semiconductor layer on the prepared C-plane GaN substrate. Original
Layer stacks claimed or described, ordered top of device to substrate.
C-plane GaN substrate
nitride semiconductor device
epitaxial wafer
Materials described outside the worked examples.
C-plane GaN substrate
GaN
oxygen dopant
O
silicon and/or germanium dopant
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
spiral dislocation density anywhere on gallium polar surface < 1e6 cm^-2 | ≤ 1000000 cm⁻² | GaN |
spiral dislocation density anywhere on gallium polar surface < 8e5 cm^-2 | ≤ 800000 cm⁻² |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,224,201Patent drawings and their descriptions. Click a drawing to enlarge it.
Figures 1 A and 1 B are drawings illustrating one example of a C-plane GaN substrate of the present invention, with
Figure 1 B being a side view.
Figures 2A to 2C are drawings describing how facet growth areas are formed.
Figures 3A and 3B are drawings each illustrating an arrangement example of dot masks, with
Figure 3B illustrating a square lattice arrangement and a triangle lattice arrangement, respectively.
Figures 4A and 4B are drawings each illustrating lattice pattern example, with
Figure 4B illustrating a square lattice and a triangle lattice, respectively.
Figures 5 A and 5 B are drawings each illustrating a mode of coexistence of dot masks different in dimension.
Figures 6A to 6E are drawings each illustrating a net pattern example.
Figures 7A to 7C are drawings each illustrating a dot pattern example.
Figure 8 is a drawing illustrating a complicated pattern.
Figure 9 is a plan view illustrating a virtual grid drawn on a gallium polar surface of a C-plane GaN substrate.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
(Cu rr ently Amended) A C-plane GaN substrate comprising: a plurality of facet growth areas each having a closed ring outline-shape on a SVG 15675230.07-10-2018.JJG₂₅T₆FRXEAPX2.CLM.1.svg 0.16 2.02 Black and white a spiral dislocation density is less than 1 x 10 6 cm- 2 anywhere on the gallium polar surface, and the gallium polar surface is free from any inversion domain. Currently amended
The C-plane GaN substrate according to claim 1, wherein the spiral dislocation density is less than 8 x 1 0 5 cm- 2 anywhere on the gallium polar surface. Original
The C-plane GaN substrate according to claim 1, wherein the substrate comprises a high dislocation density part having a dislocation density of more than 1 x 1 0 7 cm⁻² and a low dislocation density part having a dislocation density of less than 1 x 10 6 cm- 2 on the gallium polar surface. Original
The C-plane GaN substrate according to claim 1, wherein the substrate is doped with oxygen. Original
The C-plane GaN substrate according to claim 1, wherein the substrate is doped with either or both of silicon and germanium. Original
The C-plane GaN substrate according to claim 1, wherein the substrate has an electrical resistivity of 0.1. cm or less. Original
The C-plane GaN substrate according to claim 1, wherein the plurality of facet growth areas are at least partially regularly a rr anged on the main surface. Original
A method for producing a nitride semiconductor device, comprising a step of preparing the C-plane GaN substrate according to claim 1, and a step of epitaxially growing at least one nitride semiconductor layer on the prepared C-plane GaN substrate. Original
A method for producing an epitaxial wafer, comprising a step of preparing the C-plane GaN substrate according to claim 1, and a step of epitaxially growing at least one nitride semiconductor layer on the prepared C-plane GaN substrate. Original
A C-plane GaN substrate having a gallium polar surface, the substrate comprising: a plurality of facet growth areas each having a closed ring outline-shape on the gallium polar surface, wherein when a virtual square grid of 2 cm x 2 cm is drawn on the gallium polar surface, each cell of the grid comprises at least one 1 cm x 1 cm square area in which a spiral dislocation density is anywhere less than 1 x 10 6 cm⁻², and the gallium polar surface is free from any inversion domain. Currently amended
The C-plane GaN substrate according to claim 11, wherein each cell of the grid comprises at least one 1 cm x 1 cm square area in which a spiral dislocation density is anywhere less than 8 x 1 0 5 cm 2. Original
The C-plane GaN substrate according to claim 11, wherein the substrate comprises a high dislocation density part having a dislocation density of more than 1 x 1 0 7 cm⁻² and a low dislocation density area having a dislocation density of less than 1 x 10 6 cm- 2 on the gallium polar surface. Original
The C-plane GaN substrate according to claim 11, wherein the substrate is doped with oxygen. Original
The C-plane GaN substrate according to claim 11, wherein the substrate is doped with either or both of silicon and germanium. Original
The C-plane GaN substrate according to claim 11, wherein the substrate has an electrical resistivity of 0.1. cm or less. Original
The C-plane GaN substrate according to claim 11, wherein the plurality of facet growth areas are at least partially regularly a rr anged on the main surface. Original
A method for producing a nitride semiconductor device, comprising a step of preparing the C-plane GaN substrate according to claim 11, and a step of epitaxially growing at least one nitride semiconductor layer on the prepared C-plane GaN substrate. Original
A method for producing an epitaxial wafer, comprising a step of preparing the C-plane GaN substrate according to claim 11, and a step of epitaxially growing at least one nitride semiconductor layer on the prepared C-plane GaN substrate. Original
Layer stacks claimed or described, ordered top of device to substrate.
C-plane GaN substrate
nitride semiconductor device
epitaxial wafer
Materials described outside the worked examples.
C-plane GaN substrate
GaN
oxygen dopant
O
silicon and/or germanium dopant
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
spiral dislocation density anywhere on gallium polar surface < 1e6 cm^-2 | ≤ 1000000 cm⁻² | GaN |
spiral dislocation density anywhere on gallium polar surface < 8e5 cm^-2 | ≤ 800000 cm⁻² |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,224,201Patent drawings and their descriptions. Click a drawing to enlarge it.
Figures 1 A and 1 B are drawings illustrating one example of a C-plane GaN substrate of the present invention, with
Figure 1 B being a side view.
Figures 2A to 2C are drawings describing how facet growth areas are formed.
Figures 3A and 3B are drawings each illustrating an arrangement example of dot masks, with
Figure 3B illustrating a square lattice arrangement and a triangle lattice arrangement, respectively.
Figures 4A and 4B are drawings each illustrating lattice pattern example, with
Figure 4B illustrating a square lattice and a triangle lattice, respectively.
Figures 5 A and 5 B are drawings each illustrating a mode of coexistence of dot masks different in dimension.
Figures 6A to 6E are drawings each illustrating a net pattern example.
Figures 7A to 7C are drawings each illustrating a dot pattern example.
Figure 8 is a drawing illustrating a complicated pattern.
Figure 9 is a plan view illustrating a virtual grid drawn on a gallium polar surface of a C-plane GaN substrate.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
(Cu rr ently Amended) A C-plane GaN substrate comprising: a plurality of facet growth areas each having a closed ring outline-shape on a SVG 15675230.07-10-2018.JJG₂₅T₆FRXEAPX2.CLM.1.svg 0.16 2.02 Black and white a spiral dislocation density is less than 1 x 10 6 cm- 2 anywhere on the gallium polar surface, and the gallium polar surface is free from any inversion domain. Currently amended
The C-plane GaN substrate according to claim 1, wherein the spiral dislocation density is less than 8 x 1 0 5 cm- 2 anywhere on the gallium polar surface. Original
The C-plane GaN substrate according to claim 1, wherein the substrate comprises a high dislocation density part having a dislocation density of more than 1 x 1 0 7 cm⁻² and a low dislocation density part having a dislocation density of less than 1 x 10 6 cm- 2 on the gallium polar surface. Original
The C-plane GaN substrate according to claim 1, wherein the substrate is doped with oxygen. Original
The C-plane GaN substrate according to claim 1, wherein the substrate is doped with either or both of silicon and germanium. Original
The C-plane GaN substrate according to claim 1, wherein the substrate has an electrical resistivity of 0.1. cm or less. Original
The C-plane GaN substrate according to claim 1, wherein the plurality of facet growth areas are at least partially regularly a rr anged on the main surface. Original
A method for producing a nitride semiconductor device, comprising a step of preparing the C-plane GaN substrate according to claim 1, and a step of epitaxially growing at least one nitride semiconductor layer on the prepared C-plane GaN substrate. Original
A method for producing an epitaxial wafer, comprising a step of preparing the C-plane GaN substrate according to claim 1, and a step of epitaxially growing at least one nitride semiconductor layer on the prepared C-plane GaN substrate. Original
A C-plane GaN substrate having a gallium polar surface, the substrate comprising: a plurality of facet growth areas each having a closed ring outline-shape on the gallium polar surface, wherein when a virtual square grid of 2 cm x 2 cm is drawn on the gallium polar surface, each cell of the grid comprises at least one 1 cm x 1 cm square area in which a spiral dislocation density is anywhere less than 1 x 10 6 cm⁻², and the gallium polar surface is free from any inversion domain. Currently amended
The C-plane GaN substrate according to claim 11, wherein each cell of the grid comprises at least one 1 cm x 1 cm square area in which a spiral dislocation density is anywhere less than 8 x 1 0 5 cm 2. Original
The C-plane GaN substrate according to claim 11, wherein the substrate comprises a high dislocation density part having a dislocation density of more than 1 x 1 0 7 cm⁻² and a low dislocation density area having a dislocation density of less than 1 x 10 6 cm- 2 on the gallium polar surface. Original
The C-plane GaN substrate according to claim 11, wherein the substrate is doped with oxygen. Original
The C-plane GaN substrate according to claim 11, wherein the substrate is doped with either or both of silicon and germanium. Original
The C-plane GaN substrate according to claim 11, wherein the substrate has an electrical resistivity of 0.1. cm or less. Original
The C-plane GaN substrate according to claim 11, wherein the plurality of facet growth areas are at least partially regularly a rr anged on the main surface. Original
A method for producing a nitride semiconductor device, comprising a step of preparing the C-plane GaN substrate according to claim 11, and a step of epitaxially growing at least one nitride semiconductor layer on the prepared C-plane GaN substrate. Original
A method for producing an epitaxial wafer, comprising a step of preparing the C-plane GaN substrate according to claim 11, and a step of epitaxially growing at least one nitride semiconductor layer on the prepared C-plane GaN substrate. Original
Layer stacks claimed or described, ordered top of device to substrate.
C-plane GaN substrate
nitride semiconductor device
epitaxial wafer
Materials described outside the worked examples.
C-plane GaN substrate
GaN
oxygen dopant
O
silicon and/or germanium dopant
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
spiral dislocation density anywhere on gallium polar surface < 1e6 cm^-2 | ≤ 1000000 cm⁻² | GaN |
spiral dislocation density anywhere on gallium polar surface < 8e5 cm^-2 | ≤ 800000 cm⁻² |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,224,201Patent drawings and their descriptions. Click a drawing to enlarge it.
Figures 1 A and 1 B are drawings illustrating one example of a C-plane GaN substrate of the present invention, with
Figure 1 B being a side view.
Figures 2A to 2C are drawings describing how facet growth areas are formed.
Figures 3A and 3B are drawings each illustrating an arrangement example of dot masks, with
Figure 3B illustrating a square lattice arrangement and a triangle lattice arrangement, respectively.
Figures 4A and 4B are drawings each illustrating lattice pattern example, with
Figure 4B illustrating a square lattice and a triangle lattice, respectively.
Figures 5 A and 5 B are drawings each illustrating a mode of coexistence of dot masks different in dimension.
Figures 6A to 6E are drawings each illustrating a net pattern example.
Figures 7A to 7C are drawings each illustrating a dot pattern example.
Figure 8 is a drawing illustrating a complicated pattern.
Figure 9 is a plan view illustrating a virtual grid drawn on a gallium polar surface of a C-plane GaN substrate.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
(Cu rr ently Amended) A C-plane GaN substrate comprising: a plurality of facet growth areas each having a closed ring outline-shape on a SVG 15675230.07-10-2018.JJG₂₅T₆FRXEAPX2.CLM.1.svg 0.16 2.02 Black and white a spiral dislocation density is less than 1 x 10 6 cm- 2 anywhere on the gallium polar surface, and the gallium polar surface is free from any inversion domain. Currently amended
The C-plane GaN substrate according to claim 1, wherein the spiral dislocation density is less than 8 x 1 0 5 cm- 2 anywhere on the gallium polar surface. Original
The C-plane GaN substrate according to claim 1, wherein the substrate comprises a high dislocation density part having a dislocation density of more than 1 x 1 0 7 cm⁻² and a low dislocation density part having a dislocation density of less than 1 x 10 6 cm- 2 on the gallium polar surface. Original
The C-plane GaN substrate according to claim 1, wherein the substrate is doped with oxygen. Original
The C-plane GaN substrate according to claim 1, wherein the substrate is doped with either or both of silicon and germanium. Original
The C-plane GaN substrate according to claim 1, wherein the substrate has an electrical resistivity of 0.1. cm or less. Original
The C-plane GaN substrate according to claim 1, wherein the plurality of facet growth areas are at least partially regularly a rr anged on the main surface. Original
A method for producing a nitride semiconductor device, comprising a step of preparing the C-plane GaN substrate according to claim 1, and a step of epitaxially growing at least one nitride semiconductor layer on the prepared C-plane GaN substrate. Original
A method for producing an epitaxial wafer, comprising a step of preparing the C-plane GaN substrate according to claim 1, and a step of epitaxially growing at least one nitride semiconductor layer on the prepared C-plane GaN substrate. Original
A C-plane GaN substrate having a gallium polar surface, the substrate comprising: a plurality of facet growth areas each having a closed ring outline-shape on the gallium polar surface, wherein when a virtual square grid of 2 cm x 2 cm is drawn on the gallium polar surface, each cell of the grid comprises at least one 1 cm x 1 cm square area in which a spiral dislocation density is anywhere less than 1 x 10 6 cm⁻², and the gallium polar surface is free from any inversion domain. Currently amended
The C-plane GaN substrate according to claim 11, wherein each cell of the grid comprises at least one 1 cm x 1 cm square area in which a spiral dislocation density is anywhere less than 8 x 1 0 5 cm 2. Original
The C-plane GaN substrate according to claim 11, wherein the substrate comprises a high dislocation density part having a dislocation density of more than 1 x 1 0 7 cm⁻² and a low dislocation density area having a dislocation density of less than 1 x 10 6 cm- 2 on the gallium polar surface. Original
The C-plane GaN substrate according to claim 11, wherein the substrate is doped with oxygen. Original
The C-plane GaN substrate according to claim 11, wherein the substrate is doped with either or both of silicon and germanium. Original
The C-plane GaN substrate according to claim 11, wherein the substrate has an electrical resistivity of 0.1. cm or less. Original
The C-plane GaN substrate according to claim 11, wherein the plurality of facet growth areas are at least partially regularly a rr anged on the main surface. Original
A method for producing a nitride semiconductor device, comprising a step of preparing the C-plane GaN substrate according to claim 11, and a step of epitaxially growing at least one nitride semiconductor layer on the prepared C-plane GaN substrate. Original
A method for producing an epitaxial wafer, comprising a step of preparing the C-plane GaN substrate according to claim 11, and a step of epitaxially growing at least one nitride semiconductor layer on the prepared C-plane GaN substrate. Original
Layer stacks claimed or described, ordered top of device to substrate.
C-plane GaN substrate
nitride semiconductor device
epitaxial wafer
Materials described outside the worked examples.
C-plane GaN substrate
GaN
oxygen dopant
O
silicon and/or germanium dopant
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
spiral dislocation density anywhere on gallium polar surface < 1e6 cm^-2 | ≤ 1000000 cm⁻² | GaN |
spiral dislocation density anywhere on gallium polar surface < 8e5 cm^-2 | ≤ 800000 cm⁻² |
Related documents with shared materials, methods, properties, or citations.
nitride semiconductor layer
electrical resistivity <= 0.1 Ohm·cm | ≤ 0.1 Ohm·cm | GaN |
Temperature | 980–1005 °C | — |
Thickness | 45–55 mm | — |
Thickness | 95–105 mm | — |
Thickness | 145–155 mm | — |
Thickness | 195–205 mm | — |
Thickness | 50–150 nm | — |
Temperature | 980–1100 °C | — |
Thickness | 0.0001 cm | — |
Thickness | ≤ 3 mm | — |
nitride semiconductor layer
electrical resistivity <= 0.1 Ohm·cm | ≤ 0.1 Ohm·cm | GaN |
Temperature | 980–1005 °C | — |
Thickness | 45–55 mm | — |
Thickness | 95–105 mm | — |
Thickness | 145–155 mm | — |
Thickness | 195–205 mm | — |
Thickness | 50–150 nm | — |
Temperature | 980–1100 °C | — |
Thickness | 0.0001 cm | — |
Thickness | ≤ 3 mm | — |
nitride semiconductor layer
electrical resistivity <= 0.1 Ohm·cm | ≤ 0.1 Ohm·cm | GaN |
Temperature | 980–1005 °C | — |
Thickness | 45–55 mm | — |
Thickness | 95–105 mm | — |
Thickness | 145–155 mm | — |
Thickness | 195–205 mm | — |
Thickness | 50–150 nm | — |
Temperature | 980–1100 °C | — |
Thickness | 0.0001 cm | — |
Thickness | ≤ 3 mm | — |
nitride semiconductor layer
electrical resistivity <= 0.1 Ohm·cm | ≤ 0.1 Ohm·cm | GaN |
Temperature | 980–1005 °C | — |
Thickness | 45–55 mm | — |
Thickness | 95–105 mm | — |
Thickness | 145–155 mm | — |
Thickness | 195–205 mm | — |
Thickness | 50–150 nm | — |
Temperature | 980–1100 °C | — |
Thickness | 0.0001 cm | — |
Thickness | ≤ 3 mm | — |