Damage-Free Plasma-Enhanced CVD Passivation of AlGaN/GaN High Electron Mobility Transistors

Marko J. Tadjer

Patent

Atlas literature

Patent

US 9,960,266

Damage-Free Plasma-Enhanced CVD Passivation of AlGaN/GaN High Electron Mobility Transistors

Marko J. Tadjer, Andrew D. Koehler, Travis J. Anderson, Karl D. Hobart

Drawings

Patent drawings and their descriptions. Click a drawing to enlarge it.

FIG. 1

FIG. 1 is a block schematic illustrating aspects of an exemplary SiN-passivated HEMT in accordance with the prior art. Page 4 of 23 Application of Marko J. …

FIG. 2

FIG. 2A illustrates the concept of quiescent bias well-known to those skilled in the art. The device is stressed at pre-determined values for the drain and …

FIG. 3

FIG. 3 is a block schematic illustrating aspects of a ﬁrst embodiment of an HF/LF SiN-passivated HEMT in accordance with the present disclosure. [019]

FIG. 4

performance graph

FIG. 4A shows the Hall mobility p H (shown by the squares) and sheet carrier density NSH (shown by the triangles) for each of samples lA-l E. The lowest …

FIG. 5

FIG. 5 is a block schematic illustrating aspects of a second embodiment of an HF/LF SiN-passivated HEMT in accordance with the present disclosure. [021]

FIG. 6

FIG. 6 is a plot illustrating the eﬀect on current collapse of the SiN deposition process in accordance with the present invention. DETAILED DESCRIPTION [022] …

Claims

Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.

4 independent · 23 dependent

1
IndependentAlGaNSiNSiNGaNBi-layer SiN passivated AlGaN/GaN HEMT
A passivated high-electron mobility transistor (HEMT) device, comprising: an A l GaN/GaN heterostructure having an A l GaN layer disposed on an upper surface of a GaN layer; a gate formed on an upper surface of the A l GaN layer; a thin HF SiN layer deposited by high-frequency plasma-enhanced chemical vapor deposition (HF PECVD) on an upper surface of the AlGaN layer and along the sides of the gat e, As»u a>>i; and a thick H F/LF SiN layer deposited by high-frequency/low-frequency plasma-enhanced chemical vapor deposition (H F/LF PECVD) on an upper surface of the annealed HF SiN layer; whreis the thin HF SiN layer and the thick HF/LF SiN layer Az tpe _, rising bi-layer SiN passivation on the p,;.:::;"»:- Al GaN surface of the H EMT device; \'V te"as''cef (IA' 3)t oge4', A N ug-ve rfa21 Currently amended
1. 2
  Dependent← claim 1SiNSiNBi-layer SiN passivated AlGaN/GaN HEMT
  The passivated HEMT device according to claim 1, wherein the HF SiN layer is deposited at a high rf frequency of 13.56 MHz and the HF/LF SiN layer is deposited at a high rf frequency of 13.56 MH z and a low frequency of 100-300 k Hz. Original
2. 3
  Dependent← claim 1SiNBi-layer SiN passivated AlGaN/GaN HEMT
  The passivated H EMT device according to claim 1, wherein the H F SiN layer has a thickness of 3 to 20 nm. Original
3. 4
  Dependent← claim 1SiNBi-layer SiN passivated AlGaN/GaN HEMT
  The passivated HEMT device according to claim 1, wherein the H F SiN layer has a thickness of 10 nm. Original
4. 5
  Dependent← claim 1SiNBi-layer SiN passivated AlGaN/GaN HEMT
  The passivated HEMT device according to claim 1, wherein the HF/LF SiN layer has a thickness of 20 to 500 nm. Original
5. 6
  Dependent← claim 1SiNBi-layer SiN passivated AlGaN/GaN HEMT
  The passivated H EMT device according to claim 1, wherein the HF/LF SiN layer has a thickness of 100 nm. Original
7
IndependentAlGaNSiNSiNSiNGaNTri-layer SiN passivated AlGaN/GaN HEMT
A passivated high-electron mobility transistor (H EMT) device, comprising: an A l GaN/GaN heterostructure having an A l GaN layer disposed on an upper surface of a GaN layer; a ﬁrst thin HF SiN layer deposited by high-frequency plasma-enhanced chemical vapor deposition (HF P EC VD) on an upper surface of the A l GaN layer-the ﬁrst thin HF SiN layer being annealed Y-ss h s H a second thin HF SiN layer deposited by H F PECVD dectiv on an upper surface of the annealed ﬁrst thin HF SiN layer astd iogg.tsidsci;and a thick H F/LF SiN layer deposited by high-frequency/low-frequency plasma-enhanced chemical vapor deposition (HF/LF P EC VD) i rct1 on an upper surface of the second HF SiN barrier layer; (NW'? -spprsQ' sa-(mXg''XX 4N-'. f' 'X"'Qt'Q'"ﬂ t't'N'X X' NX k44F _{_} 4F -w4e *iNS the ﬁrst thin H F SiN layer, the second thin HF SiN layer, and the thick HF/LF SiN layer t.wpes -omrisingg tri- l ayer SiN passivation on the plas -am. 4 'r- AI GaN surface of the HEM T device-Currently amended
1. 8
  Dependent← claim 7SiNSiNSiNTri-layer SiN passivated AlGaN/GaN HEMT
  The passivated HEMT device according to claim 7, wherein the ﬁrst and second HF SiN layers are deposited at a high rf frequency of 13.56 MHz and the HF/LF SiN layer is deposited at a high rf frequency of 13.56 MHz and a low frequency of 100-300 kHz. Original
2. 9
  Dependent← claim 7SiNSiNTri-layer SiN passivated AlGaN/GaN HEMT
  9. The passivated H EMT device according to claim 7, wherein at least one of the ﬁrst and second HF SiN layers has a thickness of 3-20 nm. Original
3. 10
  Dependent← claim 7SiNSiNTri-layer SiN passivated AlGaN/GaN HEMT
  The passivated H EMT device according to claim 7, wherein at least one of the ﬁrst and second H F SiN layers has a thickness of lO nm. Original
4. 11
  Dependent← claim 7SiNTri-layer SiN passivated AlGaN/GaN HEMT
  The passivated HEMT device according to claim 7, wherein the H F/LF SiN layer has a thickness of 20-500 nm. Original
5. 12
  Dependent← claim 7SiNTri-layer SiN passivated AlGaN/GaN HEMT
  The passivated HEMT device according to claim 7, wherein the H F/LF SiN layer has a thickness of 100 nm. Original
6. 26
  Dependent← claim 7SiNTri-layer SiN passivated AlGaN/GaN HEMT
  The device according to claim 7, wherein the second thin HF SiN layer is annealed at 750 0 C for 10 minutes. New
13
IndependentAlGaNSiNSiNGaNBi-layer SiN passivated AlGaN/GaN HEMT
A method for forming a passivated AlGaN/GaN high electron mobility transistor (H EMT) device, comprising: depositing an A l GaN barrier layer on an upper surface of a GaN channel/buﬀer layer; forming a gate on an upper surface of the A l GaN barrier layer; depositing a thin HF SiN layer -Ay --by means of high-frequency plasma-enhanced chemical vapor deposition (HF PECVD ~divectlivon an uno'ersnr 'ae oj'heﬂglbar avc-r dad alonguh Uk lg S t e gaQ e Derrnancc as abarrierto Qlesm muA'e~ QX'e A-~aN surl¾'e and depositing a thick HF/L F SiN layer b y s Gee l ecuecY s f.asa hson _ _c-':p;ze ttataet the anfealedHF SiN w+Aei-1 the thin HF SiN layer and the thick HF/LF SiN pa-s-M₄Aa layer -&mpr1se c?_g isirgzbi -layer SiN passivation on the -"asMa-.ata&±se-Al GaN surface of the HEMT device where= x-11' s _ _S\~ eprmi -ayget:-alta AIec i a.N,,.:" Currently amended
1. 14
  Dependent← claim 13SiNSiN
  The method according to claim 13, wherein the HF SiN layer is deposited at an rf frequency of 13.56 MHz and the HF/LF SiN layer is deposited at a high rf frequency of 13.56 MHz and a low frequency of 100-300 kHz. Original
2. 15
  Dependent← claim 13SiN
  The method according to claim 13, wherein the HF SiN layer has a thickness of 3-20 nm. Original
3. 16
  Dependent← claim 13SiN
  The method according to claim 13, wherein the HF SiN layer has a thickness of 10 nm. Original
4. 17
  Dependent← claim 13SiN
  The method according to claim 13, wherein the HF/LF SiN layer has a thickness of 20-500 nm. Original
5. 18
  Dependent← claim 13SiN
  The method according to claim 13, wherein the HF/LF SiN layer has a thickness of 100 nm. Original
19
IndependentAlGaNSiNSiNSiNGaNTri-layer SiN passivated AlGaN/GaN HEMT
A method for forming a passivated AlGaN/GaN high electron mobility transistor (H EMT) device, comprising: depositing an A l GaN barrier layer on an upper surface of a GaN channel/buﬀer layer; depositing a ﬁrst thin H F SiN layer drecit1 on an upper surface of the AlGaN barrier layer by means of high-frequency plasma-enhanced chemical vapor deposition (HF PECVD); annealing the ﬁrst thin HF SiN layer (-_deiS Ste ﬁrst_ FSiN ---roy -s forming a gate diel-on ajst _ 'area an upper surface of he anneAed ﬁrst thin HF SiN layer; depositing a second t h in H F SiN layer e 1 eJ'vih euencvvasmaenianced chcca3 apor de;u. M s:_ tCYD) _rease area an upp er surface of the annealed ﬁrst 1 1 F SiN layer and on the sides of the gate by means of HF PECVD; and depositing a thick HF/LF SiN layer b y ean;V o:v'g requencvJwenf sma: e::hafgd 'cHcaa:or ds:/E) iN on an upper surface o f the second thin HF SiN la y er-4;y-4:Rt>-.-;.:th4teiue y4ew, restuesey-phasma-e ha_,i -,:.,- whr' the ﬁrst and second thin HF SiN layers and the thick HF/LF SiN layer erme comisn_ tri -layer SiN passivation on the s-g -A surface of the H EMT device; --r w.e1ein~he 7dE PsEl Uilsitta seganu I E dF ₂i1 ineSXrevcnts upasma(dﬂdt ie lG akuN sufa ce ifmﬃ lﬁogeJ',lOS iﬂagtielk&.stingOf B it secoaG tﬂinﬂ I N jageCg agu whriﬂ I₁PStaniann '"" n"'sjd' SUN laversurcv smaerw~'' to The.AI(3aNstsui ace Currently amended
1. 20
  Dependent← claim 19SiNSiNSiN
  The method according to claim 19, wherein the ﬁrst and second HF SiN layers are deposited at an rf frequency of 13.56 MH z and the H F/LF SiN layer is deposited at a high rf frequency of 13.56 MH z and a low frequency of 100-300 k Hz. Original
2. 21
  Dependent← claim 19SiN
  The method according to claim 19, wherein the ﬁrst HF SiN layer has a thickness of 3-20 nm. Original
3. 22
  Dependent← claim 19SiN
  The method according to claim 19, wherein the second HF SiN layer has a thickness of 3-20 nm. Original
4. 23
  Dependent← claim 19SiNSiN
  The method according to claim 19, wherein each of the ﬁrst and second HF SiN layers has a thickness of 10 nm. Original
5. 24
  Dependent← claim 19SiN
  The method according to claim 19, wherein the HF/LF SiN layer has a thickness of 20-500 nm. Original
6. 25
  Dependent← claim 19SiN
  The method according to claim 19, wherein the HF/LF SiN layer has a thickness of 100 nm. Original
7. 27
  Dependent← claim 19SiN
  The method according to claim 19, wherein the second thin HF SiN layer is annealed at 750 0 C for 10 minutes. New

Device structures

Layer stacks claimed or described, ordered top of device to substrate.

Bi-layer SiN passivated AlGaN/GaN HEMT

SiNthick hf lf sin passivation

SiNthin hf sin passivation

AlGaNbarrier

GaNchannel buffer

Tri-layer SiN passivated AlGaN/GaN HEMT

SiNthick hf lf sin passivation

Materials

Materials described outside the worked examples.

AlGaN

Barrier Layer

thin HF SiN (first/single HF SiN barrier layer)

SiN

Process steps

Additional fabrication and treatment steps described in the patent.

Pecvd Deposition

Step 1

Process details

precursors:SiH4, NH₃

temperature c max:20

temperature c min:3

thickness range nm:3-20

typical thickness nm:

Characterization

Measurements and analyses referenced in the patent, with their drawing references.

fet electrical

Fet Electrical

FIG. 2A illustrates the concept of quiescent bias well-known to those skilled in the art. The device is stressed at pre-determined values for the drain and …

Figure references

FIG. 2

GaNGaN

Reported properties

Performance values and ranges asserted in the specification or claims.

Property	Value	Material
Thickness	5–20 nm	—
Duration

Why these are connected

Related documents with shared materials, methods, properties, or citations.

Damage-Free Plasma-Enhanced CVD Passivation of AlGaN/GaN High Electron Mobility Transistors | Matter42 Literature