Patent
US 12,457,782 B1GAN-BASED DEVICE BASED ON PATTERNED OHMIC CONTACT AND MANUFACTURING METHOD THEREOF
Jiejie Zhu, Xiaohua Ma, Jingshu Guo
Xidian University, Xi’an (CN)·Oct. 28, 2025·US
Copyright © 2026 Matter42. All rights reserved.
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Atlas literature
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US 12,457,782 B1Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 illustrates a schematic sectional structural diagram of a GaN-based device based on patterned ohmic contact according to an embodiment of the disclosure.
FIG. 2 illustrates a schematic diagram from a perspective of a top view of a device after manufacturing a source 65 electrode and a drain electrode according …
FIGS. 3A-3L illustrate a schematic diagram of a manu- facturing process of the GaN-based device based on pat- terned ohmic contact according to an embodiment …
FIG. 4 illustrates a schematic diagram from a perspective of a top view of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A manufacturing method of a gallium nitride (GaN)- based device based on patterned ohmic contact, comprising: step 1, growing a nucleation layer, a buffer layer, a channel layer, an insertion layer, a barrier layer and a cap layer on a substrate layer sequentially in that order; step 2, growing a silicon oxide (SiO₂) mask layer on the cap layer; step 3, coating photoresist on the SiO₂ mask layer, and photolithographing ohmic contact region patterns on two sides of the photoresist; wherein an axis of each of the ohmic contact region patterns extends along a gate width direction, and opposite edges of the ohmic contact region patterns each comprise a plurality of arc-shaped edges and a plurality of flat edges; and wherein the plurality of arc-shaped edges and the plurality of flat edges are alternately arranged and sequentially connected; and each of the plurality of arc-shaped edges protrudes towards outward; step 4, etching the SiO₂ mask layer, the cap layer, the barrier layer, the insertion layer and a part of the channel layer corresponding to the ohmic contact region patterns to form ohmic contact recesses, and removing the photoresist; step 5, epitaxially growing a n-type doped gallium nitride (n+-GaN) material or the n+ a n-type doped indium gallium nitride (n+-InGaN) material on a surface of a product prepared in the step 4; step 6, removing the SiO₂ mask layer to form epitaxial layers; step 7, preparing a source electrode and a drain electrode on the epitaxial layers; step 8, preparing a mesa isolation; step 9, depositing a passivation layer on surfaces of the epitaxial layers and the cap layer, removing the passi-vation layer deposited on the source electrode and the drain electrode, and preparing a gate groove; step 10, preparing a gate electrode; and step 11, performing metal interconnect to obtain the GaN-based device based on patterned ohmic contact; wherein the GaN-based device based on patterned ohmic contact comprises: the substrate layer, the nucleation layer, the buffer layer, the channel layer, the insertion layer, the barrier layer and the cap layer sequentially arranged in that order from bottom to top; the ohmic contact recesses, defined on two ends of the cap layer respectively and extending into the channel layer; wherein an axis of each of the ohmic contact recesses extends along the gate width direction; the gate electrode, located between the ohmic contact recesses; wherein a side wall of each of the ohmic contact recesses close to the gate electrode comprises a plurality of arc-shaped side walls and a plurality of flat side walls; wherein the plurality of arc-shaped side walls and the plurality of flat side walls are alternately arranged and sequentially connected; and each of the plu-rality of arc-shaped side walls protrudes towards a direction of the gate electrode; the epitaxial layers, disposed in the ohmic contact recesses respectively, wherein an upper end of each of the epitaxial layers is located above the cap layer; and the passivation layer, covered on the cap layer and the epitaxial layers, wherein the source electrode and the B₁ drain electrode penetrate through the passivation layer and are disposed on the epitaxial layers respec-tively; and the gate electrode penetrates through the passivation layer and extends onto the cap layer; and wherein the epitaxial layers are made from the n+-GaN material or the n+-InGaN material.
The manufacturing method of the GaN-based device based on patterned ohmic contact as claimed in claim 1, wherein the step 3 comprises: coating the photoresist on the SiO₂ mask layer, exposing the ohmic contact region patterns on the two sides of the photoresist through a mask using a photolithogra-phy machine to obtain exposed ohmic contact region patterns, and developing the exposed ohmic contact region patterns to remove the photoresist on the ohmic contact region patterns.
The manufacturing method of the GaN-based device based on patterned ohmic contact as claimed in claim 1, wherein the step 7 comprises: step 71, photolithographing a source electrode pattern and a drain electrode pattern on the epitaxial layers respec-tively; step 72, evaporating titanium/gold (Ti/Au) metal elec-trodes through an electron beam evaporation device; and step 73, stripping metals in unexposed regions to form the source electrode and the drain electrode. ∗ ∗ ∗ ∗ ∗
Embodiments described in the patent, grouped by the materials and process steps they use.
8 materials1 process step
A GaN-based device based on patterned ohmic contact including a substrate layer, nucleation layer, buffer layer, channel layer, insertion layer, barrier layer and cap layer sequentially from bottom to top. Ohmic contact recesses are defined in two ends of the cap layer extending into the channel layer. Arc-shaped and flat side walls are alternately arranged on the recess walls close to the gate electrode. Epitaxial layers of n+-GaN or n+-InGaN are disposed in the recesses with their upper ends above the cap layer. A T-type gate electrode, passivation layer, source and drain electrodes complete the structure.
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based HEMT with patterned ohmic contact
Materials described outside the worked examples.
titanium/gold
Ti/Au
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Duration | ≥ 3 hours | — |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 3
Cited non-patent literature · 1
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 12,457,782 B1Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 illustrates a schematic sectional structural diagram of a GaN-based device based on patterned ohmic contact according to an embodiment of the disclosure.
FIG. 2 illustrates a schematic diagram from a perspective of a top view of a device after manufacturing a source 65 electrode and a drain electrode according …
FIGS. 3A-3L illustrate a schematic diagram of a manu- facturing process of the GaN-based device based on pat- terned ohmic contact according to an embodiment …
FIG. 4 illustrates a schematic diagram from a perspective of a top view of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A manufacturing method of a gallium nitride (GaN)- based device based on patterned ohmic contact, comprising: step 1, growing a nucleation layer, a buffer layer, a channel layer, an insertion layer, a barrier layer and a cap layer on a substrate layer sequentially in that order; step 2, growing a silicon oxide (SiO₂) mask layer on the cap layer; step 3, coating photoresist on the SiO₂ mask layer, and photolithographing ohmic contact region patterns on two sides of the photoresist; wherein an axis of each of the ohmic contact region patterns extends along a gate width direction, and opposite edges of the ohmic contact region patterns each comprise a plurality of arc-shaped edges and a plurality of flat edges; and wherein the plurality of arc-shaped edges and the plurality of flat edges are alternately arranged and sequentially connected; and each of the plurality of arc-shaped edges protrudes towards outward; step 4, etching the SiO₂ mask layer, the cap layer, the barrier layer, the insertion layer and a part of the channel layer corresponding to the ohmic contact region patterns to form ohmic contact recesses, and removing the photoresist; step 5, epitaxially growing a n-type doped gallium nitride (n+-GaN) material or the n+ a n-type doped indium gallium nitride (n+-InGaN) material on a surface of a product prepared in the step 4; step 6, removing the SiO₂ mask layer to form epitaxial layers; step 7, preparing a source electrode and a drain electrode on the epitaxial layers; step 8, preparing a mesa isolation; step 9, depositing a passivation layer on surfaces of the epitaxial layers and the cap layer, removing the passi-vation layer deposited on the source electrode and the drain electrode, and preparing a gate groove; step 10, preparing a gate electrode; and step 11, performing metal interconnect to obtain the GaN-based device based on patterned ohmic contact; wherein the GaN-based device based on patterned ohmic contact comprises: the substrate layer, the nucleation layer, the buffer layer, the channel layer, the insertion layer, the barrier layer and the cap layer sequentially arranged in that order from bottom to top; the ohmic contact recesses, defined on two ends of the cap layer respectively and extending into the channel layer; wherein an axis of each of the ohmic contact recesses extends along the gate width direction; the gate electrode, located between the ohmic contact recesses; wherein a side wall of each of the ohmic contact recesses close to the gate electrode comprises a plurality of arc-shaped side walls and a plurality of flat side walls; wherein the plurality of arc-shaped side walls and the plurality of flat side walls are alternately arranged and sequentially connected; and each of the plu-rality of arc-shaped side walls protrudes towards a direction of the gate electrode; the epitaxial layers, disposed in the ohmic contact recesses respectively, wherein an upper end of each of the epitaxial layers is located above the cap layer; and the passivation layer, covered on the cap layer and the epitaxial layers, wherein the source electrode and the B₁ drain electrode penetrate through the passivation layer and are disposed on the epitaxial layers respec-tively; and the gate electrode penetrates through the passivation layer and extends onto the cap layer; and wherein the epitaxial layers are made from the n+-GaN material or the n+-InGaN material.
The manufacturing method of the GaN-based device based on patterned ohmic contact as claimed in claim 1, wherein the step 3 comprises: coating the photoresist on the SiO₂ mask layer, exposing the ohmic contact region patterns on the two sides of the photoresist through a mask using a photolithogra-phy machine to obtain exposed ohmic contact region patterns, and developing the exposed ohmic contact region patterns to remove the photoresist on the ohmic contact region patterns.
The manufacturing method of the GaN-based device based on patterned ohmic contact as claimed in claim 1, wherein the step 7 comprises: step 71, photolithographing a source electrode pattern and a drain electrode pattern on the epitaxial layers respec-tively; step 72, evaporating titanium/gold (Ti/Au) metal elec-trodes through an electron beam evaporation device; and step 73, stripping metals in unexposed regions to form the source electrode and the drain electrode. ∗ ∗ ∗ ∗ ∗
Embodiments described in the patent, grouped by the materials and process steps they use.
8 materials1 process step
A GaN-based device based on patterned ohmic contact including a substrate layer, nucleation layer, buffer layer, channel layer, insertion layer, barrier layer and cap layer sequentially from bottom to top. Ohmic contact recesses are defined in two ends of the cap layer extending into the channel layer. Arc-shaped and flat side walls are alternately arranged on the recess walls close to the gate electrode. Epitaxial layers of n+-GaN or n+-InGaN are disposed in the recesses with their upper ends above the cap layer. A T-type gate electrode, passivation layer, source and drain electrodes complete the structure.
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based HEMT with patterned ohmic contact
Materials described outside the worked examples.
titanium/gold
Ti/Au
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Duration | ≥ 3 hours | — |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 3
Cited non-patent literature · 1
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 12,457,782 B1Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 illustrates a schematic sectional structural diagram of a GaN-based device based on patterned ohmic contact according to an embodiment of the disclosure.
FIG. 2 illustrates a schematic diagram from a perspective of a top view of a device after manufacturing a source 65 electrode and a drain electrode according …
FIGS. 3A-3L illustrate a schematic diagram of a manu- facturing process of the GaN-based device based on pat- terned ohmic contact according to an embodiment …
FIG. 4 illustrates a schematic diagram from a perspective of a top view of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A manufacturing method of a gallium nitride (GaN)- based device based on patterned ohmic contact, comprising: step 1, growing a nucleation layer, a buffer layer, a channel layer, an insertion layer, a barrier layer and a cap layer on a substrate layer sequentially in that order; step 2, growing a silicon oxide (SiO₂) mask layer on the cap layer; step 3, coating photoresist on the SiO₂ mask layer, and photolithographing ohmic contact region patterns on two sides of the photoresist; wherein an axis of each of the ohmic contact region patterns extends along a gate width direction, and opposite edges of the ohmic contact region patterns each comprise a plurality of arc-shaped edges and a plurality of flat edges; and wherein the plurality of arc-shaped edges and the plurality of flat edges are alternately arranged and sequentially connected; and each of the plurality of arc-shaped edges protrudes towards outward; step 4, etching the SiO₂ mask layer, the cap layer, the barrier layer, the insertion layer and a part of the channel layer corresponding to the ohmic contact region patterns to form ohmic contact recesses, and removing the photoresist; step 5, epitaxially growing a n-type doped gallium nitride (n+-GaN) material or the n+ a n-type doped indium gallium nitride (n+-InGaN) material on a surface of a product prepared in the step 4; step 6, removing the SiO₂ mask layer to form epitaxial layers; step 7, preparing a source electrode and a drain electrode on the epitaxial layers; step 8, preparing a mesa isolation; step 9, depositing a passivation layer on surfaces of the epitaxial layers and the cap layer, removing the passi-vation layer deposited on the source electrode and the drain electrode, and preparing a gate groove; step 10, preparing a gate electrode; and step 11, performing metal interconnect to obtain the GaN-based device based on patterned ohmic contact; wherein the GaN-based device based on patterned ohmic contact comprises: the substrate layer, the nucleation layer, the buffer layer, the channel layer, the insertion layer, the barrier layer and the cap layer sequentially arranged in that order from bottom to top; the ohmic contact recesses, defined on two ends of the cap layer respectively and extending into the channel layer; wherein an axis of each of the ohmic contact recesses extends along the gate width direction; the gate electrode, located between the ohmic contact recesses; wherein a side wall of each of the ohmic contact recesses close to the gate electrode comprises a plurality of arc-shaped side walls and a plurality of flat side walls; wherein the plurality of arc-shaped side walls and the plurality of flat side walls are alternately arranged and sequentially connected; and each of the plu-rality of arc-shaped side walls protrudes towards a direction of the gate electrode; the epitaxial layers, disposed in the ohmic contact recesses respectively, wherein an upper end of each of the epitaxial layers is located above the cap layer; and the passivation layer, covered on the cap layer and the epitaxial layers, wherein the source electrode and the B₁ drain electrode penetrate through the passivation layer and are disposed on the epitaxial layers respec-tively; and the gate electrode penetrates through the passivation layer and extends onto the cap layer; and wherein the epitaxial layers are made from the n+-GaN material or the n+-InGaN material.
The manufacturing method of the GaN-based device based on patterned ohmic contact as claimed in claim 1, wherein the step 3 comprises: coating the photoresist on the SiO₂ mask layer, exposing the ohmic contact region patterns on the two sides of the photoresist through a mask using a photolithogra-phy machine to obtain exposed ohmic contact region patterns, and developing the exposed ohmic contact region patterns to remove the photoresist on the ohmic contact region patterns.
The manufacturing method of the GaN-based device based on patterned ohmic contact as claimed in claim 1, wherein the step 7 comprises: step 71, photolithographing a source electrode pattern and a drain electrode pattern on the epitaxial layers respec-tively; step 72, evaporating titanium/gold (Ti/Au) metal elec-trodes through an electron beam evaporation device; and step 73, stripping metals in unexposed regions to form the source electrode and the drain electrode. ∗ ∗ ∗ ∗ ∗
Embodiments described in the patent, grouped by the materials and process steps they use.
8 materials1 process step
A GaN-based device based on patterned ohmic contact including a substrate layer, nucleation layer, buffer layer, channel layer, insertion layer, barrier layer and cap layer sequentially from bottom to top. Ohmic contact recesses are defined in two ends of the cap layer extending into the channel layer. Arc-shaped and flat side walls are alternately arranged on the recess walls close to the gate electrode. Epitaxial layers of n+-GaN or n+-InGaN are disposed in the recesses with their upper ends above the cap layer. A T-type gate electrode, passivation layer, source and drain electrodes complete the structure.
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based HEMT with patterned ohmic contact
Materials described outside the worked examples.
titanium/gold
Ti/Au
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Duration | ≥ 3 hours | — |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 3
Cited non-patent literature · 1
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 12,457,782 B1Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 illustrates a schematic sectional structural diagram of a GaN-based device based on patterned ohmic contact according to an embodiment of the disclosure.
FIG. 2 illustrates a schematic diagram from a perspective of a top view of a device after manufacturing a source 65 electrode and a drain electrode according …
FIGS. 3A-3L illustrate a schematic diagram of a manu- facturing process of the GaN-based device based on pat- terned ohmic contact according to an embodiment …
FIG. 4 illustrates a schematic diagram from a perspective of a top view of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A manufacturing method of a gallium nitride (GaN)- based device based on patterned ohmic contact, comprising: step 1, growing a nucleation layer, a buffer layer, a channel layer, an insertion layer, a barrier layer and a cap layer on a substrate layer sequentially in that order; step 2, growing a silicon oxide (SiO₂) mask layer on the cap layer; step 3, coating photoresist on the SiO₂ mask layer, and photolithographing ohmic contact region patterns on two sides of the photoresist; wherein an axis of each of the ohmic contact region patterns extends along a gate width direction, and opposite edges of the ohmic contact region patterns each comprise a plurality of arc-shaped edges and a plurality of flat edges; and wherein the plurality of arc-shaped edges and the plurality of flat edges are alternately arranged and sequentially connected; and each of the plurality of arc-shaped edges protrudes towards outward; step 4, etching the SiO₂ mask layer, the cap layer, the barrier layer, the insertion layer and a part of the channel layer corresponding to the ohmic contact region patterns to form ohmic contact recesses, and removing the photoresist; step 5, epitaxially growing a n-type doped gallium nitride (n+-GaN) material or the n+ a n-type doped indium gallium nitride (n+-InGaN) material on a surface of a product prepared in the step 4; step 6, removing the SiO₂ mask layer to form epitaxial layers; step 7, preparing a source electrode and a drain electrode on the epitaxial layers; step 8, preparing a mesa isolation; step 9, depositing a passivation layer on surfaces of the epitaxial layers and the cap layer, removing the passi-vation layer deposited on the source electrode and the drain electrode, and preparing a gate groove; step 10, preparing a gate electrode; and step 11, performing metal interconnect to obtain the GaN-based device based on patterned ohmic contact; wherein the GaN-based device based on patterned ohmic contact comprises: the substrate layer, the nucleation layer, the buffer layer, the channel layer, the insertion layer, the barrier layer and the cap layer sequentially arranged in that order from bottom to top; the ohmic contact recesses, defined on two ends of the cap layer respectively and extending into the channel layer; wherein an axis of each of the ohmic contact recesses extends along the gate width direction; the gate electrode, located between the ohmic contact recesses; wherein a side wall of each of the ohmic contact recesses close to the gate electrode comprises a plurality of arc-shaped side walls and a plurality of flat side walls; wherein the plurality of arc-shaped side walls and the plurality of flat side walls are alternately arranged and sequentially connected; and each of the plu-rality of arc-shaped side walls protrudes towards a direction of the gate electrode; the epitaxial layers, disposed in the ohmic contact recesses respectively, wherein an upper end of each of the epitaxial layers is located above the cap layer; and the passivation layer, covered on the cap layer and the epitaxial layers, wherein the source electrode and the B₁ drain electrode penetrate through the passivation layer and are disposed on the epitaxial layers respec-tively; and the gate electrode penetrates through the passivation layer and extends onto the cap layer; and wherein the epitaxial layers are made from the n+-GaN material or the n+-InGaN material.
The manufacturing method of the GaN-based device based on patterned ohmic contact as claimed in claim 1, wherein the step 3 comprises: coating the photoresist on the SiO₂ mask layer, exposing the ohmic contact region patterns on the two sides of the photoresist through a mask using a photolithogra-phy machine to obtain exposed ohmic contact region patterns, and developing the exposed ohmic contact region patterns to remove the photoresist on the ohmic contact region patterns.
The manufacturing method of the GaN-based device based on patterned ohmic contact as claimed in claim 1, wherein the step 7 comprises: step 71, photolithographing a source electrode pattern and a drain electrode pattern on the epitaxial layers respec-tively; step 72, evaporating titanium/gold (Ti/Au) metal elec-trodes through an electron beam evaporation device; and step 73, stripping metals in unexposed regions to form the source electrode and the drain electrode. ∗ ∗ ∗ ∗ ∗
Embodiments described in the patent, grouped by the materials and process steps they use.
8 materials1 process step
A GaN-based device based on patterned ohmic contact including a substrate layer, nucleation layer, buffer layer, channel layer, insertion layer, barrier layer and cap layer sequentially from bottom to top. Ohmic contact recesses are defined in two ends of the cap layer extending into the channel layer. Arc-shaped and flat side walls are alternately arranged on the recess walls close to the gate electrode. Epitaxial layers of n+-GaN or n+-InGaN are disposed in the recesses with their upper ends above the cap layer. A T-type gate electrode, passivation layer, source and drain electrodes complete the structure.
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based HEMT with patterned ohmic contact
Materials described outside the worked examples.
titanium/gold
Ti/Au
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Duration | ≥ 3 hours | — |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 3
Cited non-patent literature · 1
Related documents with shared materials, methods, properties, or citations.