Patent
US 10,217,641GaN device formed on semiconductor substrate with recessed regions
William J. Gallagher
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 10,217,641Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: a substrate having a recessed region disposed in a surface thereof, the recessed region exposes a first vertical sidewall of the substrate, a second vertical sidewall of the substrate, and a horizontal surface of a semiconductor material of the substrate; a seed layer disposed within the recessed region and directly on the horizontal surface of the semiconductor material, wherein the seed layer extends continuously from the first vertical sidewall to the second vertical sidewall of the recess region; and a layered structure disposed on the seed layer, the layered structure comprising a buffer layer and a gallium nitride layer,. SVG 15001957.09-24-2018.JMGQBWVLRXEAPX4.CLM.1.svg 0.16 6.37 Black and white is present directly on a topmost surface of the seed layer and extends continuously from the first vertical sidewall to the second vertical sidewall, and wherein the seed layer and the layered structure have outermost sidewalls that are verticall y aligned to each other. Currently amended
The device of claim 1, wherein the layered structure has a length of 10 to 50 microns and a width of 10 to 50 microns. Original
The device of claim 1, wherein the layered structure has a thickness of at least 1 micron. Original
The device of claim 1, wherein the layered structure has a thickness of 0.5 to 2.5 microns. Original
The device of claim 1, wherein the buffer layer comprises AlGaN and the gallium nitride layer comprises carbon doped GaN. Original
The device of claim 1, wherein the buffer layer has a thickness of 0 to 1000 nm and the gallium nitride layer has a thickness of 500 to 1500 nm. Original
The device of claim 1, wherein the substrate has a diameter of at least 50 mm and a thickness of 725 to 775 microns. Original
The device of claim 1, wherein the substrate is a semiconductor-on- insulator substrate. Original
The device of claim 1, wherein the first and second vertical sidewalls include a portion of the semiconductor material. Currently amended
The device of claim 1, wherein the first and second vertical sidewalls include a dielectric material and a topmost semiconductor layer that are located above the semiconductor material of the substrate. Currently amended
The device of claim 1, wherein the device has a current collapse of less than 10%. Original
The device of claim 1, wherein the device is a gallium nitride high electron mobility transistor. Original
The device of claim 1, wherein the recessed region has a depth of 0.6 to 3.5 microns. Original
The device of claim 1, wherein the substrate has a bow of less than 500 microns. Original
The device of claim 1, wherein the layered structure has a thickness of at least 0.5 microns, a length of 1 to 200 microns, and a width of 1 to 200 microns, New
-20. Canceled
Canceled
A semiconductor device comprising: a substrate having a recessed region disposed in a surface thereof, the recessed region exposes a first vertical sidewall of the substrate, a second vertical sidewall of the substrate, and a horizontal surface of a semiconductor material of the substrate; a seed layer disposed within the recessed region and directly on the horizontal surface of the semiconductor material, wherein the seed layer extends continuously from the first vertical sidewall to the second vertical sidewall; and a structure comprising a gallium nitride layer located directly n a topmost surface of the seed layer, wherein gallium nitride layer extends continuously from, and is in direct contact with, the first vertical sidewall to the second vertical sidewall, and wherein the seed layer and the gallinum nitride layer have outermost sidewalls that are vertically aligned to each other. Currently amended
The device of claim 21, wherein the structure has a thickness of at least 0.5 microns, a length of 1 to 200 microns, and a width of 1 to 200 microns. New
Layer stacks claimed or described, ordered top of device to substrate.
semiconductor device with recessed GaN layered structure
gallium nitride high electron mobility transistor
Materials described outside the worked examples.
seed layer
AlN seed layer
AlN
buffer layer
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Current Collapse | ≤ 10 % | — |
Thickness | 10–50 µm |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,217,641Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: a substrate having a recessed region disposed in a surface thereof, the recessed region exposes a first vertical sidewall of the substrate, a second vertical sidewall of the substrate, and a horizontal surface of a semiconductor material of the substrate; a seed layer disposed within the recessed region and directly on the horizontal surface of the semiconductor material, wherein the seed layer extends continuously from the first vertical sidewall to the second vertical sidewall of the recess region; and a layered structure disposed on the seed layer, the layered structure comprising a buffer layer and a gallium nitride layer,. SVG 15001957.09-24-2018.JMGQBWVLRXEAPX4.CLM.1.svg 0.16 6.37 Black and white is present directly on a topmost surface of the seed layer and extends continuously from the first vertical sidewall to the second vertical sidewall, and wherein the seed layer and the layered structure have outermost sidewalls that are verticall y aligned to each other. Currently amended
The device of claim 1, wherein the layered structure has a length of 10 to 50 microns and a width of 10 to 50 microns. Original
The device of claim 1, wherein the layered structure has a thickness of at least 1 micron. Original
The device of claim 1, wherein the layered structure has a thickness of 0.5 to 2.5 microns. Original
The device of claim 1, wherein the buffer layer comprises AlGaN and the gallium nitride layer comprises carbon doped GaN. Original
The device of claim 1, wherein the buffer layer has a thickness of 0 to 1000 nm and the gallium nitride layer has a thickness of 500 to 1500 nm. Original
The device of claim 1, wherein the substrate has a diameter of at least 50 mm and a thickness of 725 to 775 microns. Original
The device of claim 1, wherein the substrate is a semiconductor-on- insulator substrate. Original
The device of claim 1, wherein the first and second vertical sidewalls include a portion of the semiconductor material. Currently amended
The device of claim 1, wherein the first and second vertical sidewalls include a dielectric material and a topmost semiconductor layer that are located above the semiconductor material of the substrate. Currently amended
The device of claim 1, wherein the device has a current collapse of less than 10%. Original
The device of claim 1, wherein the device is a gallium nitride high electron mobility transistor. Original
The device of claim 1, wherein the recessed region has a depth of 0.6 to 3.5 microns. Original
The device of claim 1, wherein the substrate has a bow of less than 500 microns. Original
The device of claim 1, wherein the layered structure has a thickness of at least 0.5 microns, a length of 1 to 200 microns, and a width of 1 to 200 microns, New
-20. Canceled
Canceled
A semiconductor device comprising: a substrate having a recessed region disposed in a surface thereof, the recessed region exposes a first vertical sidewall of the substrate, a second vertical sidewall of the substrate, and a horizontal surface of a semiconductor material of the substrate; a seed layer disposed within the recessed region and directly on the horizontal surface of the semiconductor material, wherein the seed layer extends continuously from the first vertical sidewall to the second vertical sidewall; and a structure comprising a gallium nitride layer located directly n a topmost surface of the seed layer, wherein gallium nitride layer extends continuously from, and is in direct contact with, the first vertical sidewall to the second vertical sidewall, and wherein the seed layer and the gallinum nitride layer have outermost sidewalls that are vertically aligned to each other. Currently amended
The device of claim 21, wherein the structure has a thickness of at least 0.5 microns, a length of 1 to 200 microns, and a width of 1 to 200 microns. New
Layer stacks claimed or described, ordered top of device to substrate.
semiconductor device with recessed GaN layered structure
gallium nitride high electron mobility transistor
Materials described outside the worked examples.
seed layer
AlN seed layer
AlN
buffer layer
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Current Collapse | ≤ 10 % | — |
Thickness | 10–50 µm |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,217,641Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: a substrate having a recessed region disposed in a surface thereof, the recessed region exposes a first vertical sidewall of the substrate, a second vertical sidewall of the substrate, and a horizontal surface of a semiconductor material of the substrate; a seed layer disposed within the recessed region and directly on the horizontal surface of the semiconductor material, wherein the seed layer extends continuously from the first vertical sidewall to the second vertical sidewall of the recess region; and a layered structure disposed on the seed layer, the layered structure comprising a buffer layer and a gallium nitride layer,. SVG 15001957.09-24-2018.JMGQBWVLRXEAPX4.CLM.1.svg 0.16 6.37 Black and white is present directly on a topmost surface of the seed layer and extends continuously from the first vertical sidewall to the second vertical sidewall, and wherein the seed layer and the layered structure have outermost sidewalls that are verticall y aligned to each other. Currently amended
The device of claim 1, wherein the layered structure has a length of 10 to 50 microns and a width of 10 to 50 microns. Original
The device of claim 1, wherein the layered structure has a thickness of at least 1 micron. Original
The device of claim 1, wherein the layered structure has a thickness of 0.5 to 2.5 microns. Original
The device of claim 1, wherein the buffer layer comprises AlGaN and the gallium nitride layer comprises carbon doped GaN. Original
The device of claim 1, wherein the buffer layer has a thickness of 0 to 1000 nm and the gallium nitride layer has a thickness of 500 to 1500 nm. Original
The device of claim 1, wherein the substrate has a diameter of at least 50 mm and a thickness of 725 to 775 microns. Original
The device of claim 1, wherein the substrate is a semiconductor-on- insulator substrate. Original
The device of claim 1, wherein the first and second vertical sidewalls include a portion of the semiconductor material. Currently amended
The device of claim 1, wherein the first and second vertical sidewalls include a dielectric material and a topmost semiconductor layer that are located above the semiconductor material of the substrate. Currently amended
The device of claim 1, wherein the device has a current collapse of less than 10%. Original
The device of claim 1, wherein the device is a gallium nitride high electron mobility transistor. Original
The device of claim 1, wherein the recessed region has a depth of 0.6 to 3.5 microns. Original
The device of claim 1, wherein the substrate has a bow of less than 500 microns. Original
The device of claim 1, wherein the layered structure has a thickness of at least 0.5 microns, a length of 1 to 200 microns, and a width of 1 to 200 microns, New
-20. Canceled
Canceled
A semiconductor device comprising: a substrate having a recessed region disposed in a surface thereof, the recessed region exposes a first vertical sidewall of the substrate, a second vertical sidewall of the substrate, and a horizontal surface of a semiconductor material of the substrate; a seed layer disposed within the recessed region and directly on the horizontal surface of the semiconductor material, wherein the seed layer extends continuously from the first vertical sidewall to the second vertical sidewall; and a structure comprising a gallium nitride layer located directly n a topmost surface of the seed layer, wherein gallium nitride layer extends continuously from, and is in direct contact with, the first vertical sidewall to the second vertical sidewall, and wherein the seed layer and the gallinum nitride layer have outermost sidewalls that are vertically aligned to each other. Currently amended
The device of claim 21, wherein the structure has a thickness of at least 0.5 microns, a length of 1 to 200 microns, and a width of 1 to 200 microns. New
Layer stacks claimed or described, ordered top of device to substrate.
semiconductor device with recessed GaN layered structure
gallium nitride high electron mobility transistor
Materials described outside the worked examples.
seed layer
AlN seed layer
AlN
buffer layer
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Current Collapse | ≤ 10 % | — |
Thickness | 10–50 µm |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,217,641Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: a substrate having a recessed region disposed in a surface thereof, the recessed region exposes a first vertical sidewall of the substrate, a second vertical sidewall of the substrate, and a horizontal surface of a semiconductor material of the substrate; a seed layer disposed within the recessed region and directly on the horizontal surface of the semiconductor material, wherein the seed layer extends continuously from the first vertical sidewall to the second vertical sidewall of the recess region; and a layered structure disposed on the seed layer, the layered structure comprising a buffer layer and a gallium nitride layer,. SVG 15001957.09-24-2018.JMGQBWVLRXEAPX4.CLM.1.svg 0.16 6.37 Black and white is present directly on a topmost surface of the seed layer and extends continuously from the first vertical sidewall to the second vertical sidewall, and wherein the seed layer and the layered structure have outermost sidewalls that are verticall y aligned to each other. Currently amended
The device of claim 1, wherein the layered structure has a length of 10 to 50 microns and a width of 10 to 50 microns. Original
The device of claim 1, wherein the layered structure has a thickness of at least 1 micron. Original
The device of claim 1, wherein the layered structure has a thickness of 0.5 to 2.5 microns. Original
The device of claim 1, wherein the buffer layer comprises AlGaN and the gallium nitride layer comprises carbon doped GaN. Original
The device of claim 1, wherein the buffer layer has a thickness of 0 to 1000 nm and the gallium nitride layer has a thickness of 500 to 1500 nm. Original
The device of claim 1, wherein the substrate has a diameter of at least 50 mm and a thickness of 725 to 775 microns. Original
The device of claim 1, wherein the substrate is a semiconductor-on- insulator substrate. Original
The device of claim 1, wherein the first and second vertical sidewalls include a portion of the semiconductor material. Currently amended
The device of claim 1, wherein the first and second vertical sidewalls include a dielectric material and a topmost semiconductor layer that are located above the semiconductor material of the substrate. Currently amended
The device of claim 1, wherein the device has a current collapse of less than 10%. Original
The device of claim 1, wherein the device is a gallium nitride high electron mobility transistor. Original
The device of claim 1, wherein the recessed region has a depth of 0.6 to 3.5 microns. Original
The device of claim 1, wherein the substrate has a bow of less than 500 microns. Original
The device of claim 1, wherein the layered structure has a thickness of at least 0.5 microns, a length of 1 to 200 microns, and a width of 1 to 200 microns, New
-20. Canceled
Canceled
A semiconductor device comprising: a substrate having a recessed region disposed in a surface thereof, the recessed region exposes a first vertical sidewall of the substrate, a second vertical sidewall of the substrate, and a horizontal surface of a semiconductor material of the substrate; a seed layer disposed within the recessed region and directly on the horizontal surface of the semiconductor material, wherein the seed layer extends continuously from the first vertical sidewall to the second vertical sidewall; and a structure comprising a gallium nitride layer located directly n a topmost surface of the seed layer, wherein gallium nitride layer extends continuously from, and is in direct contact with, the first vertical sidewall to the second vertical sidewall, and wherein the seed layer and the gallinum nitride layer have outermost sidewalls that are vertically aligned to each other. Currently amended
The device of claim 21, wherein the structure has a thickness of at least 0.5 microns, a length of 1 to 200 microns, and a width of 1 to 200 microns. New
Layer stacks claimed or described, ordered top of device to substrate.
semiconductor device with recessed GaN layered structure
gallium nitride high electron mobility transistor
Materials described outside the worked examples.
seed layer
AlN seed layer
AlN
buffer layer
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Current Collapse | ≤ 10 % | — |
Thickness | 10–50 µm |
Related documents with shared materials, methods, properties, or citations.
semiconductor device with recessed GaN structure (no explicit buffer)
GaN-HEMT stack in recessed region
gallium nitride layer
GaN
AlGaN buffer layer
AlGaN
carbon doped GaN
GaN:C
semiconductor-on-insulator substrate
dielectric material
silicon nitride
Si₃N₄
Thickness | 0.5–2.5 µm | — |
Thickness | 0–1000 nm | — |
Thickness | 500–1500 nm | — |
Thickness | 725–775 µm | — |
Thickness | 0.6–3.5 µm | — |
Thickness | 1–200 µm | — |
Thickness | ≤ 500 µm | — |
Thickness | ≥ 1 µm | — |
Thickness | ≥ 50 mm | — |
Thickness | ≥ 0.5 µm | — |
AlN BUFFER N-POLAR GaN HEMT PROFILE
semiconductor device with recessed GaN structure (no explicit buffer)
GaN-HEMT stack in recessed region
gallium nitride layer
GaN
AlGaN buffer layer
AlGaN
carbon doped GaN
GaN:C
semiconductor-on-insulator substrate
dielectric material
silicon nitride
Si₃N₄
Thickness | 0.5–2.5 µm | — |
Thickness | 0–1000 nm | — |
Thickness | 500–1500 nm | — |
Thickness | 725–775 µm | — |
Thickness | 0.6–3.5 µm | — |
Thickness | 1–200 µm | — |
Thickness | ≤ 500 µm | — |
Thickness | ≥ 1 µm | — |
Thickness | ≥ 50 mm | — |
Thickness | ≥ 0.5 µm | — |
AlN BUFFER N-POLAR GaN HEMT PROFILE
semiconductor device with recessed GaN structure (no explicit buffer)
GaN-HEMT stack in recessed region
gallium nitride layer
GaN
AlGaN buffer layer
AlGaN
carbon doped GaN
GaN:C
semiconductor-on-insulator substrate
dielectric material
silicon nitride
Si₃N₄
Thickness | 0.5–2.5 µm | — |
Thickness | 0–1000 nm | — |
Thickness | 500–1500 nm | — |
Thickness | 725–775 µm | — |
Thickness | 0.6–3.5 µm | — |
Thickness | 1–200 µm | — |
Thickness | ≤ 500 µm | — |
Thickness | ≥ 1 µm | — |
Thickness | ≥ 50 mm | — |
Thickness | ≥ 0.5 µm | — |
AlN BUFFER N-POLAR GaN HEMT PROFILE
semiconductor device with recessed GaN structure (no explicit buffer)
GaN-HEMT stack in recessed region
gallium nitride layer
GaN
AlGaN buffer layer
AlGaN
carbon doped GaN
GaN:C
semiconductor-on-insulator substrate
dielectric material
silicon nitride
Si₃N₄
Thickness | 0.5–2.5 µm | — |
Thickness | 0–1000 nm | — |
Thickness | 500–1500 nm | — |
Thickness | 725–775 µm | — |
Thickness | 0.6–3.5 µm | — |
Thickness | 1–200 µm | — |
Thickness | ≤ 500 µm | — |
Thickness | ≥ 1 µm | — |
Thickness | ≥ 50 mm | — |
Thickness | ≥ 0.5 µm | — |