Patent
US 8,685,802Graphene Formation on Dielectrics and Electronic Devices Formed Therefrom
Jeffry A. Kelber
US
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US 8,685,802Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 A is a block diagram of a method of directly forming graphene on a dielectric in accordance with an embodiment of the invention using free radical assisted chemical vapor 20 deposition (FRA-CVD). Figure lB is a block diagram of a method of directly forming graphene on a dielectric in …
Figure 2 shows a cross-sectional view of a structure formed in accordance with an embodiment of the invention. 25
Figure 3 shows a diagram illustrating the A 120 3(000 1) surface for explaining lattice m atching.
Figure 4 shows an X-ray photoelectron spe c troscopy (XPS) plot of a wafer fabricated in accordance with an embodiment of the invention after an ethylene dose at-600 K and after a sample holder change and anneal to 1000 K.
Figures 5A and 5 B show low energy electron diffraction (LEED) pattern images.
Figure 5 B shows a 6-spot image indicating graphene formation a fter performing an embodiment of the subject method.
Figure 6 shows a photoelectron spectroscopy (P E S) and k vector-resolved inverse 5 photoelectron spectroscopy (KRIPES) plot of a structure fabricated in accordance with an embodiment of the invention.
Figure 7 shows a progression of ordered graphene single and multilayers on MgO(111) at stages of an embodiment of the subject method.
Figures 8A-8F show C(1 s) XPS and LEED spectra for formation of an ordered carbon 10 monolayer on MgO(111) in accordance with an embodiment of the invention.
Figure 8B shows a XPS C(1 s) spectrum after annealing at 700 K in UHV in the presence of 02 (XPS- derived average carbon layer thickness is 1 monolayer);
Figure 8 C shows the corresponding 15 LEED pattern for the substrate after annealing at 700 K in UHV in the presence of 02, which exhibits C₃ v symmetry;
Figure 8D shows XPS after anneal of the film shown in
Figure 8 E shows the corresponding complex LE ED pattern for the substrate after the anneal; and
Figure 8 F shows a close- up of the pattern in
Figures 9A and 9B show C(1 s) XPS and corresponding LEED pattern for graphene formed by PVD on an ordered carbon monolayer in accordance with an embodiment of the invention.
Figure 10 shows a representational diagram of the oxide/interfacial layer/graphene structure.
Figure 11 shows and XPS plot of a wafer fabricated in accordance with an embodiment of the invention after performing annealing processes for adventitious carbon removal. DETAILED DISCLOSURE 5 Embodiments of the present invention provide methods of producing graphene directly on a dielectric layer …
Figure 1 B. Referring to
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of forming a graphene-based device, the method comprising: depositing carbon on a substrate having a dielectric formed thereon; and performing an annealing process with respect to the substrate having the carbon deposited thereon to form ordered graphene from the carbon on the dielectric.
The method according to Claim 1, wherein the depositing of the carbon on the substrate is performed at a temperature in a range of 300 K⁻⁷⁰⁰ K, and wherein the performing the annealing process is performed at a temperature of at least 1000 K.
The method according to Claim 1, wherein depositing carbon on the substrate having the dielectric formed thereon comprises: subjecting the substrate having the dielectric formed thereon to a chemical vapor deposition (C V D) process using a cracked hydrocarbon.
The method according to Claim 1, wherein depositing carbon on the substrate having the dielectric formed thereon comprises: performing physical vapor deposition using a graphite target or source to deposit the carbon.
The method according to Claim 1, wherein the dielectric comprises a high-k oxide.
The method according to Claim 1, wherein the dielectric is MgO.
The method according to Claim 1, wherein the substrate comprises silicon.
The method according to Claim 1, wherein the dielectric is Al.sub.20.sub.3.
The method according to Claim 1, wherein performing the annealing process with respect to the substrate having the carbon deposited thereon to form ordered graphene from the carbon on the dielectric comprises performing the annealing under UHV conditions.
The method according to Claim 1, wherein performing the annealing process with respect to the substrate having the carbon deposited thereon to form ordered graphene from the carbon on the dielectric comprises performing the annealing to a temperature of about 1000 K or higher.
15-20. canceled
canceled
canceled
canceled
canceled
canceled
Layer stacks claimed or described, ordered top of device to substrate.
graphene-based device
Materials described outside the worked examples.
carbon
C
dielectric
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
Figure 4 shows an X-ray photoelectron spe c troscopy (XPS) plot of a wafer fabricated in accordance with an embodiment of the invention after an ethylene dose at-600 K and after a sample holder change and anneal to 1000 K.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | ≥ 1 K | — |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,685,802Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 A is a block diagram of a method of directly forming graphene on a dielectric in accordance with an embodiment of the invention using free radical assisted chemical vapor 20 deposition (FRA-CVD). Figure lB is a block diagram of a method of directly forming graphene on a dielectric in …
Figure 2 shows a cross-sectional view of a structure formed in accordance with an embodiment of the invention. 25
Figure 3 shows a diagram illustrating the A 120 3(000 1) surface for explaining lattice m atching.
Figure 4 shows an X-ray photoelectron spe c troscopy (XPS) plot of a wafer fabricated in accordance with an embodiment of the invention after an ethylene dose at-600 K and after a sample holder change and anneal to 1000 K.
Figures 5A and 5 B show low energy electron diffraction (LEED) pattern images.
Figure 5 B shows a 6-spot image indicating graphene formation a fter performing an embodiment of the subject method.
Figure 6 shows a photoelectron spectroscopy (P E S) and k vector-resolved inverse 5 photoelectron spectroscopy (KRIPES) plot of a structure fabricated in accordance with an embodiment of the invention.
Figure 7 shows a progression of ordered graphene single and multilayers on MgO(111) at stages of an embodiment of the subject method.
Figures 8A-8F show C(1 s) XPS and LEED spectra for formation of an ordered carbon 10 monolayer on MgO(111) in accordance with an embodiment of the invention.
Figure 8B shows a XPS C(1 s) spectrum after annealing at 700 K in UHV in the presence of 02 (XPS- derived average carbon layer thickness is 1 monolayer);
Figure 8 C shows the corresponding 15 LEED pattern for the substrate after annealing at 700 K in UHV in the presence of 02, which exhibits C₃ v symmetry;
Figure 8D shows XPS after anneal of the film shown in
Figure 8 E shows the corresponding complex LE ED pattern for the substrate after the anneal; and
Figure 8 F shows a close- up of the pattern in
Figures 9A and 9B show C(1 s) XPS and corresponding LEED pattern for graphene formed by PVD on an ordered carbon monolayer in accordance with an embodiment of the invention.
Figure 10 shows a representational diagram of the oxide/interfacial layer/graphene structure.
Figure 11 shows and XPS plot of a wafer fabricated in accordance with an embodiment of the invention after performing annealing processes for adventitious carbon removal. DETAILED DISCLOSURE 5 Embodiments of the present invention provide methods of producing graphene directly on a dielectric layer …
Figure 1 B. Referring to
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of forming a graphene-based device, the method comprising: depositing carbon on a substrate having a dielectric formed thereon; and performing an annealing process with respect to the substrate having the carbon deposited thereon to form ordered graphene from the carbon on the dielectric.
The method according to Claim 1, wherein the depositing of the carbon on the substrate is performed at a temperature in a range of 300 K⁻⁷⁰⁰ K, and wherein the performing the annealing process is performed at a temperature of at least 1000 K.
The method according to Claim 1, wherein depositing carbon on the substrate having the dielectric formed thereon comprises: subjecting the substrate having the dielectric formed thereon to a chemical vapor deposition (C V D) process using a cracked hydrocarbon.
The method according to Claim 1, wherein depositing carbon on the substrate having the dielectric formed thereon comprises: performing physical vapor deposition using a graphite target or source to deposit the carbon.
The method according to Claim 1, wherein the dielectric comprises a high-k oxide.
The method according to Claim 1, wherein the dielectric is MgO.
The method according to Claim 1, wherein the substrate comprises silicon.
The method according to Claim 1, wherein the dielectric is Al.sub.20.sub.3.
The method according to Claim 1, wherein performing the annealing process with respect to the substrate having the carbon deposited thereon to form ordered graphene from the carbon on the dielectric comprises performing the annealing under UHV conditions.
The method according to Claim 1, wherein performing the annealing process with respect to the substrate having the carbon deposited thereon to form ordered graphene from the carbon on the dielectric comprises performing the annealing to a temperature of about 1000 K or higher.
15-20. canceled
canceled
canceled
canceled
canceled
canceled
Layer stacks claimed or described, ordered top of device to substrate.
graphene-based device
Materials described outside the worked examples.
carbon
C
dielectric
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
Figure 4 shows an X-ray photoelectron spe c troscopy (XPS) plot of a wafer fabricated in accordance with an embodiment of the invention after an ethylene dose at-600 K and after a sample holder change and anneal to 1000 K.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | ≥ 1 K | — |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,685,802Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 A is a block diagram of a method of directly forming graphene on a dielectric in accordance with an embodiment of the invention using free radical assisted chemical vapor 20 deposition (FRA-CVD). Figure lB is a block diagram of a method of directly forming graphene on a dielectric in …
Figure 2 shows a cross-sectional view of a structure formed in accordance with an embodiment of the invention. 25
Figure 3 shows a diagram illustrating the A 120 3(000 1) surface for explaining lattice m atching.
Figure 4 shows an X-ray photoelectron spe c troscopy (XPS) plot of a wafer fabricated in accordance with an embodiment of the invention after an ethylene dose at-600 K and after a sample holder change and anneal to 1000 K.
Figures 5A and 5 B show low energy electron diffraction (LEED) pattern images.
Figure 5 B shows a 6-spot image indicating graphene formation a fter performing an embodiment of the subject method.
Figure 6 shows a photoelectron spectroscopy (P E S) and k vector-resolved inverse 5 photoelectron spectroscopy (KRIPES) plot of a structure fabricated in accordance with an embodiment of the invention.
Figure 7 shows a progression of ordered graphene single and multilayers on MgO(111) at stages of an embodiment of the subject method.
Figures 8A-8F show C(1 s) XPS and LEED spectra for formation of an ordered carbon 10 monolayer on MgO(111) in accordance with an embodiment of the invention.
Figure 8B shows a XPS C(1 s) spectrum after annealing at 700 K in UHV in the presence of 02 (XPS- derived average carbon layer thickness is 1 monolayer);
Figure 8 C shows the corresponding 15 LEED pattern for the substrate after annealing at 700 K in UHV in the presence of 02, which exhibits C₃ v symmetry;
Figure 8D shows XPS after anneal of the film shown in
Figure 8 E shows the corresponding complex LE ED pattern for the substrate after the anneal; and
Figure 8 F shows a close- up of the pattern in
Figures 9A and 9B show C(1 s) XPS and corresponding LEED pattern for graphene formed by PVD on an ordered carbon monolayer in accordance with an embodiment of the invention.
Figure 10 shows a representational diagram of the oxide/interfacial layer/graphene structure.
Figure 11 shows and XPS plot of a wafer fabricated in accordance with an embodiment of the invention after performing annealing processes for adventitious carbon removal. DETAILED DISCLOSURE 5 Embodiments of the present invention provide methods of producing graphene directly on a dielectric layer …
Figure 1 B. Referring to
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of forming a graphene-based device, the method comprising: depositing carbon on a substrate having a dielectric formed thereon; and performing an annealing process with respect to the substrate having the carbon deposited thereon to form ordered graphene from the carbon on the dielectric.
The method according to Claim 1, wherein the depositing of the carbon on the substrate is performed at a temperature in a range of 300 K⁻⁷⁰⁰ K, and wherein the performing the annealing process is performed at a temperature of at least 1000 K.
The method according to Claim 1, wherein depositing carbon on the substrate having the dielectric formed thereon comprises: subjecting the substrate having the dielectric formed thereon to a chemical vapor deposition (C V D) process using a cracked hydrocarbon.
The method according to Claim 1, wherein depositing carbon on the substrate having the dielectric formed thereon comprises: performing physical vapor deposition using a graphite target or source to deposit the carbon.
The method according to Claim 1, wherein the dielectric comprises a high-k oxide.
The method according to Claim 1, wherein the dielectric is MgO.
The method according to Claim 1, wherein the substrate comprises silicon.
The method according to Claim 1, wherein the dielectric is Al.sub.20.sub.3.
The method according to Claim 1, wherein performing the annealing process with respect to the substrate having the carbon deposited thereon to form ordered graphene from the carbon on the dielectric comprises performing the annealing under UHV conditions.
The method according to Claim 1, wherein performing the annealing process with respect to the substrate having the carbon deposited thereon to form ordered graphene from the carbon on the dielectric comprises performing the annealing to a temperature of about 1000 K or higher.
15-20. canceled
canceled
canceled
canceled
canceled
canceled
Layer stacks claimed or described, ordered top of device to substrate.
graphene-based device
Materials described outside the worked examples.
carbon
C
dielectric
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
Figure 4 shows an X-ray photoelectron spe c troscopy (XPS) plot of a wafer fabricated in accordance with an embodiment of the invention after an ethylene dose at-600 K and after a sample holder change and anneal to 1000 K.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | ≥ 1 K | — |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,685,802Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 A is a block diagram of a method of directly forming graphene on a dielectric in accordance with an embodiment of the invention using free radical assisted chemical vapor 20 deposition (FRA-CVD). Figure lB is a block diagram of a method of directly forming graphene on a dielectric in …
Figure 2 shows a cross-sectional view of a structure formed in accordance with an embodiment of the invention. 25
Figure 3 shows a diagram illustrating the A 120 3(000 1) surface for explaining lattice m atching.
Figure 4 shows an X-ray photoelectron spe c troscopy (XPS) plot of a wafer fabricated in accordance with an embodiment of the invention after an ethylene dose at-600 K and after a sample holder change and anneal to 1000 K.
Figures 5A and 5 B show low energy electron diffraction (LEED) pattern images.
Figure 5 B shows a 6-spot image indicating graphene formation a fter performing an embodiment of the subject method.
Figure 6 shows a photoelectron spectroscopy (P E S) and k vector-resolved inverse 5 photoelectron spectroscopy (KRIPES) plot of a structure fabricated in accordance with an embodiment of the invention.
Figure 7 shows a progression of ordered graphene single and multilayers on MgO(111) at stages of an embodiment of the subject method.
Figures 8A-8F show C(1 s) XPS and LEED spectra for formation of an ordered carbon 10 monolayer on MgO(111) in accordance with an embodiment of the invention.
Figure 8B shows a XPS C(1 s) spectrum after annealing at 700 K in UHV in the presence of 02 (XPS- derived average carbon layer thickness is 1 monolayer);
Figure 8 C shows the corresponding 15 LEED pattern for the substrate after annealing at 700 K in UHV in the presence of 02, which exhibits C₃ v symmetry;
Figure 8D shows XPS after anneal of the film shown in
Figure 8 E shows the corresponding complex LE ED pattern for the substrate after the anneal; and
Figure 8 F shows a close- up of the pattern in
Figures 9A and 9B show C(1 s) XPS and corresponding LEED pattern for graphene formed by PVD on an ordered carbon monolayer in accordance with an embodiment of the invention.
Figure 10 shows a representational diagram of the oxide/interfacial layer/graphene structure.
Figure 11 shows and XPS plot of a wafer fabricated in accordance with an embodiment of the invention after performing annealing processes for adventitious carbon removal. DETAILED DISCLOSURE 5 Embodiments of the present invention provide methods of producing graphene directly on a dielectric layer …
Figure 1 B. Referring to
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of forming a graphene-based device, the method comprising: depositing carbon on a substrate having a dielectric formed thereon; and performing an annealing process with respect to the substrate having the carbon deposited thereon to form ordered graphene from the carbon on the dielectric.
The method according to Claim 1, wherein the depositing of the carbon on the substrate is performed at a temperature in a range of 300 K⁻⁷⁰⁰ K, and wherein the performing the annealing process is performed at a temperature of at least 1000 K.
The method according to Claim 1, wherein depositing carbon on the substrate having the dielectric formed thereon comprises: subjecting the substrate having the dielectric formed thereon to a chemical vapor deposition (C V D) process using a cracked hydrocarbon.
The method according to Claim 1, wherein depositing carbon on the substrate having the dielectric formed thereon comprises: performing physical vapor deposition using a graphite target or source to deposit the carbon.
The method according to Claim 1, wherein the dielectric comprises a high-k oxide.
The method according to Claim 1, wherein the dielectric is MgO.
The method according to Claim 1, wherein the substrate comprises silicon.
The method according to Claim 1, wherein the dielectric is Al.sub.20.sub.3.
The method according to Claim 1, wherein performing the annealing process with respect to the substrate having the carbon deposited thereon to form ordered graphene from the carbon on the dielectric comprises performing the annealing under UHV conditions.
The method according to Claim 1, wherein performing the annealing process with respect to the substrate having the carbon deposited thereon to form ordered graphene from the carbon on the dielectric comprises performing the annealing to a temperature of about 1000 K or higher.
15-20. canceled
canceled
canceled
canceled
canceled
canceled
Layer stacks claimed or described, ordered top of device to substrate.
graphene-based device
Materials described outside the worked examples.
carbon
C
dielectric
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
Figure 4 shows an X-ray photoelectron spe c troscopy (XPS) plot of a wafer fabricated in accordance with an embodiment of the invention after an ethylene dose at-600 K and after a sample holder change and anneal to 1000 K.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Temperature | ≥ 1 K | — |
Related documents with shared materials, methods, properties, or citations.
ordered graphene
cracked hydrocarbon
ethylene
C₂H₄
high-k oxide
MgO
silicon
Si
Al₂O₃
oxidized carbon-containing interfacial layer
Figures 8A-8F show C(1 s) XPS and LEED spectra for formation of an ordered carbon 10 monolayer on MgO(111) in accordance with an embodiment of the invention.
Figure 8B shows a XPS C(1 s) spectrum after annealing at 700 K in UHV in the presence of 02 (XPS- derived average carbon layer thickness is 1 monolayer);
Figure 8B shows a XPS C(1 s) spectrum after annealing at 700 K in UHV in the presence of 02 (XPS- derived average carbon layer thickness is 1 monolayer);
Figure 8D shows XPS after anneal of the film shown in
Figures 9A and 9B show C(1 s) XPS and corresponding LEED pattern for graphene formed by PVD on an ordered carbon monolayer in accordance with an embodiment of the invention.
Figure 11 shows and XPS plot of a wafer fabricated in accordance with an embodiment of the invention after performing annealing processes for adventitious carbon removal. DETAILED DISCLOSURE 5 Embodiments of the present invention provide methods of producing graphene directly on a dielectric layer …
ordered graphene
cracked hydrocarbon
ethylene
C₂H₄
high-k oxide
MgO
silicon
Si
Al₂O₃
oxidized carbon-containing interfacial layer
Figures 8A-8F show C(1 s) XPS and LEED spectra for formation of an ordered carbon 10 monolayer on MgO(111) in accordance with an embodiment of the invention.
Figure 8B shows a XPS C(1 s) spectrum after annealing at 700 K in UHV in the presence of 02 (XPS- derived average carbon layer thickness is 1 monolayer);
Figure 8B shows a XPS C(1 s) spectrum after annealing at 700 K in UHV in the presence of 02 (XPS- derived average carbon layer thickness is 1 monolayer);
Figure 8D shows XPS after anneal of the film shown in
Figures 9A and 9B show C(1 s) XPS and corresponding LEED pattern for graphene formed by PVD on an ordered carbon monolayer in accordance with an embodiment of the invention.
Figure 11 shows and XPS plot of a wafer fabricated in accordance with an embodiment of the invention after performing annealing processes for adventitious carbon removal. DETAILED DISCLOSURE 5 Embodiments of the present invention provide methods of producing graphene directly on a dielectric layer …
ordered graphene
cracked hydrocarbon
ethylene
C₂H₄
high-k oxide
MgO
silicon
Si
Al₂O₃
oxidized carbon-containing interfacial layer
Figures 8A-8F show C(1 s) XPS and LEED spectra for formation of an ordered carbon 10 monolayer on MgO(111) in accordance with an embodiment of the invention.
Figure 8B shows a XPS C(1 s) spectrum after annealing at 700 K in UHV in the presence of 02 (XPS- derived average carbon layer thickness is 1 monolayer);
Figure 8B shows a XPS C(1 s) spectrum after annealing at 700 K in UHV in the presence of 02 (XPS- derived average carbon layer thickness is 1 monolayer);
Figure 8D shows XPS after anneal of the film shown in
Figures 9A and 9B show C(1 s) XPS and corresponding LEED pattern for graphene formed by PVD on an ordered carbon monolayer in accordance with an embodiment of the invention.
Figure 11 shows and XPS plot of a wafer fabricated in accordance with an embodiment of the invention after performing annealing processes for adventitious carbon removal. DETAILED DISCLOSURE 5 Embodiments of the present invention provide methods of producing graphene directly on a dielectric layer …
ordered graphene
cracked hydrocarbon
ethylene
C₂H₄
high-k oxide
MgO
silicon
Si
Al₂O₃
oxidized carbon-containing interfacial layer
Figures 8A-8F show C(1 s) XPS and LEED spectra for formation of an ordered carbon 10 monolayer on MgO(111) in accordance with an embodiment of the invention.
Figure 8B shows a XPS C(1 s) spectrum after annealing at 700 K in UHV in the presence of 02 (XPS- derived average carbon layer thickness is 1 monolayer);
Figure 8B shows a XPS C(1 s) spectrum after annealing at 700 K in UHV in the presence of 02 (XPS- derived average carbon layer thickness is 1 monolayer);
Figure 8D shows XPS after anneal of the film shown in
Figures 9A and 9B show C(1 s) XPS and corresponding LEED pattern for graphene formed by PVD on an ordered carbon monolayer in accordance with an embodiment of the invention.
Figure 11 shows and XPS plot of a wafer fabricated in accordance with an embodiment of the invention after performing annealing processes for adventitious carbon removal. DETAILED DISCLOSURE 5 Embodiments of the present invention provide methods of producing graphene directly on a dielectric layer …