A method for fabricating a graphene transistor device comprising: removing at least one portion of a graphene channel on a substrate to form at least one anchor site within the graphene channel, wherein said at least one anchor site is formed of at least one exposed portion of the substrate; depositing a resist to pattern a gate structure area over a -the graphene channel on a -the substrate; depositing gate dielectric material and gate electrode material over the graphene channel, including said at least one anchor site, and the resist, wherei at least one anchor site formed of at lifting-off the resist and the electrode and dielectric materials that are disposed above the resist to form a gate structure including a gate electrode and a gate dielectric spacer and to expose port ions of the graphene channel that are adjacent to the gate s tructure; and forming source and drain electrodes over the exposed portions of the graphene channel.

A method for fabricating a graphene transistor device comprising: removing at least one portion of a graphene channel on a substrate to form at least one an chor site wV' ith in the graphe ne c hannel, w herein said at leas t o ne anchor si te is forme d of a t lea st one exposed portion of the substrate; depositing a resist to pattern a gate structure area over a-thegraphene channel on the a substrate; depositing gate dielectric material and gate electrode material over the graphene channe l, including said at least one anchor site, and the resist, wherei at least one anchor te forme of at -3- Serial No. 13/468,092 Art Unit: 2892 least one exposed prtion of the substrate is within the graphene channel; lifting-off the resist and the electrode and dielectric materials that are disposed above the resist to form a gate structure including a gate electrode and a gate dielectric spacer and to expose portions of the graphene channel that are adjacent to the gate structure; and forming source and drain electrodes over the exposed portions of the graphene channel such that an interface between at least one of the source and drain electrodes and the graphene channel maintains a consistent degree of contact t h roughout the interface.

A method for fabricating a graphene transistor device comprising: depositing a resist to pattern a gate structure area over a graphene channel on a substrate; dep ositin g a seed la y er, for a gate dielectric material, over the graphene c hannel; depositing t he gate dielectric material and gate electrode material on top of the seed la yer and over the graphene channel and the resist, wherein at least one anchor site formed of at least one exposed portion of the substrate is within the graphene channel; 11liftig-off theG resist andU theG eGlectrod and dielctri materials th1at are disposed abv e theG resist to form a gate structure including a gate electrode and a gate dielectric spacer and to expose portions of the graphene channel that are adjacent to the gate structure; and forming source and drain electrodes over the exposed portions of the graphene channel such that an interface between at least one of the source and drain electrodes and the graphene channel maintains a consistent degree of electrical conductivity between the graphene channel -5- Serial No. 13/468,092 Art Unit: 2892 and the at least one of the source and drain electrodes throughout the interface.

A method for fabricating a graphene transistor device comprising: removing at least one portion of a graphene channel on a substrate to form at least one anchor site within the graphene channel, wherein said at least one anchor site is formed of at least one exposed portion of the substrate; depositing a resist to pattern a gate structure area over a -the graphene channel on a -the substrate; depositing gate dielectric material and gate electrode material over the graphene channel, including said at least one anchor site, and the resist, wherei at least one anchor site formed of at lifting-off the resist and the electrode and dielectric materials that are disposed above the resist to form a gate structure including a gate electrode and a gate dielectric spacer and to expose port ions of the graphene channel that are adjacent to the gate s tructure; and forming source and drain electrodes over the exposed portions of the graphene channel.

A method for fabricating a graphene transistor device comprising: removing at least one portion of a graphene channel on a substrate to form at least one an chor site wV' ith in the graphe ne c hannel, w herein said at leas t o ne anchor si te is forme d of a t lea st one exposed portion of the substrate; depositing a resist to pattern a gate structure area over a-thegraphene channel on the a substrate; depositing gate dielectric material and gate electrode material over the graphene channe l, including said at least one anchor site, and the resist, wherei at least one anchor te forme of at -3- Serial No. 13/468,092 Art Unit: 2892 least one exposed prtion of the substrate is within the graphene channel; lifting-off the resist and the electrode and dielectric materials that are disposed above the resist to form a gate structure including a gate electrode and a gate dielectric spacer and to expose portions of the graphene channel that are adjacent to the gate structure; and forming source and drain electrodes over the exposed portions of the graphene channel such that an interface between at least one of the source and drain electrodes and the graphene channel maintains a consistent degree of contact t h roughout the interface.

A method for fabricating a graphene transistor device comprising: depositing a resist to pattern a gate structure area over a graphene channel on a substrate; dep ositin g a seed la y er, for a gate dielectric material, over the graphene c hannel; depositing t he gate dielectric material and gate electrode material on top of the seed la yer and over the graphene channel and the resist, wherein at least one anchor site formed of at least one exposed portion of the substrate is within the graphene channel; 11liftig-off theG resist andU theG eGlectrod and dielctri materials th1at are disposed abv e theG resist to form a gate structure including a gate electrode and a gate dielectric spacer and to expose portions of the graphene channel that are adjacent to the gate structure; and forming source and drain electrodes over the exposed portions of the graphene channel such that an interface between at least one of the source and drain electrodes and the graphene channel maintains a consistent degree of electrical conductivity between the graphene channel -5- Serial No. 13/468,092 Art Unit: 2892 and the at least one of the source and drain electrodes throughout the interface.

A method for fabricating a graphene transistor device comprising: removing at least one portion of a graphene channel on a substrate to form at least one anchor site within the graphene channel, wherein said at least one anchor site is formed of at least one exposed portion of the substrate; depositing a resist to pattern a gate structure area over a -the graphene channel on a -the substrate; depositing gate dielectric material and gate electrode material over the graphene channel, including said at least one anchor site, and the resist, wherei at least one anchor site formed of at lifting-off the resist and the electrode and dielectric materials that are disposed above the resist to form a gate structure including a gate electrode and a gate dielectric spacer and to expose port ions of the graphene channel that are adjacent to the gate s tructure; and forming source and drain electrodes over the exposed portions of the graphene channel.

A method for fabricating a graphene transistor device comprising: removing at least one portion of a graphene channel on a substrate to form at least one an chor site wV' ith in the graphe ne c hannel, w herein said at leas t o ne anchor si te is forme d of a t lea st one exposed portion of the substrate; depositing a resist to pattern a gate structure area over a-thegraphene channel on the a substrate; depositing gate dielectric material and gate electrode material over the graphene channe l, including said at least one anchor site, and the resist, wherei at least one anchor te forme of at -3- Serial No. 13/468,092 Art Unit: 2892 least one exposed prtion of the substrate is within the graphene channel; lifting-off the resist and the electrode and dielectric materials that are disposed above the resist to form a gate structure including a gate electrode and a gate dielectric spacer and to expose portions of the graphene channel that are adjacent to the gate structure; and forming source and drain electrodes over the exposed portions of the graphene channel such that an interface between at least one of the source and drain electrodes and the graphene channel maintains a consistent degree of contact t h roughout the interface.

A method for fabricating a graphene transistor device comprising: depositing a resist to pattern a gate structure area over a graphene channel on a substrate; dep ositin g a seed la y er, for a gate dielectric material, over the graphene c hannel; depositing t he gate dielectric material and gate electrode material on top of the seed la yer and over the graphene channel and the resist, wherein at least one anchor site formed of at least one exposed portion of the substrate is within the graphene channel; 11liftig-off theG resist andU theG eGlectrod and dielctri materials th1at are disposed abv e theG resist to form a gate structure including a gate electrode and a gate dielectric spacer and to expose portions of the graphene channel that are adjacent to the gate structure; and forming source and drain electrodes over the exposed portions of the graphene channel such that an interface between at least one of the source and drain electrodes and the graphene channel maintains a consistent degree of electrical conductivity between the graphene channel -5- Serial No. 13/468,092 Art Unit: 2892 and the at least one of the source and drain electrodes throughout the interface.

A method for fabricating a graphene transistor device comprising: removing at least one portion of a graphene channel on a substrate to form at least one anchor site within the graphene channel, wherein said at least one anchor site is formed of at least one exposed portion of the substrate; depositing a resist to pattern a gate structure area over a -the graphene channel on a -the substrate; depositing gate dielectric material and gate electrode material over the graphene channel, including said at least one anchor site, and the resist, wherei at least one anchor site formed of at lifting-off the resist and the electrode and dielectric materials that are disposed above the resist to form a gate structure including a gate electrode and a gate dielectric spacer and to expose port ions of the graphene channel that are adjacent to the gate s tructure; and forming source and drain electrodes over the exposed portions of the graphene channel.

A method for fabricating a graphene transistor device comprising: removing at least one portion of a graphene channel on a substrate to form at least one an chor site wV' ith in the graphe ne c hannel, w herein said at leas t o ne anchor si te is forme d of a t lea st one exposed portion of the substrate; depositing a resist to pattern a gate structure area over a-thegraphene channel on the a substrate; depositing gate dielectric material and gate electrode material over the graphene channe l, including said at least one anchor site, and the resist, wherei at least one anchor te forme of at -3- Serial No. 13/468,092 Art Unit: 2892 least one exposed prtion of the substrate is within the graphene channel; lifting-off the resist and the electrode and dielectric materials that are disposed above the resist to form a gate structure including a gate electrode and a gate dielectric spacer and to expose portions of the graphene channel that are adjacent to the gate structure; and forming source and drain electrodes over the exposed portions of the graphene channel such that an interface between at least one of the source and drain electrodes and the graphene channel maintains a consistent degree of contact t h roughout the interface.

A method for fabricating a graphene transistor device comprising: depositing a resist to pattern a gate structure area over a graphene channel on a substrate; dep ositin g a seed la y er, for a gate dielectric material, over the graphene c hannel; depositing t he gate dielectric material and gate electrode material on top of the seed la yer and over the graphene channel and the resist, wherein at least one anchor site formed of at least one exposed portion of the substrate is within the graphene channel; 11liftig-off theG resist andU theG eGlectrod and dielctri materials th1at are disposed abv e theG resist to form a gate structure including a gate electrode and a gate dielectric spacer and to expose portions of the graphene channel that are adjacent to the gate structure; and forming source and drain electrodes over the exposed portions of the graphene channel such that an interface between at least one of the source and drain electrodes and the graphene channel maintains a consistent degree of electrical conductivity between the graphene channel -5- Serial No. 13/468,092 Art Unit: 2892 and the at least one of the source and drain electrodes throughout the interface.