METHOD TO IMPROVE NUCLEATION OF MATERIALS ON GRAPHENE AND CARBON NANOTUBES

Katherina Babich

Patent

Atlas literature

Patent

US 8,895,352

METHOD TO IMPROVE NUCLEATION OF MATERIALS ON GRAPHENE AND CARBON NANOTUBES

Katherina Babich

Drawings

Patent drawings and their descriptions. Click a drawing to enlarge it.

FIG. 1

FIGS. 1 and 2 are cross-sectional diagrams illustrating an exemplary methodology for forming a thin coating on a surface of a carbon-based material according …

FIG. 2

FIG. 2, a thin coating 106 is deposited over silicon layer 104, e.g., to a thickness of from about two A to about 100 A. The present teachings are generally …

FIG. 3

performance graph

FIG. 3. Namely,

FIG. 4

FIGS. 4-9 are diagrams illustrating an exemplary methodology for fabricating such a device. In general, a FET comprises a source region and a drain region …

FIG. 5

FIG. 5, source and drain region electrodes 502 and 504 are spaced apart from one another so as to permit a gate electrode to be formed therebetween (see …

FIG. 6

FIG. 6, an ultra thin silicon nucleation layer 602 is deposited over the surface of carbon-based material 402 to facilitate nucleation of a dielectric layer …

FIG. 7

FIG. 7, dielectric layer 702 can be etched away locally in the source and drain regions to expose source and drain region electrodes 502 and 504. [0041] At …

FIG. 8

FIG. 8, a partial gate electrode 802 is formed over dielectric layer 702 between source and drain region electrodes 502 and 504. The same techniques used to …

FIG. 9

FIG. 9, a full gate electrode 902 is formed over dielectric layer 702 between source and drain region electrodes 502 and 504. The same techniques used to form …

FIG. 10

FIG. 10. The thickness of the graphene ﬂake was found to be from about two nm to about three nm by AMF analysis. This corresponds to from about one layer to …

FIG. 11

FIG. 11 is an atomic force microscope (A F M) image of the graphene ﬂake of

FIG. 12

FIG. 12) post amorphous silicon/high-k dielectric deposition and post top gate electrode formation. In image 1800, the source and drain region electrodes are …

FIG. 13

FIG. 13 is a top-down optical image 1300 of source and drain region electrodes 1202. In this example, source and drain region electrodes 1202 are formed using …

FIG. 14

performance graph

FIG. 14 is a graph 1400 illustrating current-voltage (I-V) characteristics of the device structure of

FIG. 15

performance graph

FIG. 15 is a graph 1500 illustrating experimental ellipsometric spectra of angle of polarization P collected at 65 degrees (dash line) and at 75 degrees YO …

FIG. 16

FIG. 16 is a tilted cross-sectional SEM image of a graphene ﬂake post amorphous silicon/high-k dielectric deposition according to an embodiment of the present …

FIG. 17

FIG. 17. Namely,

FIG. 18

FIG. 18. In graph 1900, top gate voltage V t g (measured in V) is plotted on the x-axis and source-drain current Id s (measured in A) is plotted on the y-axis. …

FIG. 19

performance graph

FIG. 19 is a graph 1900 illustrating current versus top gate voltage for the device structure of

Claims

Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.

14 independent · 18 dependent

1
IndependentSigraphenethin coating
1. A method for forming a thin coating on a surface of a carbon-based material, comprising the steps of: depositing an ultra thin silicon nucleation layer to a thickness of from about two angstroms to about 10 angstroms on at least a portion of an exposed area of the surface of the carbon-based material to facilitate nucleation of the coating on the surface of the carbon-based material yet leaving electrical characteristics of the carbon-based material unaﬀected by the ultra thin silicon nucleation layer, wherein the ultra thin silicon nucleation layer comprises amorphous silicon and wherein the carbon-based material comprises a graphene ﬂake or a portion thereof having from about one to about two layers of graphene; creating a neutral charge state in the ultra thin silicon nucleation layer; and depositing the thin coating to a thickness of from about two angstroms to about 100 angstroms over the ultra thin silicon nucleation layer to form the thin coating which is continuous on the surface of the carbon-based material, wherein the neutral charge state is created in the ultra thin silicon nucleation layer by depositing the coating over the ultra thin silicon nucleation layer in situ and thereby converting the ultra thin silicon nucleation layer into a neutral charge molecule, wherein the ultra thin silicon nucleation la yer, as deposited, forms a non-continuous lay er directly on the exposed area of the surface of the carbon-based material and wherein the non-continuous lay er facilitates nucleation of the thin coating that is continuous on the surface of the carbon-based material.
1. 2
  Dependent← claim 1dielectric layer
  The method of claim 1, wherein the coating comprises a dielectric layer.
2. 4
  Dependent← claim 1
  The method of claim 1, wherein the coating is deposited over the ultra thin silicon nucleation layer using atomic layer deposition. 2 Docket No. Y O R₉₂₀₀₉₀₀₂ 0US₁ Customer No. 63919 original
3. 6
  Dependent← claim 1Si
  The method of claim 1, wherein the ultra thin silicon nucleation layer is deposited to a thickness of from about three angstroms to about eight angstroms on the at least a portion of the surface of the carbon-based material. original
4. 8
  Dependent← claim 1Si
  The method of claim 1, wherein the ultra thin silicon nucleation layer is deposited on the at least a portion of the surface of the carbon-based material using plasma-enhanced chemical vapor deposition in a vacuum chamber using a low pressure of about 20 millitorr and a low radio frequency plasma at about 30 milliwatts per square centimeter so as to minimize plasma damage, and wherein the car bon based mater ial is grounded during depositi on.
5. 9
  Dependent← claim 1Si
  The method of claim 1, wherein the ultra thin silicon nucleation layer is deposited on the at least a portion of the surface of the carbon-based material using rapid thermal chemical vapor deposition at a temperature of from about 450 o C to about 900 0 C with dichlorosilane as a silicon source.
6. 10
  Dependent← claim 1Si
  The method of claim 1, further comprising the step of: oxidizing the ultra thin silicon nucleation layer before depositing the thin coating.
7. 26
  Dependent← claim 1SiO₂
  The method of claim 1, wherein the coating includes an oxide, and wherein the neutral charge state created in the ultra thin silicon nucleation layer by depositing the coating in situ results in conversion of the ultra thin silicon nucleation layer to silicon dioxide.
8. 27
  Dependent← claim 1Si₃N₄
  The method of claim 1, wherein the coating includes a nitride, and wherein the neutral charge state created in the ultra thin silicon nucleation layer by depositing the coating in situ results in conversion of the ultra thin silicon nucleation layer to silicon nitride by nitridation. 5 Docket No. Y O R₉₂₀₀₉₀₀₂ 0US₁ Customer No. 63919
9. 28
  Dependent← claim 1
  The method of claim 1, wherein the ultra thin silicon nucleation layer is deposited using a plasma-free process to prevent plasma damage.
10. 29
  Dependent← claim 1
  The method of claim 1, further comprising the step of: patterning the thin coating. previously presented
5
Independent
canceled
7
Independent
canceled
11
IndependentSigraphenedielectric layergraphene field-effect transistor (FET)
A method of fabricating a ﬁeld-eﬀect transistor (FET) device comprising the steps of: providing a substrate; forming a carbon-based material on the substrate, wherein the carbon-based material comprises graphene; forming source and drain region electrodes on a surface of the carbon-based material using electron beam lithography with a poly(methyl methacrylate (PMMA) 3 Docket No. Y O R₉₂₀₀₉₀₀₂ 0US 1 Customer No. 63919 resist process and contact metal evaporation, wherein the source and drain region electrodes are spaced apart from one another so as to permit a gate electrode to be formed therebetween; depositing an ultra thin silicon nucleation layer to a thickness of from about two angstroms to about 10 angstroms on at least a portion of an exposed area of the surface of the carbon-based material to facilitate nucleation of a dielectric layer on the surface of the carbon-based material yet leaving electrical characteristics of the carbon-based material unaﬀected by the ultra thin silicon nucleation layer, wherein the ultra thin silicon nucleation layer is present only on the surface of the carbon-based material, and comprises amorphous silicon; creating a neutral charge state in the ultra thin silicon nucleation layer; depositing the dielectric layer over the ultra thin silicon nucleation layer as a continuous layer on the surface of the carbon-based material and covering at least a portion of the source and drain region electrodes having a thickness of from about two angstroms to about 100 angstroms, wherein the neutral charge state is created in the ultra thin silicon nucleation layer by depositing the dielectric layer over the ultra thin silicon nucleation layer in situ, wherein the ultra thin silicon nucleation la y er, as deposited, forms a non-continuous lay er directly on the exposed area of the surface of the carbon- based material and wherein the non-continuous la y er facilitates nucleation of the dielectric that is continuous on the surface of the carbon-based material; removing portions of the dielectric layer to expose the source and drain region electrodes; and after the source and drain region electrodes have been exposed, forming the gate electrode over the dielectric layer between the source and drain region electrodes.
1. 12
  Dependent← claim 11high-k dielectric layer
  The method of claim 11, wherein the dielectric layer comprises a high- k dielectric layer. original
2. 14
  Dependent← claim 11Si
  The method of claim 11, wherein the ultra thin silicon nucleation layer is deposited to a thickness of from about three angstroms to about eight angstroms on the at least a portion of the surface of the carbon-based material. original
3. 16
  Dependent← claim 11graphene
  The method of claim 11, wherein the step of forming the carbon-based material on the substrate f ur ther comprising the step of: depositing or growing the carbon-based material on the substrate.
4. 17
  Dependent← claim 11
  The method of claim 11, wherein the substrate comprises an insulator layer, the method further comprising the step of: forming the carbon-based material on the insulator layer.
5. 18
  Dependent← claim 11
  The method of claim 11, further comprising the step of: analyzing the carbon-based material using optieal atomic force microscope (AFM) analysis to determine a thickness thereof. 19-25..
6. 31
  Dependent← claim 11graphene field-effect transistor (FET)
  The method of claim 11, wherein the substrate comprises a doped silicon substrate that serves as a back gate of the FET device, the method further comprising the steps of: forming an insulating layer on the substrate to a thickness of about 300 nanometers; and forming the carbon-based material on the insulating layer.
7. 32
  Dependent← claim 11graphene field-effect transistor (FET)
  The method of claim 11, wherein the gate source and drain region electrodes, but is in a nondrain region electrodes. 6 electrode extends fully a distance between the overlapping position relative to the source and
13
Independent
. canceled
15
Independent
canceled
19
Independent
canceled
20
Independent
canceled
21
Independent
canceled
22
Independent
canceled
23
Independent
canceled
24
Independent
canceled
25
Independent
canceled
30
Independent
. canceled

Device structures

Layer stacks claimed or described, ordered top of device to substrate.

graphene field-effect transistor (FET)

gate electrodegate electrode

dielectric layergate dielectric (2-100 Å)

Sinucleation layer (amorphous Si, 2-10 Å)

source/drain electrodessource/drain electrodes

graphenechannel

insulating layer (~300 nm)insulating layer (~300 nm)

Materials

Materials described outside the worked examples.

ultra thin silicon nucleation layer (amorphous silicon)

Nucleation Layer

graphene

Process steps

Additional fabrication and treatment steps described in the patent.

Pecvd Deposition

Step 1

Process details

notes:low pressure ~20 millitorr, low RF plasma ~30 mW/cm2 to minimize plasma damage; carbon-based material grounded during deposition

pressure mtorr:20

substrate grounded:true

rf power density mW per cm2:30

Materials:

Characterization

Measurements and analyses referenced in the patent, with their drawing references.

thickness

Thickness

FIG. 2, a thin coating 106 is deposited over silicon layer 104, e.g., to a thickness of from about two A to about 100 A. The present teachings are generally …

Figure references

FIG. 2

sem

Why these are connected

Related documents with shared materials, methods, properties, or citations.

METHOD TO IMPROVE NUCLEATION OF MATERIALS ON GRAPHENE AND CARBON NANOTUBES | Matter42 Literature