Patent
US 9,620,599SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
Hisashi SAITO
US
Copyright © 2026 Matter42. All rights reserved.
Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: a G aN layer; a G aN-based semiconductor layer provided on the G aN layer and having a wider band gap than the G aN layer; a source electrode electrically connected to the G aN-based semiconductor layer; a drain electrode electrically connected to the G aN-based semiconductor layer; a gate electrode provided in the G aN-based semiconductor layer between the source electrode and the drain electrode; and a gate insulating film provided at least between the G aN layer and the gate electrode, and between the GaN-based semiconductor layer and the gate electrode, the gate insulating film including a first insulating film and a second insulating film, the first insulating film provided between [[on]] the G aN layer and the gate electrode, and between the GaN-based semiconductor layer and the gate electrode, the first insulating film having a thickness equal to or greater than 0.2 nm and less than 2 nm, the first insulating film including nitrogen, the second insulating film provided between the first insulating film and the gate electrode, the second insulating film including oxygen.
The device according to claim 1, wherein the second insulating film has a lower nitrogen concentration than the first insulating film.
The device according to claim 1, wherein the second insulating film is thicker than the first insulating film.
The device according to claim 1, wherein the first insulating film is a silicon nitride film, an aluminum nitride film, a silicon oxynitride film, or an aluminum oxynitride film.
The device according to claim 1, wherein the second insulating film is a silicon oxide film or an aluminum oxide film.
The device according to claim 1, wherein the gate electrode is made of a titanium nitride (T i N), tungsten (W), nickel (Ni), tungsten nitride (WN), tantalum nitride (TaN) or doped polysilicon.
The device according to claim 1, wherein the gate insulating film is formed inside and outside a trench extending from a surface of the GaN-based semiconductor layer to the G aN layer, and a third insulating film is provided between the GaN-based semiconductor layer and the gate insulating film formed outside the trench.
The device according to claim 1, wherein the thickness of the first insulating film is equal to or less than 1 nm.
The device according to claim 1, wherein the first insulating film is a silicon nitride film, an aluminum nitride film, a silicon oxynitride film, or an aluminum oxynitride film, and wherein the second insulating film is a silicon oxide film or an aluminum oxide film.
The device according to claim 1, wherein the first insulating film is a silicon nitride film, an aluminum nitride film, a silicon oxynitride film, or an aluminum oxynitride film, and wherein the second insulating film is a silico n oxide film. 4
The device according to claim I, wherein the thickness of the second insulating film is equal to or greater than 10 nm and equal to or less than 50 nm.
Claims 9-18. canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based HEMT MISFET with recessed gate
recessed gate trench structure with third insulating film
Materials described outside the worked examples.
GaN
GaN-based semiconductor
first insulating film (nitrogen-containing)
second insulating film (oxygen-containing)
silicon nitride
SiNx
aluminum nitride
AlNx
silicon oxynitride
SiOyNx
aluminum oxynitride
AlOyNx
silicon oxide
SiOx
aluminum oxide
AlOx
titanium nitride
TiN
tungsten
W
nickel
Ni
tungsten nitride
WN
tantalum nitride
TaN
doped polysilicon
AlGaN barrier layer
AlyGa₁-yN
AlGaN buffer layer
AlwGa₁-wN
silicon
Si
passivation film/third insulating film
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | ≤ 2 nm | — |
Thickness | ≤ 50 nm | — |
Thickness | ≤ 1 nm | — |
Thickness | ≥ 0.2 nm | — |
Thickness | ≥ 15 nm | — |
Thickness | ≥ 0.5 nm | — |
Thickness | ≥ 10 nm | — |
Related documents with shared materials, methods, properties, or citations.
EMBEDDED PACKAGING FOR DEVICES AND SYSTEMS COMPRISING LATERAL GaN POWER TRANSISTORS
PACKAGING SOLUTIONS FOR DEVICES AND SYSTEMS COMPRISING LATERAL GAN POWER TRANSISTORS
METHOD OF FABRICATING GAN HIGH VOLTAGE HFET WITH PASSIVATION PLUS GATE DIELECTRIC MULTILAYER STRUCTURE
HYBRID POWER AMPLIFIER WITH GAN-ON-SI AND GAN-ON-SIC CIRCUITS
INTEGRATED GALLIUM NITRIDE POWER AMPLIFIER AND SWITCH
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INGAN/GAN MULTIPLE QUANTUM WELL BLUE LIGHT DETECTOR COMBINED WITH EMBEDDED ELECTRODE AND PASSIVATION LAYER STRUCTURE AND PREPARATION METHOD AND APPLICATION THEREOF
Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: a G aN layer; a G aN-based semiconductor layer provided on the G aN layer and having a wider band gap than the G aN layer; a source electrode electrically connected to the G aN-based semiconductor layer; a drain electrode electrically connected to the G aN-based semiconductor layer; a gate electrode provided in the G aN-based semiconductor layer between the source electrode and the drain electrode; and a gate insulating film provided at least between the G aN layer and the gate electrode, and between the GaN-based semiconductor layer and the gate electrode, the gate insulating film including a first insulating film and a second insulating film, the first insulating film provided between [[on]] the G aN layer and the gate electrode, and between the GaN-based semiconductor layer and the gate electrode, the first insulating film having a thickness equal to or greater than 0.2 nm and less than 2 nm, the first insulating film including nitrogen, the second insulating film provided between the first insulating film and the gate electrode, the second insulating film including oxygen.
The device according to claim 1, wherein the second insulating film has a lower nitrogen concentration than the first insulating film.
The device according to claim 1, wherein the second insulating film is thicker than the first insulating film.
The device according to claim 1, wherein the first insulating film is a silicon nitride film, an aluminum nitride film, a silicon oxynitride film, or an aluminum oxynitride film.
The device according to claim 1, wherein the second insulating film is a silicon oxide film or an aluminum oxide film.
The device according to claim 1, wherein the gate electrode is made of a titanium nitride (T i N), tungsten (W), nickel (Ni), tungsten nitride (WN), tantalum nitride (TaN) or doped polysilicon.
The device according to claim 1, wherein the gate insulating film is formed inside and outside a trench extending from a surface of the GaN-based semiconductor layer to the G aN layer, and a third insulating film is provided between the GaN-based semiconductor layer and the gate insulating film formed outside the trench.
The device according to claim 1, wherein the thickness of the first insulating film is equal to or less than 1 nm.
The device according to claim 1, wherein the first insulating film is a silicon nitride film, an aluminum nitride film, a silicon oxynitride film, or an aluminum oxynitride film, and wherein the second insulating film is a silicon oxide film or an aluminum oxide film.
The device according to claim 1, wherein the first insulating film is a silicon nitride film, an aluminum nitride film, a silicon oxynitride film, or an aluminum oxynitride film, and wherein the second insulating film is a silico n oxide film. 4
The device according to claim I, wherein the thickness of the second insulating film is equal to or greater than 10 nm and equal to or less than 50 nm.
Claims 9-18. canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based HEMT MISFET with recessed gate
recessed gate trench structure with third insulating film
Materials described outside the worked examples.
GaN
GaN-based semiconductor
first insulating film (nitrogen-containing)
second insulating film (oxygen-containing)
silicon nitride
SiNx
aluminum nitride
AlNx
silicon oxynitride
SiOyNx
aluminum oxynitride
AlOyNx
silicon oxide
SiOx
aluminum oxide
AlOx
titanium nitride
TiN
tungsten
W
nickel
Ni
tungsten nitride
WN
tantalum nitride
TaN
doped polysilicon
AlGaN barrier layer
AlyGa₁-yN
AlGaN buffer layer
AlwGa₁-wN
silicon
Si
passivation film/third insulating film
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | ≤ 2 nm | — |
Thickness | ≤ 50 nm | — |
Thickness | ≤ 1 nm | — |
Thickness | ≥ 0.2 nm | — |
Thickness | ≥ 15 nm | — |
Thickness | ≥ 0.5 nm | — |
Thickness | ≥ 10 nm | — |
Related documents with shared materials, methods, properties, or citations.
EMBEDDED PACKAGING FOR DEVICES AND SYSTEMS COMPRISING LATERAL GaN POWER TRANSISTORS
PACKAGING SOLUTIONS FOR DEVICES AND SYSTEMS COMPRISING LATERAL GAN POWER TRANSISTORS
METHOD OF FABRICATING GAN HIGH VOLTAGE HFET WITH PASSIVATION PLUS GATE DIELECTRIC MULTILAYER STRUCTURE
HYBRID POWER AMPLIFIER WITH GAN-ON-SI AND GAN-ON-SIC CIRCUITS
INTEGRATED GALLIUM NITRIDE POWER AMPLIFIER AND SWITCH
METHODS AND APPARATUS FOR GALLIUM NITRIDE DEPOSITION
INGAN/GAN MULTIPLE QUANTUM WELL BLUE LIGHT DETECTOR COMBINED WITH EMBEDDED ELECTRODE AND PASSIVATION LAYER STRUCTURE AND PREPARATION METHOD AND APPLICATION THEREOF
Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: a G aN layer; a G aN-based semiconductor layer provided on the G aN layer and having a wider band gap than the G aN layer; a source electrode electrically connected to the G aN-based semiconductor layer; a drain electrode electrically connected to the G aN-based semiconductor layer; a gate electrode provided in the G aN-based semiconductor layer between the source electrode and the drain electrode; and a gate insulating film provided at least between the G aN layer and the gate electrode, and between the GaN-based semiconductor layer and the gate electrode, the gate insulating film including a first insulating film and a second insulating film, the first insulating film provided between [[on]] the G aN layer and the gate electrode, and between the GaN-based semiconductor layer and the gate electrode, the first insulating film having a thickness equal to or greater than 0.2 nm and less than 2 nm, the first insulating film including nitrogen, the second insulating film provided between the first insulating film and the gate electrode, the second insulating film including oxygen.
The device according to claim 1, wherein the second insulating film has a lower nitrogen concentration than the first insulating film.
The device according to claim 1, wherein the second insulating film is thicker than the first insulating film.
The device according to claim 1, wherein the first insulating film is a silicon nitride film, an aluminum nitride film, a silicon oxynitride film, or an aluminum oxynitride film.
The device according to claim 1, wherein the second insulating film is a silicon oxide film or an aluminum oxide film.
The device according to claim 1, wherein the gate electrode is made of a titanium nitride (T i N), tungsten (W), nickel (Ni), tungsten nitride (WN), tantalum nitride (TaN) or doped polysilicon.
The device according to claim 1, wherein the gate insulating film is formed inside and outside a trench extending from a surface of the GaN-based semiconductor layer to the G aN layer, and a third insulating film is provided between the GaN-based semiconductor layer and the gate insulating film formed outside the trench.
The device according to claim 1, wherein the thickness of the first insulating film is equal to or less than 1 nm.
The device according to claim 1, wherein the first insulating film is a silicon nitride film, an aluminum nitride film, a silicon oxynitride film, or an aluminum oxynitride film, and wherein the second insulating film is a silicon oxide film or an aluminum oxide film.
The device according to claim 1, wherein the first insulating film is a silicon nitride film, an aluminum nitride film, a silicon oxynitride film, or an aluminum oxynitride film, and wherein the second insulating film is a silico n oxide film. 4
The device according to claim I, wherein the thickness of the second insulating film is equal to or greater than 10 nm and equal to or less than 50 nm.
Claims 9-18. canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based HEMT MISFET with recessed gate
recessed gate trench structure with third insulating film
Materials described outside the worked examples.
GaN
GaN-based semiconductor
first insulating film (nitrogen-containing)
second insulating film (oxygen-containing)
silicon nitride
SiNx
aluminum nitride
AlNx
silicon oxynitride
SiOyNx
aluminum oxynitride
AlOyNx
silicon oxide
SiOx
aluminum oxide
AlOx
titanium nitride
TiN
tungsten
W
nickel
Ni
tungsten nitride
WN
tantalum nitride
TaN
doped polysilicon
AlGaN barrier layer
AlyGa₁-yN
AlGaN buffer layer
AlwGa₁-wN
silicon
Si
passivation film/third insulating film
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | ≤ 2 nm | — |
Thickness | ≤ 50 nm | — |
Thickness | ≤ 1 nm | — |
Thickness | ≥ 0.2 nm | — |
Thickness | ≥ 15 nm | — |
Thickness | ≥ 0.5 nm | — |
Thickness | ≥ 10 nm | — |
Related documents with shared materials, methods, properties, or citations.
EMBEDDED PACKAGING FOR DEVICES AND SYSTEMS COMPRISING LATERAL GaN POWER TRANSISTORS
PACKAGING SOLUTIONS FOR DEVICES AND SYSTEMS COMPRISING LATERAL GAN POWER TRANSISTORS
METHOD OF FABRICATING GAN HIGH VOLTAGE HFET WITH PASSIVATION PLUS GATE DIELECTRIC MULTILAYER STRUCTURE
HYBRID POWER AMPLIFIER WITH GAN-ON-SI AND GAN-ON-SIC CIRCUITS
INTEGRATED GALLIUM NITRIDE POWER AMPLIFIER AND SWITCH
METHODS AND APPARATUS FOR GALLIUM NITRIDE DEPOSITION
INGAN/GAN MULTIPLE QUANTUM WELL BLUE LIGHT DETECTOR COMBINED WITH EMBEDDED ELECTRODE AND PASSIVATION LAYER STRUCTURE AND PREPARATION METHOD AND APPLICATION THEREOF
Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A semiconductor device comprising: a G aN layer; a G aN-based semiconductor layer provided on the G aN layer and having a wider band gap than the G aN layer; a source electrode electrically connected to the G aN-based semiconductor layer; a drain electrode electrically connected to the G aN-based semiconductor layer; a gate electrode provided in the G aN-based semiconductor layer between the source electrode and the drain electrode; and a gate insulating film provided at least between the G aN layer and the gate electrode, and between the GaN-based semiconductor layer and the gate electrode, the gate insulating film including a first insulating film and a second insulating film, the first insulating film provided between [[on]] the G aN layer and the gate electrode, and between the GaN-based semiconductor layer and the gate electrode, the first insulating film having a thickness equal to or greater than 0.2 nm and less than 2 nm, the first insulating film including nitrogen, the second insulating film provided between the first insulating film and the gate electrode, the second insulating film including oxygen.
The device according to claim 1, wherein the second insulating film has a lower nitrogen concentration than the first insulating film.
The device according to claim 1, wherein the second insulating film is thicker than the first insulating film.
The device according to claim 1, wherein the first insulating film is a silicon nitride film, an aluminum nitride film, a silicon oxynitride film, or an aluminum oxynitride film.
The device according to claim 1, wherein the second insulating film is a silicon oxide film or an aluminum oxide film.
The device according to claim 1, wherein the gate electrode is made of a titanium nitride (T i N), tungsten (W), nickel (Ni), tungsten nitride (WN), tantalum nitride (TaN) or doped polysilicon.
The device according to claim 1, wherein the gate insulating film is formed inside and outside a trench extending from a surface of the GaN-based semiconductor layer to the G aN layer, and a third insulating film is provided between the GaN-based semiconductor layer and the gate insulating film formed outside the trench.
The device according to claim 1, wherein the thickness of the first insulating film is equal to or less than 1 nm.
The device according to claim 1, wherein the first insulating film is a silicon nitride film, an aluminum nitride film, a silicon oxynitride film, or an aluminum oxynitride film, and wherein the second insulating film is a silicon oxide film or an aluminum oxide film.
The device according to claim 1, wherein the first insulating film is a silicon nitride film, an aluminum nitride film, a silicon oxynitride film, or an aluminum oxynitride film, and wherein the second insulating film is a silico n oxide film. 4
The device according to claim I, wherein the thickness of the second insulating film is equal to or greater than 10 nm and equal to or less than 50 nm.
Claims 9-18. canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based HEMT MISFET with recessed gate
recessed gate trench structure with third insulating film
Materials described outside the worked examples.
GaN
GaN-based semiconductor
first insulating film (nitrogen-containing)
second insulating film (oxygen-containing)
silicon nitride
SiNx
aluminum nitride
AlNx
silicon oxynitride
SiOyNx
aluminum oxynitride
AlOyNx
silicon oxide
SiOx
aluminum oxide
AlOx
titanium nitride
TiN
tungsten
W
nickel
Ni
tungsten nitride
WN
tantalum nitride
TaN
doped polysilicon
AlGaN barrier layer
AlyGa₁-yN
AlGaN buffer layer
AlwGa₁-wN
silicon
Si
passivation film/third insulating film
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | ≤ 2 nm | — |
Thickness | ≤ 50 nm | — |
Thickness | ≤ 1 nm | — |
Thickness | ≥ 0.2 nm | — |
Thickness | ≥ 15 nm | — |
Thickness | ≥ 0.5 nm | — |
Thickness | ≥ 10 nm | — |
Related documents with shared materials, methods, properties, or citations.
EMBEDDED PACKAGING FOR DEVICES AND SYSTEMS COMPRISING LATERAL GaN POWER TRANSISTORS
PACKAGING SOLUTIONS FOR DEVICES AND SYSTEMS COMPRISING LATERAL GAN POWER TRANSISTORS
METHOD OF FABRICATING GAN HIGH VOLTAGE HFET WITH PASSIVATION PLUS GATE DIELECTRIC MULTILAYER STRUCTURE
HYBRID POWER AMPLIFIER WITH GAN-ON-SI AND GAN-ON-SIC CIRCUITS
INTEGRATED GALLIUM NITRIDE POWER AMPLIFIER AND SWITCH
METHODS AND APPARATUS FOR GALLIUM NITRIDE DEPOSITION
INGAN/GAN MULTIPLE QUANTUM WELL BLUE LIGHT DETECTOR COMBINED WITH EMBEDDED ELECTRODE AND PASSIVATION LAYER STRUCTURE AND PREPARATION METHOD AND APPLICATION THEREOF