GaN VERTICAL-CHANNEL JUNCTION FIELD-EFFECT TRANSISTORS WITH REGROWN p-GaN BY METAL ORGANIC CHEMICAL VAPOR DEPOSITION (MOCVD) | Matter42 Literature
Patent
Atlas literature
Patent
US 12,159,943 B2
GaN VERTICAL-CHANNEL JUNCTION FIELD-EFFECT TRANSISTORS WITH REGROWN p-GaN BY METAL ORGANIC CHEMICAL VAPOR DEPOSITION (MOCVD)
Yuji Zhao, Chen Yang, Houqiang Fu, Xuanqi Huang et al.
Arizona Board of Regents on behalf of Arizona State University, Scottsdale, AZ (US)·Dec. 3, 2024·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
FIG. 1I. Top p-GaN etching is performed to expose the n-GaN 102' for 65 source electrodes, as depicted in
FIG. 2
FIGS. 2A and 2B show crystal planes in GaN wurtzite structure and schematics of the fin alignment direction, respectively.
FIG. 3
FIG. 3 is a schematic of a cross section of a GaN VC-JFET.
FIG. 4
performance graph
FIG. 4B shows I-V curves for the lateral p-n junctions between the gate and the source. The insets show schematics of the p-n junctions in GaN VC-JFETs.
A vertical-channel junction field-effect transistor com-prising: a doped GaN layer; an unintentionally doped GaN layer on the doped GaN layer; 55 a p-GaN regrowth layer on the unintentionally doped GaN layer, wherein portions of the p-GaN regrowth layer are separated by a vertical channel of the unintentionally doped GaN layer; gate electrodes in direct contact with the p-GaN regrowth layer; and a source electrode in direct contact with and overlapping with the p-GaN regrowth layer and the unintentionally doped GaN layer.
The vertical-channel junction field-effect transistor of claim 1, wherein the gate electrodes are separated by the vertical channel of the unintentionally doped GaN layer.
The vertical-channel junction field-effect transistor of claim 1, wherein the vertical channel defines 90° angles with respect to the p-GaN regrowth layer.
A vertical-channel junction field-effect transistor com-prising: a doped GaN layer; an unintentionally doped GaN layer on the doped GaN layer; a p-GaN regrowth layer on the unintentionally doped GaN layer, wherein portions of the p-GaN regrowth layer are separated by a vertical channel of the unintentionally doped GaN layer; and a source electrode in direct contact with and overlapping with the unintentionally doped GaN layer and the p-GaN regrowth layer.
The vertical-channel junction field-effect transistor of claim 10, wherein a regrowth interface is defined between the p-GaN regrowth layer and the unintentionally doped GaN layer.
The vertical-channel junction field-effect transistor of claim 10, wherein the vertical channel of the unintentionally doped GaN layer forms a vertical p-n junction at the regrowth interface between a gate electrode and a drain electrode.
The vertical-channel junction field-effect transistor of claim 10, further comprising a lateral p-n junction at the regrowth interface perpendicular to the vertical p-n junction, wherein the lateral p-n junction is between the gate electrode and the source electrode.
The vertical-channel junction field-effect transistor of claim 10, wherein the vertical channel defines 90° angles with respect to the p-GaN regrowth layer. ∗ ∗ ∗ ∗ ∗
Worked examples
Embodiments described in the patent, grouped by the materials and process steps they use.
Device Fabrication Example
example section example
7 materials5 process steps
Device epilayers grown by MOCVD with TMGa as Ga precursor and NH₃ as nitrogen source in H₂ carrier gas. A 4-µm-thick UID GaN homoepitaxially grown on heavily doped bulk GaN substrates. Cr (50 nm)/SiO₂ (700 nm) hard mask deposited. Fins patterned by EBL aligned to a-plane or m-plane. Cl₂/F₂-based RIE to define Cr and SiO₂ hard masks. Two-step ICP etching: 6-minute fast etch (~280 nm/min) and 3-minute slow etch (~20 nm/min). Hard mask residuals removed by Cr etchant and HF. Sample cleaned with 75°C 25% TMAH (5 min), piranha (15 min), UV-ozone (1 hr), BOE and 10% HCl (5 min). Samples re-loaded into MOCVD for p-GaN regrowth: 1 µm p-GaN (1×10¹⁷ cm⁻³) grown with Cp₂Mg as Mg precursor. p-GaN activated at 700°C for 20 minutes. Photoresist planarization used to selectively etch p-GaN on top of fin to expose n-GaN for source contacts. Gate electrodes Pd/Ni/Au (30/20/100 nm) formed by e-beam evaporation and annealed at 450°C for 5 minutes. Source and drain electrodes Ti/Al/Ni (30/100/30 nm) deposited by e-beam evaporation.
Device structures
Layer stacks claimed or described, ordered top of device to substrate.
GaN vertical-channel junction field-effect transistor (VC-JFET)
Ti/Al/Ni drain electrodedrain electrode
Ti/Al/Ni source electrodesource electrode
Pd/Ni/Au gate electrodegate electrode
GaNgate control regrowth
GaNchannel
GaNsubstrate/drain layer
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
fet electrical
Fet Electrical
FIG. 1I. Top p-GaN etching is performed to expose the n-GaN 102' for 65 source electrodes, as depicted in
GaN VERTICAL-CHANNEL JUNCTION FIELD-EFFECT TRANSISTORS WITH REGROWN p-GaN BY METAL ORGANIC CHEMICAL VAPOR DEPOSITION (MOCVD)
Yuji Zhao, Chen Yang, Houqiang Fu, Xuanqi Huang et al.
Arizona Board of Regents on behalf of Arizona State University, Scottsdale, AZ (US)·Dec. 3, 2024·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
FIG. 1I. Top p-GaN etching is performed to expose the n-GaN 102' for 65 source electrodes, as depicted in
FIG. 2
FIGS. 2A and 2B show crystal planes in GaN wurtzite structure and schematics of the fin alignment direction, respectively.
FIG. 3
FIG. 3 is a schematic of a cross section of a GaN VC-JFET.
FIG. 4
performance graph
FIG. 4B shows I-V curves for the lateral p-n junctions between the gate and the source. The insets show schematics of the p-n junctions in GaN VC-JFETs.
A vertical-channel junction field-effect transistor com-prising: a doped GaN layer; an unintentionally doped GaN layer on the doped GaN layer; 55 a p-GaN regrowth layer on the unintentionally doped GaN layer, wherein portions of the p-GaN regrowth layer are separated by a vertical channel of the unintentionally doped GaN layer; gate electrodes in direct contact with the p-GaN regrowth layer; and a source electrode in direct contact with and overlapping with the p-GaN regrowth layer and the unintentionally doped GaN layer.
The vertical-channel junction field-effect transistor of claim 1, wherein the gate electrodes are separated by the vertical channel of the unintentionally doped GaN layer.
The vertical-channel junction field-effect transistor of claim 1, wherein the vertical channel defines 90° angles with respect to the p-GaN regrowth layer.
A vertical-channel junction field-effect transistor com-prising: a doped GaN layer; an unintentionally doped GaN layer on the doped GaN layer; a p-GaN regrowth layer on the unintentionally doped GaN layer, wherein portions of the p-GaN regrowth layer are separated by a vertical channel of the unintentionally doped GaN layer; and a source electrode in direct contact with and overlapping with the unintentionally doped GaN layer and the p-GaN regrowth layer.
The vertical-channel junction field-effect transistor of claim 10, wherein a regrowth interface is defined between the p-GaN regrowth layer and the unintentionally doped GaN layer.
The vertical-channel junction field-effect transistor of claim 10, wherein the vertical channel of the unintentionally doped GaN layer forms a vertical p-n junction at the regrowth interface between a gate electrode and a drain electrode.
The vertical-channel junction field-effect transistor of claim 10, further comprising a lateral p-n junction at the regrowth interface perpendicular to the vertical p-n junction, wherein the lateral p-n junction is between the gate electrode and the source electrode.
The vertical-channel junction field-effect transistor of claim 10, wherein the vertical channel defines 90° angles with respect to the p-GaN regrowth layer. ∗ ∗ ∗ ∗ ∗
Worked examples
Embodiments described in the patent, grouped by the materials and process steps they use.
Device Fabrication Example
example section example
7 materials5 process steps
Device epilayers grown by MOCVD with TMGa as Ga precursor and NH₃ as nitrogen source in H₂ carrier gas. A 4-µm-thick UID GaN homoepitaxially grown on heavily doped bulk GaN substrates. Cr (50 nm)/SiO₂ (700 nm) hard mask deposited. Fins patterned by EBL aligned to a-plane or m-plane. Cl₂/F₂-based RIE to define Cr and SiO₂ hard masks. Two-step ICP etching: 6-minute fast etch (~280 nm/min) and 3-minute slow etch (~20 nm/min). Hard mask residuals removed by Cr etchant and HF. Sample cleaned with 75°C 25% TMAH (5 min), piranha (15 min), UV-ozone (1 hr), BOE and 10% HCl (5 min). Samples re-loaded into MOCVD for p-GaN regrowth: 1 µm p-GaN (1×10¹⁷ cm⁻³) grown with Cp₂Mg as Mg precursor. p-GaN activated at 700°C for 20 minutes. Photoresist planarization used to selectively etch p-GaN on top of fin to expose n-GaN for source contacts. Gate electrodes Pd/Ni/Au (30/20/100 nm) formed by e-beam evaporation and annealed at 450°C for 5 minutes. Source and drain electrodes Ti/Al/Ni (30/100/30 nm) deposited by e-beam evaporation.
Device structures
Layer stacks claimed or described, ordered top of device to substrate.
GaN vertical-channel junction field-effect transistor (VC-JFET)
Ti/Al/Ni drain electrodedrain electrode
Ti/Al/Ni source electrodesource electrode
Pd/Ni/Au gate electrodegate electrode
GaNgate control regrowth
GaNchannel
GaNsubstrate/drain layer
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
fet electrical
Fet Electrical
FIG. 1I. Top p-GaN etching is performed to expose the n-GaN 102' for 65 source electrodes, as depicted in
GaN VERTICAL-CHANNEL JUNCTION FIELD-EFFECT TRANSISTORS WITH REGROWN p-GaN BY METAL ORGANIC CHEMICAL VAPOR DEPOSITION (MOCVD)
Yuji Zhao, Chen Yang, Houqiang Fu, Xuanqi Huang et al.
Arizona Board of Regents on behalf of Arizona State University, Scottsdale, AZ (US)·Dec. 3, 2024·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
FIG. 1I. Top p-GaN etching is performed to expose the n-GaN 102' for 65 source electrodes, as depicted in
FIG. 2
FIGS. 2A and 2B show crystal planes in GaN wurtzite structure and schematics of the fin alignment direction, respectively.
FIG. 3
FIG. 3 is a schematic of a cross section of a GaN VC-JFET.
FIG. 4
performance graph
FIG. 4B shows I-V curves for the lateral p-n junctions between the gate and the source. The insets show schematics of the p-n junctions in GaN VC-JFETs.
A vertical-channel junction field-effect transistor com-prising: a doped GaN layer; an unintentionally doped GaN layer on the doped GaN layer; 55 a p-GaN regrowth layer on the unintentionally doped GaN layer, wherein portions of the p-GaN regrowth layer are separated by a vertical channel of the unintentionally doped GaN layer; gate electrodes in direct contact with the p-GaN regrowth layer; and a source electrode in direct contact with and overlapping with the p-GaN regrowth layer and the unintentionally doped GaN layer.
The vertical-channel junction field-effect transistor of claim 1, wherein the gate electrodes are separated by the vertical channel of the unintentionally doped GaN layer.
The vertical-channel junction field-effect transistor of claim 1, wherein the vertical channel defines 90° angles with respect to the p-GaN regrowth layer.
A vertical-channel junction field-effect transistor com-prising: a doped GaN layer; an unintentionally doped GaN layer on the doped GaN layer; a p-GaN regrowth layer on the unintentionally doped GaN layer, wherein portions of the p-GaN regrowth layer are separated by a vertical channel of the unintentionally doped GaN layer; and a source electrode in direct contact with and overlapping with the unintentionally doped GaN layer and the p-GaN regrowth layer.
The vertical-channel junction field-effect transistor of claim 10, wherein a regrowth interface is defined between the p-GaN regrowth layer and the unintentionally doped GaN layer.
The vertical-channel junction field-effect transistor of claim 10, wherein the vertical channel of the unintentionally doped GaN layer forms a vertical p-n junction at the regrowth interface between a gate electrode and a drain electrode.
The vertical-channel junction field-effect transistor of claim 10, further comprising a lateral p-n junction at the regrowth interface perpendicular to the vertical p-n junction, wherein the lateral p-n junction is between the gate electrode and the source electrode.
The vertical-channel junction field-effect transistor of claim 10, wherein the vertical channel defines 90° angles with respect to the p-GaN regrowth layer. ∗ ∗ ∗ ∗ ∗
Worked examples
Embodiments described in the patent, grouped by the materials and process steps they use.
Device Fabrication Example
example section example
7 materials5 process steps
Device epilayers grown by MOCVD with TMGa as Ga precursor and NH₃ as nitrogen source in H₂ carrier gas. A 4-µm-thick UID GaN homoepitaxially grown on heavily doped bulk GaN substrates. Cr (50 nm)/SiO₂ (700 nm) hard mask deposited. Fins patterned by EBL aligned to a-plane or m-plane. Cl₂/F₂-based RIE to define Cr and SiO₂ hard masks. Two-step ICP etching: 6-minute fast etch (~280 nm/min) and 3-minute slow etch (~20 nm/min). Hard mask residuals removed by Cr etchant and HF. Sample cleaned with 75°C 25% TMAH (5 min), piranha (15 min), UV-ozone (1 hr), BOE and 10% HCl (5 min). Samples re-loaded into MOCVD for p-GaN regrowth: 1 µm p-GaN (1×10¹⁷ cm⁻³) grown with Cp₂Mg as Mg precursor. p-GaN activated at 700°C for 20 minutes. Photoresist planarization used to selectively etch p-GaN on top of fin to expose n-GaN for source contacts. Gate electrodes Pd/Ni/Au (30/20/100 nm) formed by e-beam evaporation and annealed at 450°C for 5 minutes. Source and drain electrodes Ti/Al/Ni (30/100/30 nm) deposited by e-beam evaporation.
Device structures
Layer stacks claimed or described, ordered top of device to substrate.
GaN vertical-channel junction field-effect transistor (VC-JFET)
Ti/Al/Ni drain electrodedrain electrode
Ti/Al/Ni source electrodesource electrode
Pd/Ni/Au gate electrodegate electrode
GaNgate control regrowth
GaNchannel
GaNsubstrate/drain layer
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
fet electrical
Fet Electrical
FIG. 1I. Top p-GaN etching is performed to expose the n-GaN 102' for 65 source electrodes, as depicted in
GaN VERTICAL-CHANNEL JUNCTION FIELD-EFFECT TRANSISTORS WITH REGROWN p-GaN BY METAL ORGANIC CHEMICAL VAPOR DEPOSITION (MOCVD)
Yuji Zhao, Chen Yang, Houqiang Fu, Xuanqi Huang et al.
Arizona Board of Regents on behalf of Arizona State University, Scottsdale, AZ (US)·Dec. 3, 2024·US
Drawings
Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1
FIG. 1I. Top p-GaN etching is performed to expose the n-GaN 102' for 65 source electrodes, as depicted in
FIG. 2
FIGS. 2A and 2B show crystal planes in GaN wurtzite structure and schematics of the fin alignment direction, respectively.
FIG. 3
FIG. 3 is a schematic of a cross section of a GaN VC-JFET.
FIG. 4
performance graph
FIG. 4B shows I-V curves for the lateral p-n junctions between the gate and the source. The insets show schematics of the p-n junctions in GaN VC-JFETs.
A vertical-channel junction field-effect transistor com-prising: a doped GaN layer; an unintentionally doped GaN layer on the doped GaN layer; 55 a p-GaN regrowth layer on the unintentionally doped GaN layer, wherein portions of the p-GaN regrowth layer are separated by a vertical channel of the unintentionally doped GaN layer; gate electrodes in direct contact with the p-GaN regrowth layer; and a source electrode in direct contact with and overlapping with the p-GaN regrowth layer and the unintentionally doped GaN layer.
The vertical-channel junction field-effect transistor of claim 1, wherein the gate electrodes are separated by the vertical channel of the unintentionally doped GaN layer.
The vertical-channel junction field-effect transistor of claim 1, wherein the vertical channel defines 90° angles with respect to the p-GaN regrowth layer.
A vertical-channel junction field-effect transistor com-prising: a doped GaN layer; an unintentionally doped GaN layer on the doped GaN layer; a p-GaN regrowth layer on the unintentionally doped GaN layer, wherein portions of the p-GaN regrowth layer are separated by a vertical channel of the unintentionally doped GaN layer; and a source electrode in direct contact with and overlapping with the unintentionally doped GaN layer and the p-GaN regrowth layer.
The vertical-channel junction field-effect transistor of claim 10, wherein a regrowth interface is defined between the p-GaN regrowth layer and the unintentionally doped GaN layer.
The vertical-channel junction field-effect transistor of claim 10, wherein the vertical channel of the unintentionally doped GaN layer forms a vertical p-n junction at the regrowth interface between a gate electrode and a drain electrode.
The vertical-channel junction field-effect transistor of claim 10, further comprising a lateral p-n junction at the regrowth interface perpendicular to the vertical p-n junction, wherein the lateral p-n junction is between the gate electrode and the source electrode.
The vertical-channel junction field-effect transistor of claim 10, wherein the vertical channel defines 90° angles with respect to the p-GaN regrowth layer. ∗ ∗ ∗ ∗ ∗
Worked examples
Embodiments described in the patent, grouped by the materials and process steps they use.
Device Fabrication Example
example section example
7 materials5 process steps
Device epilayers grown by MOCVD with TMGa as Ga precursor and NH₃ as nitrogen source in H₂ carrier gas. A 4-µm-thick UID GaN homoepitaxially grown on heavily doped bulk GaN substrates. Cr (50 nm)/SiO₂ (700 nm) hard mask deposited. Fins patterned by EBL aligned to a-plane or m-plane. Cl₂/F₂-based RIE to define Cr and SiO₂ hard masks. Two-step ICP etching: 6-minute fast etch (~280 nm/min) and 3-minute slow etch (~20 nm/min). Hard mask residuals removed by Cr etchant and HF. Sample cleaned with 75°C 25% TMAH (5 min), piranha (15 min), UV-ozone (1 hr), BOE and 10% HCl (5 min). Samples re-loaded into MOCVD for p-GaN regrowth: 1 µm p-GaN (1×10¹⁷ cm⁻³) grown with Cp₂Mg as Mg precursor. p-GaN activated at 700°C for 20 minutes. Photoresist planarization used to selectively etch p-GaN on top of fin to expose n-GaN for source contacts. Gate electrodes Pd/Ni/Au (30/20/100 nm) formed by e-beam evaporation and annealed at 450°C for 5 minutes. Source and drain electrodes Ti/Al/Ni (30/100/30 nm) deposited by e-beam evaporation.
Device structures
Layer stacks claimed or described, ordered top of device to substrate.
GaN vertical-channel junction field-effect transistor (VC-JFET)
Ti/Al/Ni drain electrodedrain electrode
Ti/Al/Ni source electrodesource electrode
Pd/Ni/Au gate electrodegate electrode
GaNgate control regrowth
GaNchannel
GaNsubstrate/drain layer
Characterization
Measurements and analyses referenced in the patent, with their drawing references.
fet electrical
Fet Electrical
FIG. 1I. Top p-GaN etching is performed to expose the n-GaN 102' for 65 source electrodes, as depicted in
FIG. 4B shows I-V curves for the lateral p-n junctions between the gate and the source. The insets show schematics of the p-n junctions in GaN VC-JFETs.
FIG. 4B shows I-V curves for the lateral p-n junctions between the gate and the source. The insets show schematics of the p-n junctions in GaN VC-JFETs.
US 2013/0032814 A12013/0032814 A1 2/2013 Bour et al.
US 2013/0126888 A12013/0126888 A1 * 5/2013 Kizilyalli............ H01L 21/2654examiner
US 2013/0292686 A12013/0292686 A1 * 11/2013 Kizilyalli............ H01L 29/7832examiner
US 2014/0312355 A12014/0312355 A1 10/2014 Kizilyalli et al.
US 2015/0137137 A12015/0137137 A1 5/2015 Chowdhury et al.
US 2015/0255582 A12015/0255582 A1 * 9/2015 Romano............... H01L 29/205examiner
US 2018/0182882 A12018/0182882 A1 6/2018 Hashimoto et al.
US 2018/0190789 A12018/0190789 A1 * 7/2018 Bour................. H01L 29/66462examiner
US 2018/0219072 A12018/0219072 A1 * 8/2018 Ye....................... H01L 29/8083examiner
US 2019/0115448 A12019/0115448 A1 4/2019 Chowdhury et al.
US 2020/0144328 A12020/0144328 A1 5/2020 Fu et al.
US 2020/0273965 A12020/0273965 A1 8/2020 Kizilyalli et al.
US 2021/0104603 A12021/0104603 A1 4/2021 Zhao et al.
US 2021/0242281 A12021/0242281 A1 8/2021 Fu et al.
US 2021/0399125 A12021/0399125 A1 12/2021 Huang et al.
US 2022/0013671 A12022/0013671 A1 1/2022 Zhao et al.
Cited non-patent literature · 34
A Reverse Conducting GaN Vertical Junction Field Effect Transis- tor. (Year: 2020).
Determination of electronic band structure by electron holography of etched-and-regrown interfaces in GaN p-i-n diodes. Alugubelli et al., “Determination of electronic band structure by electron holography of etched-and-regrown interfaces in GaN p-i-n diodes,” Appl. Phys. Lett., 115(20):201602, Nov. 2019, 6 pages.
The 2018 GaN power electronics roadmap. Amano et al., “The 2018 GaN power electronics roadmap,” J. Phys. D. Appl. Phys., 51(16):163001, 2018, 49 pages.
Interfacial Impurities and Their Electronic Signa- tures in High-Voltage Regrown Nonpolar m-Plane GaN Vertical p-n Diodes. Aragon et al., “Interfacial Impurities and Their Electronic Signa- tures in High-Voltage Regrown Nonpolar m-Plane GaN Vertical p-n Diodes,” Phys. Status Solidi, 217:1900757, Dec. 2019, 7 pages.
Characterizations of nonlinear optical properties on GaN crystals in polar, nonpolar, and semipolar orientations. Chen et al., “Characterizations of nonlinear optical properties on GaN crystals in polar, nonpolar, and semipolar orientations,” Appl. Phys. Lett., 110(18):181110, May 2017, 5 pages.
Crystallographic orientation dependence of dopant and impurity incorporation in GaN films grown by metalorganic chemi- cal vapor deposition. Cruz et al., “Crystallographic orientation dependence of dopant and impurity incorporation in GaN films grown by metalorganic chemi- cal vapor deposition,” J. Cryst. Growth, 311(15):3817-3823, 2009.
Growth and Characterization of Vertical and Lateral p-n Junctions Formed by Selective-Area p-GaN MOVPE on Pat- terned Templates. Debald et al., “Growth and Characterization of Vertical and Lateral p-n Junctions Formed by Selective-Area p-GaN MOVPE on Pat- terned Templates,” Phys. Status Solidi, 216(2):1800677, Jan. 2019, 8 pages.
Analysis of low efficiency droop of semipolar InGaN quantum well light-emitting diodes by modified rate equation with weak phase-space filling effect. Fu et al., “Analysis of low efficiency droop of semipolar InGaN quantum well light-emitting diodes by modified rate equation with weak phase-space filling effect,” AIP Adv., 6(6):65013, Jun. 2016, 9 pages.
Demonstration of 1.27 kV Etch-Then-Regrow GaN p-n Junctions with Low Leakage for GaN Power Electronics. Fu et al., “Demonstration of 1.27 kV Etch-Then-Regrow GaN p-n Junctions with Low Leakage for GaN Power Electronics,” IEEE Electron Device Lett., 40(11):1728-1731, 2019.
High Voltage Vertical GaN p-n Diodes with Hydrogen- Plasma based Guard Rings. Fu et al., “High Voltage Vertical GaN p-n Diodes with Hydrogen- Plasma based Guard Rings,” IEEE Electron Device Lett., 41(1):127- 130, 2019.
Investigation of GaN-on-GaN vertical p-n diode with regrown p-GaN by metalorganic chemical vapor deposition. Fu et al., “Investigation of GaN-on-GaN vertical p-n diode with regrown p-GaN by metalorganic chemical vapor deposition,” Appl. Phys. Lett., 113(23):233502, Dec. 2018, 5 pages.
Reverse Leakage Analysis for As-Grown and Regrown Vertical GaN-on-GaN Schottky Barrier Diodes. Fu et al., “Reverse Leakage Analysis for As-Grown and Regrown Vertical GaN-on-GaN Schottky Barrier Diodes,” IEEE J. Electron Devices Soc., 8:74-83, 2020.
Ultralow turn-on voltage and on-resistance vertical GaN-on-GaN Schottky power diodes with high mobility double drift layers. Fu et al., “Ultralow turn-on voltage and on-resistance vertical GaN-on-GaN Schottky power diodes with high mobility double drift layers,” Appl. Phys. Lett., 111(15):152102, Oct. 2017, 6 pages.
1.1-kV Vertical GaN p-n Diodes With p-GaN Regrown by Molecular Beam Epitaxy. Hu et al., “1.1-kV Vertical GaN p-n Diodes With p-GaN Regrown by Molecular Beam Epitaxy,” IEEE Electron Device Lett., 38(8):1071- 1074, 2017.
Design of 1.2 kV Power Switches with Low Ron Using GaN-BasedVertical JFET. Ji et al., “Design of 1.2 kV Power Switches with Low Ron Using GaN-BasedVertical JFET,” IEEETrans. Electron Devices, 62(8):2571- 2578, 2015.
Review of Commercial GaN Power Devices and GaN-Based Converter Design Challenges. Jones et al., “Review of Commercial GaN Power Devices and GaN-Based Converter Design Challenges,” IEEE J. Emerg. Sel. Top. Power Electron., 4(3):707-719, 2016.
GaN-Based Trench Gate Metal Oxide Semicon- ductor Field-Effect Transistor Fabricated with Novel Wet Etching. Kodama et al., “GaN-Based Trench Gate Metal Oxide Semicon- ductor Field-Effect Transistor Fabricated with Novel Wet Etching,” Appl. Phys. Express, 1:21104, 2008, 3 pages.
Demonstration of a GaN-Based Vertical-Channel JFET Fabricated by Selective-Area Regrowth. Kotzea et al., “Demonstration of a GaN-Based Vertical-Channel JFET Fabricated by Selective-Area Regrowth,” IEEE Trans. Elec- tron Devices, 65(12):5329-5336, 2018.
Non-uniform Mg distribution in GaN epilayers grown on mesa structures for applications in GaN power electronics. Liu et al., “Non-uniform Mg distribution in GaN epilayers grown on mesa structures for applications in GaN power electronics,” Appl. Phys. Lett., 114(8):82102, Feb. 2019, 6 pages.
High-Voltage Regrown Nonpolar m-Plane Ver- tical p-n Diodes: A Step Toward Future Selective-Area-Doped Power Switches. Monavarian et al., “High-Voltage Regrown Nonpolar m-Plane Ver- tical p-n Diodes: A Step Toward Future Selective-Area-Doped Power Switches,” IEEE Electron Device Lett., 40(3):387-390, 2019.
P-type doping of GaN (0001) by magnesium ion implantation. Narita et al., “P-type doping of GaN (0001) by magnesium ion implantation,” Appl. Phys. Express, 10(1):016501, 2017, 5 pages.
1.5-kV and 2.2-m22.cm2 Vertical GaN Transistors on Bulk-GaN Substrates. Nie et al., “1.5-kV and 2.2-m22.cm2 Vertical GaN Transistors on Bulk-GaN Substrates,” IEEE Electron Device Lett., 35(9):939-941, 2014.
High carrier activation of Mg ion-implanted GaN by conventional rapid thermal annealing. Niwa et al., “High carrier activation of Mg ion-implanted GaN by conventional rapid thermal annealing,” Appl. Phys. Express, 10(9):091002, 2017, 5 pages.
1.8 mΩvcm2 vertical GaN-based trench metal-oxide- semiconductor field-effect transistors on a free-standing GaN sub- strate for 1.2-kV-class operation. Oka et al., “1.8 mΩvcm2 vertical GaN-based trench metal-oxide- semiconductor field-effect transistors on a free-standing GaN sub- strate for 1.2-kV-class operation,”Appl. Phys. Express, 8(5):054101, 2015, 4 pages.
Vertical GaN-Based Trench Gate Metal Oxide Semi- conductor Field-Effect Transistors on GaN Bulk Substrates. Otake et al., “Vertical GaN-Based Trench Gate Metal Oxide Semi- conductor Field-Effect Transistors on GaN Bulk Substrates,” Appl. Phys. Express, 1(1):011105, 2008, 4 pages.
Selective area growth and characterization of AlGaN/GaN heterojunction bipolar transistors by metalorganic chemi- cal vapor deposition. Shelton et al., “Selective area growth and characterization of AlGaN/GaN heterojunction bipolar transistors by metalorganic chemi- cal vapor deposition,” IEEE Trans. Electron Devices, 48(3):490- 494, 2001.
Realization of p-type gallium nitride by magnesium ion implantation for vertical power devices. Shi et al., “Realization of p-type gallium nitride by magnesium ion implantation for vertical power devices,” Sci. Rep., 9(1):8796, 2019, 9 pages.
High-Performance GaN Vertical Fin Power Transistors on Bulk GaN Substrates. Sun et al., “High-Performance GaN Vertical Fin Power Transistors on Bulk GaN Substrates,” IEEE Electron Device Lett., 38(4):509- 512, 2017.
Ultrawide-Bandgap Semiconductors: Research Oppor- tunities and Challenges. Tsao et al., “Ultrawide-Bandgap Semiconductors: Research Oppor- tunities and Challenges,” Adv. Electron. Mater., 4(1):1600501, Jan. 2018, 49 pages.
Selective-area regrowth of GaN field emission tips. Underwood et al., “Selective-area regrowth of GaN field emission tips,” Solid. State. Electron., 41(2):243-245, 1997.
Ion implanted GaN MISFETs fabricated in Mg implanted layers activated by conventional rapid thermal anneal- ing. Yoshino et al., “Ion implanted GaN MISFETs fabricated in Mg implanted layers activated by conventional rapid thermal anneal- ing,” Nucl. Inst. Methods Phys. Res. B, 449:49-53, 2019.
Large-Area 1.2-kV GaN Vertical Power FinFETs with a Record Switching Figure of Merit. Zhang et al., “Large-Area 1.2-kV GaN Vertical Power FinFETs with a Record Switching Figure of Merit,” IEEE Electron Device Lett., 40(1):75-78, 2019.
Trench formation and corner rounding in vertical GaN power devices. Zhang et al., “Trench formation and corner rounding in vertical GaN power devices,” Appl. Phys. Lett., 110(19):193506, May 2017, 5 pages.
Toward ultimate efficiency: progress and prospects on planar and 3D nanostructured nonpolar and semipolar InGaN light- emitting diodes. Zhao et al., “Toward ultimate efficiency: progress and prospects on planar and 3D nanostructured nonpolar and semipolar InGaN light- emitting diodes,” Adv. Opt. Photon., 10(1):246-308, Mar. 2018.
growth MOCVDsubstrate GaNcharacterization device performancecharacterization FET transport
FIG. 4B shows I-V curves for the lateral p-n junctions between the gate and the source. The insets show schematics of the p-n junctions in GaN VC-JFETs.
FIG. 4B shows I-V curves for the lateral p-n junctions between the gate and the source. The insets show schematics of the p-n junctions in GaN VC-JFETs.
US 2013/0032814 A12013/0032814 A1 2/2013 Bour et al.
US 2013/0126888 A12013/0126888 A1 * 5/2013 Kizilyalli............ H01L 21/2654examiner
US 2013/0292686 A12013/0292686 A1 * 11/2013 Kizilyalli............ H01L 29/7832examiner
US 2014/0312355 A12014/0312355 A1 10/2014 Kizilyalli et al.
US 2015/0137137 A12015/0137137 A1 5/2015 Chowdhury et al.
US 2015/0255582 A12015/0255582 A1 * 9/2015 Romano............... H01L 29/205examiner
US 2018/0182882 A12018/0182882 A1 6/2018 Hashimoto et al.
US 2018/0190789 A12018/0190789 A1 * 7/2018 Bour................. H01L 29/66462examiner
US 2018/0219072 A12018/0219072 A1 * 8/2018 Ye....................... H01L 29/8083examiner
US 2019/0115448 A12019/0115448 A1 4/2019 Chowdhury et al.
US 2020/0144328 A12020/0144328 A1 5/2020 Fu et al.
US 2020/0273965 A12020/0273965 A1 8/2020 Kizilyalli et al.
US 2021/0104603 A12021/0104603 A1 4/2021 Zhao et al.
US 2021/0242281 A12021/0242281 A1 8/2021 Fu et al.
US 2021/0399125 A12021/0399125 A1 12/2021 Huang et al.
US 2022/0013671 A12022/0013671 A1 1/2022 Zhao et al.
Cited non-patent literature · 34
A Reverse Conducting GaN Vertical Junction Field Effect Transis- tor. (Year: 2020).
Determination of electronic band structure by electron holography of etched-and-regrown interfaces in GaN p-i-n diodes. Alugubelli et al., “Determination of electronic band structure by electron holography of etched-and-regrown interfaces in GaN p-i-n diodes,” Appl. Phys. Lett., 115(20):201602, Nov. 2019, 6 pages.
The 2018 GaN power electronics roadmap. Amano et al., “The 2018 GaN power electronics roadmap,” J. Phys. D. Appl. Phys., 51(16):163001, 2018, 49 pages.
Interfacial Impurities and Their Electronic Signa- tures in High-Voltage Regrown Nonpolar m-Plane GaN Vertical p-n Diodes. Aragon et al., “Interfacial Impurities and Their Electronic Signa- tures in High-Voltage Regrown Nonpolar m-Plane GaN Vertical p-n Diodes,” Phys. Status Solidi, 217:1900757, Dec. 2019, 7 pages.
Characterizations of nonlinear optical properties on GaN crystals in polar, nonpolar, and semipolar orientations. Chen et al., “Characterizations of nonlinear optical properties on GaN crystals in polar, nonpolar, and semipolar orientations,” Appl. Phys. Lett., 110(18):181110, May 2017, 5 pages.
Crystallographic orientation dependence of dopant and impurity incorporation in GaN films grown by metalorganic chemi- cal vapor deposition. Cruz et al., “Crystallographic orientation dependence of dopant and impurity incorporation in GaN films grown by metalorganic chemi- cal vapor deposition,” J. Cryst. Growth, 311(15):3817-3823, 2009.
Growth and Characterization of Vertical and Lateral p-n Junctions Formed by Selective-Area p-GaN MOVPE on Pat- terned Templates. Debald et al., “Growth and Characterization of Vertical and Lateral p-n Junctions Formed by Selective-Area p-GaN MOVPE on Pat- terned Templates,” Phys. Status Solidi, 216(2):1800677, Jan. 2019, 8 pages.
Analysis of low efficiency droop of semipolar InGaN quantum well light-emitting diodes by modified rate equation with weak phase-space filling effect. Fu et al., “Analysis of low efficiency droop of semipolar InGaN quantum well light-emitting diodes by modified rate equation with weak phase-space filling effect,” AIP Adv., 6(6):65013, Jun. 2016, 9 pages.
Demonstration of 1.27 kV Etch-Then-Regrow GaN p-n Junctions with Low Leakage for GaN Power Electronics. Fu et al., “Demonstration of 1.27 kV Etch-Then-Regrow GaN p-n Junctions with Low Leakage for GaN Power Electronics,” IEEE Electron Device Lett., 40(11):1728-1731, 2019.
High Voltage Vertical GaN p-n Diodes with Hydrogen- Plasma based Guard Rings. Fu et al., “High Voltage Vertical GaN p-n Diodes with Hydrogen- Plasma based Guard Rings,” IEEE Electron Device Lett., 41(1):127- 130, 2019.
Investigation of GaN-on-GaN vertical p-n diode with regrown p-GaN by metalorganic chemical vapor deposition. Fu et al., “Investigation of GaN-on-GaN vertical p-n diode with regrown p-GaN by metalorganic chemical vapor deposition,” Appl. Phys. Lett., 113(23):233502, Dec. 2018, 5 pages.
Reverse Leakage Analysis for As-Grown and Regrown Vertical GaN-on-GaN Schottky Barrier Diodes. Fu et al., “Reverse Leakage Analysis for As-Grown and Regrown Vertical GaN-on-GaN Schottky Barrier Diodes,” IEEE J. Electron Devices Soc., 8:74-83, 2020.
Ultralow turn-on voltage and on-resistance vertical GaN-on-GaN Schottky power diodes with high mobility double drift layers. Fu et al., “Ultralow turn-on voltage and on-resistance vertical GaN-on-GaN Schottky power diodes with high mobility double drift layers,” Appl. Phys. Lett., 111(15):152102, Oct. 2017, 6 pages.
1.1-kV Vertical GaN p-n Diodes With p-GaN Regrown by Molecular Beam Epitaxy. Hu et al., “1.1-kV Vertical GaN p-n Diodes With p-GaN Regrown by Molecular Beam Epitaxy,” IEEE Electron Device Lett., 38(8):1071- 1074, 2017.
Design of 1.2 kV Power Switches with Low Ron Using GaN-BasedVertical JFET. Ji et al., “Design of 1.2 kV Power Switches with Low Ron Using GaN-BasedVertical JFET,” IEEETrans. Electron Devices, 62(8):2571- 2578, 2015.
Review of Commercial GaN Power Devices and GaN-Based Converter Design Challenges. Jones et al., “Review of Commercial GaN Power Devices and GaN-Based Converter Design Challenges,” IEEE J. Emerg. Sel. Top. Power Electron., 4(3):707-719, 2016.
GaN-Based Trench Gate Metal Oxide Semicon- ductor Field-Effect Transistor Fabricated with Novel Wet Etching. Kodama et al., “GaN-Based Trench Gate Metal Oxide Semicon- ductor Field-Effect Transistor Fabricated with Novel Wet Etching,” Appl. Phys. Express, 1:21104, 2008, 3 pages.
Demonstration of a GaN-Based Vertical-Channel JFET Fabricated by Selective-Area Regrowth. Kotzea et al., “Demonstration of a GaN-Based Vertical-Channel JFET Fabricated by Selective-Area Regrowth,” IEEE Trans. Elec- tron Devices, 65(12):5329-5336, 2018.
Non-uniform Mg distribution in GaN epilayers grown on mesa structures for applications in GaN power electronics. Liu et al., “Non-uniform Mg distribution in GaN epilayers grown on mesa structures for applications in GaN power electronics,” Appl. Phys. Lett., 114(8):82102, Feb. 2019, 6 pages.
High-Voltage Regrown Nonpolar m-Plane Ver- tical p-n Diodes: A Step Toward Future Selective-Area-Doped Power Switches. Monavarian et al., “High-Voltage Regrown Nonpolar m-Plane Ver- tical p-n Diodes: A Step Toward Future Selective-Area-Doped Power Switches,” IEEE Electron Device Lett., 40(3):387-390, 2019.
P-type doping of GaN (0001) by magnesium ion implantation. Narita et al., “P-type doping of GaN (0001) by magnesium ion implantation,” Appl. Phys. Express, 10(1):016501, 2017, 5 pages.
1.5-kV and 2.2-m22.cm2 Vertical GaN Transistors on Bulk-GaN Substrates. Nie et al., “1.5-kV and 2.2-m22.cm2 Vertical GaN Transistors on Bulk-GaN Substrates,” IEEE Electron Device Lett., 35(9):939-941, 2014.
High carrier activation of Mg ion-implanted GaN by conventional rapid thermal annealing. Niwa et al., “High carrier activation of Mg ion-implanted GaN by conventional rapid thermal annealing,” Appl. Phys. Express, 10(9):091002, 2017, 5 pages.
1.8 mΩvcm2 vertical GaN-based trench metal-oxide- semiconductor field-effect transistors on a free-standing GaN sub- strate for 1.2-kV-class operation. Oka et al., “1.8 mΩvcm2 vertical GaN-based trench metal-oxide- semiconductor field-effect transistors on a free-standing GaN sub- strate for 1.2-kV-class operation,”Appl. Phys. Express, 8(5):054101, 2015, 4 pages.
Vertical GaN-Based Trench Gate Metal Oxide Semi- conductor Field-Effect Transistors on GaN Bulk Substrates. Otake et al., “Vertical GaN-Based Trench Gate Metal Oxide Semi- conductor Field-Effect Transistors on GaN Bulk Substrates,” Appl. Phys. Express, 1(1):011105, 2008, 4 pages.
Selective area growth and characterization of AlGaN/GaN heterojunction bipolar transistors by metalorganic chemi- cal vapor deposition. Shelton et al., “Selective area growth and characterization of AlGaN/GaN heterojunction bipolar transistors by metalorganic chemi- cal vapor deposition,” IEEE Trans. Electron Devices, 48(3):490- 494, 2001.
Realization of p-type gallium nitride by magnesium ion implantation for vertical power devices. Shi et al., “Realization of p-type gallium nitride by magnesium ion implantation for vertical power devices,” Sci. Rep., 9(1):8796, 2019, 9 pages.
High-Performance GaN Vertical Fin Power Transistors on Bulk GaN Substrates. Sun et al., “High-Performance GaN Vertical Fin Power Transistors on Bulk GaN Substrates,” IEEE Electron Device Lett., 38(4):509- 512, 2017.
Ultrawide-Bandgap Semiconductors: Research Oppor- tunities and Challenges. Tsao et al., “Ultrawide-Bandgap Semiconductors: Research Oppor- tunities and Challenges,” Adv. Electron. Mater., 4(1):1600501, Jan. 2018, 49 pages.
Selective-area regrowth of GaN field emission tips. Underwood et al., “Selective-area regrowth of GaN field emission tips,” Solid. State. Electron., 41(2):243-245, 1997.
Ion implanted GaN MISFETs fabricated in Mg implanted layers activated by conventional rapid thermal anneal- ing. Yoshino et al., “Ion implanted GaN MISFETs fabricated in Mg implanted layers activated by conventional rapid thermal anneal- ing,” Nucl. Inst. Methods Phys. Res. B, 449:49-53, 2019.
Large-Area 1.2-kV GaN Vertical Power FinFETs with a Record Switching Figure of Merit. Zhang et al., “Large-Area 1.2-kV GaN Vertical Power FinFETs with a Record Switching Figure of Merit,” IEEE Electron Device Lett., 40(1):75-78, 2019.
Trench formation and corner rounding in vertical GaN power devices. Zhang et al., “Trench formation and corner rounding in vertical GaN power devices,” Appl. Phys. Lett., 110(19):193506, May 2017, 5 pages.
Toward ultimate efficiency: progress and prospects on planar and 3D nanostructured nonpolar and semipolar InGaN light- emitting diodes. Zhao et al., “Toward ultimate efficiency: progress and prospects on planar and 3D nanostructured nonpolar and semipolar InGaN light- emitting diodes,” Adv. Opt. Photon., 10(1):246-308, Mar. 2018.
growth MOCVDsubstrate GaNcharacterization device performancecharacterization FET transport
FIG. 4B shows I-V curves for the lateral p-n junctions between the gate and the source. The insets show schematics of the p-n junctions in GaN VC-JFETs.
FIG. 4B shows I-V curves for the lateral p-n junctions between the gate and the source. The insets show schematics of the p-n junctions in GaN VC-JFETs.
US 2013/0032814 A12013/0032814 A1 2/2013 Bour et al.
US 2013/0126888 A12013/0126888 A1 * 5/2013 Kizilyalli............ H01L 21/2654examiner
US 2013/0292686 A12013/0292686 A1 * 11/2013 Kizilyalli............ H01L 29/7832examiner
US 2014/0312355 A12014/0312355 A1 10/2014 Kizilyalli et al.
US 2015/0137137 A12015/0137137 A1 5/2015 Chowdhury et al.
US 2015/0255582 A12015/0255582 A1 * 9/2015 Romano............... H01L 29/205examiner
US 2018/0182882 A12018/0182882 A1 6/2018 Hashimoto et al.
US 2018/0190789 A12018/0190789 A1 * 7/2018 Bour................. H01L 29/66462examiner
US 2018/0219072 A12018/0219072 A1 * 8/2018 Ye....................... H01L 29/8083examiner
US 2019/0115448 A12019/0115448 A1 4/2019 Chowdhury et al.
US 2020/0144328 A12020/0144328 A1 5/2020 Fu et al.
US 2020/0273965 A12020/0273965 A1 8/2020 Kizilyalli et al.
US 2021/0104603 A12021/0104603 A1 4/2021 Zhao et al.
US 2021/0242281 A12021/0242281 A1 8/2021 Fu et al.
US 2021/0399125 A12021/0399125 A1 12/2021 Huang et al.
US 2022/0013671 A12022/0013671 A1 1/2022 Zhao et al.
Cited non-patent literature · 34
A Reverse Conducting GaN Vertical Junction Field Effect Transis- tor. (Year: 2020).
Determination of electronic band structure by electron holography of etched-and-regrown interfaces in GaN p-i-n diodes. Alugubelli et al., “Determination of electronic band structure by electron holography of etched-and-regrown interfaces in GaN p-i-n diodes,” Appl. Phys. Lett., 115(20):201602, Nov. 2019, 6 pages.
The 2018 GaN power electronics roadmap. Amano et al., “The 2018 GaN power electronics roadmap,” J. Phys. D. Appl. Phys., 51(16):163001, 2018, 49 pages.
Interfacial Impurities and Their Electronic Signa- tures in High-Voltage Regrown Nonpolar m-Plane GaN Vertical p-n Diodes. Aragon et al., “Interfacial Impurities and Their Electronic Signa- tures in High-Voltage Regrown Nonpolar m-Plane GaN Vertical p-n Diodes,” Phys. Status Solidi, 217:1900757, Dec. 2019, 7 pages.
Characterizations of nonlinear optical properties on GaN crystals in polar, nonpolar, and semipolar orientations. Chen et al., “Characterizations of nonlinear optical properties on GaN crystals in polar, nonpolar, and semipolar orientations,” Appl. Phys. Lett., 110(18):181110, May 2017, 5 pages.
Crystallographic orientation dependence of dopant and impurity incorporation in GaN films grown by metalorganic chemi- cal vapor deposition. Cruz et al., “Crystallographic orientation dependence of dopant and impurity incorporation in GaN films grown by metalorganic chemi- cal vapor deposition,” J. Cryst. Growth, 311(15):3817-3823, 2009.
Growth and Characterization of Vertical and Lateral p-n Junctions Formed by Selective-Area p-GaN MOVPE on Pat- terned Templates. Debald et al., “Growth and Characterization of Vertical and Lateral p-n Junctions Formed by Selective-Area p-GaN MOVPE on Pat- terned Templates,” Phys. Status Solidi, 216(2):1800677, Jan. 2019, 8 pages.
Analysis of low efficiency droop of semipolar InGaN quantum well light-emitting diodes by modified rate equation with weak phase-space filling effect. Fu et al., “Analysis of low efficiency droop of semipolar InGaN quantum well light-emitting diodes by modified rate equation with weak phase-space filling effect,” AIP Adv., 6(6):65013, Jun. 2016, 9 pages.
Demonstration of 1.27 kV Etch-Then-Regrow GaN p-n Junctions with Low Leakage for GaN Power Electronics. Fu et al., “Demonstration of 1.27 kV Etch-Then-Regrow GaN p-n Junctions with Low Leakage for GaN Power Electronics,” IEEE Electron Device Lett., 40(11):1728-1731, 2019.
High Voltage Vertical GaN p-n Diodes with Hydrogen- Plasma based Guard Rings. Fu et al., “High Voltage Vertical GaN p-n Diodes with Hydrogen- Plasma based Guard Rings,” IEEE Electron Device Lett., 41(1):127- 130, 2019.
Investigation of GaN-on-GaN vertical p-n diode with regrown p-GaN by metalorganic chemical vapor deposition. Fu et al., “Investigation of GaN-on-GaN vertical p-n diode with regrown p-GaN by metalorganic chemical vapor deposition,” Appl. Phys. Lett., 113(23):233502, Dec. 2018, 5 pages.
Reverse Leakage Analysis for As-Grown and Regrown Vertical GaN-on-GaN Schottky Barrier Diodes. Fu et al., “Reverse Leakage Analysis for As-Grown and Regrown Vertical GaN-on-GaN Schottky Barrier Diodes,” IEEE J. Electron Devices Soc., 8:74-83, 2020.
Ultralow turn-on voltage and on-resistance vertical GaN-on-GaN Schottky power diodes with high mobility double drift layers. Fu et al., “Ultralow turn-on voltage and on-resistance vertical GaN-on-GaN Schottky power diodes with high mobility double drift layers,” Appl. Phys. Lett., 111(15):152102, Oct. 2017, 6 pages.
1.1-kV Vertical GaN p-n Diodes With p-GaN Regrown by Molecular Beam Epitaxy. Hu et al., “1.1-kV Vertical GaN p-n Diodes With p-GaN Regrown by Molecular Beam Epitaxy,” IEEE Electron Device Lett., 38(8):1071- 1074, 2017.
Design of 1.2 kV Power Switches with Low Ron Using GaN-BasedVertical JFET. Ji et al., “Design of 1.2 kV Power Switches with Low Ron Using GaN-BasedVertical JFET,” IEEETrans. Electron Devices, 62(8):2571- 2578, 2015.
Review of Commercial GaN Power Devices and GaN-Based Converter Design Challenges. Jones et al., “Review of Commercial GaN Power Devices and GaN-Based Converter Design Challenges,” IEEE J. Emerg. Sel. Top. Power Electron., 4(3):707-719, 2016.
GaN-Based Trench Gate Metal Oxide Semicon- ductor Field-Effect Transistor Fabricated with Novel Wet Etching. Kodama et al., “GaN-Based Trench Gate Metal Oxide Semicon- ductor Field-Effect Transistor Fabricated with Novel Wet Etching,” Appl. Phys. Express, 1:21104, 2008, 3 pages.
Demonstration of a GaN-Based Vertical-Channel JFET Fabricated by Selective-Area Regrowth. Kotzea et al., “Demonstration of a GaN-Based Vertical-Channel JFET Fabricated by Selective-Area Regrowth,” IEEE Trans. Elec- tron Devices, 65(12):5329-5336, 2018.
Non-uniform Mg distribution in GaN epilayers grown on mesa structures for applications in GaN power electronics. Liu et al., “Non-uniform Mg distribution in GaN epilayers grown on mesa structures for applications in GaN power electronics,” Appl. Phys. Lett., 114(8):82102, Feb. 2019, 6 pages.
High-Voltage Regrown Nonpolar m-Plane Ver- tical p-n Diodes: A Step Toward Future Selective-Area-Doped Power Switches. Monavarian et al., “High-Voltage Regrown Nonpolar m-Plane Ver- tical p-n Diodes: A Step Toward Future Selective-Area-Doped Power Switches,” IEEE Electron Device Lett., 40(3):387-390, 2019.
P-type doping of GaN (0001) by magnesium ion implantation. Narita et al., “P-type doping of GaN (0001) by magnesium ion implantation,” Appl. Phys. Express, 10(1):016501, 2017, 5 pages.
1.5-kV and 2.2-m22.cm2 Vertical GaN Transistors on Bulk-GaN Substrates. Nie et al., “1.5-kV and 2.2-m22.cm2 Vertical GaN Transistors on Bulk-GaN Substrates,” IEEE Electron Device Lett., 35(9):939-941, 2014.
High carrier activation of Mg ion-implanted GaN by conventional rapid thermal annealing. Niwa et al., “High carrier activation of Mg ion-implanted GaN by conventional rapid thermal annealing,” Appl. Phys. Express, 10(9):091002, 2017, 5 pages.
1.8 mΩvcm2 vertical GaN-based trench metal-oxide- semiconductor field-effect transistors on a free-standing GaN sub- strate for 1.2-kV-class operation. Oka et al., “1.8 mΩvcm2 vertical GaN-based trench metal-oxide- semiconductor field-effect transistors on a free-standing GaN sub- strate for 1.2-kV-class operation,”Appl. Phys. Express, 8(5):054101, 2015, 4 pages.
Vertical GaN-Based Trench Gate Metal Oxide Semi- conductor Field-Effect Transistors on GaN Bulk Substrates. Otake et al., “Vertical GaN-Based Trench Gate Metal Oxide Semi- conductor Field-Effect Transistors on GaN Bulk Substrates,” Appl. Phys. Express, 1(1):011105, 2008, 4 pages.
Selective area growth and characterization of AlGaN/GaN heterojunction bipolar transistors by metalorganic chemi- cal vapor deposition. Shelton et al., “Selective area growth and characterization of AlGaN/GaN heterojunction bipolar transistors by metalorganic chemi- cal vapor deposition,” IEEE Trans. Electron Devices, 48(3):490- 494, 2001.
Realization of p-type gallium nitride by magnesium ion implantation for vertical power devices. Shi et al., “Realization of p-type gallium nitride by magnesium ion implantation for vertical power devices,” Sci. Rep., 9(1):8796, 2019, 9 pages.
High-Performance GaN Vertical Fin Power Transistors on Bulk GaN Substrates. Sun et al., “High-Performance GaN Vertical Fin Power Transistors on Bulk GaN Substrates,” IEEE Electron Device Lett., 38(4):509- 512, 2017.
Ultrawide-Bandgap Semiconductors: Research Oppor- tunities and Challenges. Tsao et al., “Ultrawide-Bandgap Semiconductors: Research Oppor- tunities and Challenges,” Adv. Electron. Mater., 4(1):1600501, Jan. 2018, 49 pages.
Selective-area regrowth of GaN field emission tips. Underwood et al., “Selective-area regrowth of GaN field emission tips,” Solid. State. Electron., 41(2):243-245, 1997.
Ion implanted GaN MISFETs fabricated in Mg implanted layers activated by conventional rapid thermal anneal- ing. Yoshino et al., “Ion implanted GaN MISFETs fabricated in Mg implanted layers activated by conventional rapid thermal anneal- ing,” Nucl. Inst. Methods Phys. Res. B, 449:49-53, 2019.
Large-Area 1.2-kV GaN Vertical Power FinFETs with a Record Switching Figure of Merit. Zhang et al., “Large-Area 1.2-kV GaN Vertical Power FinFETs with a Record Switching Figure of Merit,” IEEE Electron Device Lett., 40(1):75-78, 2019.
Trench formation and corner rounding in vertical GaN power devices. Zhang et al., “Trench formation and corner rounding in vertical GaN power devices,” Appl. Phys. Lett., 110(19):193506, May 2017, 5 pages.
Toward ultimate efficiency: progress and prospects on planar and 3D nanostructured nonpolar and semipolar InGaN light- emitting diodes. Zhao et al., “Toward ultimate efficiency: progress and prospects on planar and 3D nanostructured nonpolar and semipolar InGaN light- emitting diodes,” Adv. Opt. Photon., 10(1):246-308, Mar. 2018.
growth MOCVDsubstrate GaNcharacterization device performancecharacterization FET transport
FIG. 4B shows I-V curves for the lateral p-n junctions between the gate and the source. The insets show schematics of the p-n junctions in GaN VC-JFETs.
FIG. 4B shows I-V curves for the lateral p-n junctions between the gate and the source. The insets show schematics of the p-n junctions in GaN VC-JFETs.
US 2013/0032814 A12013/0032814 A1 2/2013 Bour et al.
US 2013/0126888 A12013/0126888 A1 * 5/2013 Kizilyalli............ H01L 21/2654examiner
US 2013/0292686 A12013/0292686 A1 * 11/2013 Kizilyalli............ H01L 29/7832examiner
US 2014/0312355 A12014/0312355 A1 10/2014 Kizilyalli et al.
US 2015/0137137 A12015/0137137 A1 5/2015 Chowdhury et al.
US 2015/0255582 A12015/0255582 A1 * 9/2015 Romano............... H01L 29/205examiner
US 2018/0182882 A12018/0182882 A1 6/2018 Hashimoto et al.
US 2018/0190789 A12018/0190789 A1 * 7/2018 Bour................. H01L 29/66462examiner
US 2018/0219072 A12018/0219072 A1 * 8/2018 Ye....................... H01L 29/8083examiner
US 2019/0115448 A12019/0115448 A1 4/2019 Chowdhury et al.
US 2020/0144328 A12020/0144328 A1 5/2020 Fu et al.
US 2020/0273965 A12020/0273965 A1 8/2020 Kizilyalli et al.
US 2021/0104603 A12021/0104603 A1 4/2021 Zhao et al.
US 2021/0242281 A12021/0242281 A1 8/2021 Fu et al.
US 2021/0399125 A12021/0399125 A1 12/2021 Huang et al.
US 2022/0013671 A12022/0013671 A1 1/2022 Zhao et al.
Cited non-patent literature · 34
A Reverse Conducting GaN Vertical Junction Field Effect Transis- tor. (Year: 2020).
Determination of electronic band structure by electron holography of etched-and-regrown interfaces in GaN p-i-n diodes. Alugubelli et al., “Determination of electronic band structure by electron holography of etched-and-regrown interfaces in GaN p-i-n diodes,” Appl. Phys. Lett., 115(20):201602, Nov. 2019, 6 pages.
The 2018 GaN power electronics roadmap. Amano et al., “The 2018 GaN power electronics roadmap,” J. Phys. D. Appl. Phys., 51(16):163001, 2018, 49 pages.
Interfacial Impurities and Their Electronic Signa- tures in High-Voltage Regrown Nonpolar m-Plane GaN Vertical p-n Diodes. Aragon et al., “Interfacial Impurities and Their Electronic Signa- tures in High-Voltage Regrown Nonpolar m-Plane GaN Vertical p-n Diodes,” Phys. Status Solidi, 217:1900757, Dec. 2019, 7 pages.
Characterizations of nonlinear optical properties on GaN crystals in polar, nonpolar, and semipolar orientations. Chen et al., “Characterizations of nonlinear optical properties on GaN crystals in polar, nonpolar, and semipolar orientations,” Appl. Phys. Lett., 110(18):181110, May 2017, 5 pages.
Crystallographic orientation dependence of dopant and impurity incorporation in GaN films grown by metalorganic chemi- cal vapor deposition. Cruz et al., “Crystallographic orientation dependence of dopant and impurity incorporation in GaN films grown by metalorganic chemi- cal vapor deposition,” J. Cryst. Growth, 311(15):3817-3823, 2009.
Growth and Characterization of Vertical and Lateral p-n Junctions Formed by Selective-Area p-GaN MOVPE on Pat- terned Templates. Debald et al., “Growth and Characterization of Vertical and Lateral p-n Junctions Formed by Selective-Area p-GaN MOVPE on Pat- terned Templates,” Phys. Status Solidi, 216(2):1800677, Jan. 2019, 8 pages.
Analysis of low efficiency droop of semipolar InGaN quantum well light-emitting diodes by modified rate equation with weak phase-space filling effect. Fu et al., “Analysis of low efficiency droop of semipolar InGaN quantum well light-emitting diodes by modified rate equation with weak phase-space filling effect,” AIP Adv., 6(6):65013, Jun. 2016, 9 pages.
Demonstration of 1.27 kV Etch-Then-Regrow GaN p-n Junctions with Low Leakage for GaN Power Electronics. Fu et al., “Demonstration of 1.27 kV Etch-Then-Regrow GaN p-n Junctions with Low Leakage for GaN Power Electronics,” IEEE Electron Device Lett., 40(11):1728-1731, 2019.
High Voltage Vertical GaN p-n Diodes with Hydrogen- Plasma based Guard Rings. Fu et al., “High Voltage Vertical GaN p-n Diodes with Hydrogen- Plasma based Guard Rings,” IEEE Electron Device Lett., 41(1):127- 130, 2019.
Investigation of GaN-on-GaN vertical p-n diode with regrown p-GaN by metalorganic chemical vapor deposition. Fu et al., “Investigation of GaN-on-GaN vertical p-n diode with regrown p-GaN by metalorganic chemical vapor deposition,” Appl. Phys. Lett., 113(23):233502, Dec. 2018, 5 pages.
Reverse Leakage Analysis for As-Grown and Regrown Vertical GaN-on-GaN Schottky Barrier Diodes. Fu et al., “Reverse Leakage Analysis for As-Grown and Regrown Vertical GaN-on-GaN Schottky Barrier Diodes,” IEEE J. Electron Devices Soc., 8:74-83, 2020.
Ultralow turn-on voltage and on-resistance vertical GaN-on-GaN Schottky power diodes with high mobility double drift layers. Fu et al., “Ultralow turn-on voltage and on-resistance vertical GaN-on-GaN Schottky power diodes with high mobility double drift layers,” Appl. Phys. Lett., 111(15):152102, Oct. 2017, 6 pages.
1.1-kV Vertical GaN p-n Diodes With p-GaN Regrown by Molecular Beam Epitaxy. Hu et al., “1.1-kV Vertical GaN p-n Diodes With p-GaN Regrown by Molecular Beam Epitaxy,” IEEE Electron Device Lett., 38(8):1071- 1074, 2017.
Design of 1.2 kV Power Switches with Low Ron Using GaN-BasedVertical JFET. Ji et al., “Design of 1.2 kV Power Switches with Low Ron Using GaN-BasedVertical JFET,” IEEETrans. Electron Devices, 62(8):2571- 2578, 2015.
Review of Commercial GaN Power Devices and GaN-Based Converter Design Challenges. Jones et al., “Review of Commercial GaN Power Devices and GaN-Based Converter Design Challenges,” IEEE J. Emerg. Sel. Top. Power Electron., 4(3):707-719, 2016.
GaN-Based Trench Gate Metal Oxide Semicon- ductor Field-Effect Transistor Fabricated with Novel Wet Etching. Kodama et al., “GaN-Based Trench Gate Metal Oxide Semicon- ductor Field-Effect Transistor Fabricated with Novel Wet Etching,” Appl. Phys. Express, 1:21104, 2008, 3 pages.
Demonstration of a GaN-Based Vertical-Channel JFET Fabricated by Selective-Area Regrowth. Kotzea et al., “Demonstration of a GaN-Based Vertical-Channel JFET Fabricated by Selective-Area Regrowth,” IEEE Trans. Elec- tron Devices, 65(12):5329-5336, 2018.
Non-uniform Mg distribution in GaN epilayers grown on mesa structures for applications in GaN power electronics. Liu et al., “Non-uniform Mg distribution in GaN epilayers grown on mesa structures for applications in GaN power electronics,” Appl. Phys. Lett., 114(8):82102, Feb. 2019, 6 pages.
High-Voltage Regrown Nonpolar m-Plane Ver- tical p-n Diodes: A Step Toward Future Selective-Area-Doped Power Switches. Monavarian et al., “High-Voltage Regrown Nonpolar m-Plane Ver- tical p-n Diodes: A Step Toward Future Selective-Area-Doped Power Switches,” IEEE Electron Device Lett., 40(3):387-390, 2019.
P-type doping of GaN (0001) by magnesium ion implantation. Narita et al., “P-type doping of GaN (0001) by magnesium ion implantation,” Appl. Phys. Express, 10(1):016501, 2017, 5 pages.
1.5-kV and 2.2-m22.cm2 Vertical GaN Transistors on Bulk-GaN Substrates. Nie et al., “1.5-kV and 2.2-m22.cm2 Vertical GaN Transistors on Bulk-GaN Substrates,” IEEE Electron Device Lett., 35(9):939-941, 2014.
High carrier activation of Mg ion-implanted GaN by conventional rapid thermal annealing. Niwa et al., “High carrier activation of Mg ion-implanted GaN by conventional rapid thermal annealing,” Appl. Phys. Express, 10(9):091002, 2017, 5 pages.
1.8 mΩvcm2 vertical GaN-based trench metal-oxide- semiconductor field-effect transistors on a free-standing GaN sub- strate for 1.2-kV-class operation. Oka et al., “1.8 mΩvcm2 vertical GaN-based trench metal-oxide- semiconductor field-effect transistors on a free-standing GaN sub- strate for 1.2-kV-class operation,”Appl. Phys. Express, 8(5):054101, 2015, 4 pages.
Vertical GaN-Based Trench Gate Metal Oxide Semi- conductor Field-Effect Transistors on GaN Bulk Substrates. Otake et al., “Vertical GaN-Based Trench Gate Metal Oxide Semi- conductor Field-Effect Transistors on GaN Bulk Substrates,” Appl. Phys. Express, 1(1):011105, 2008, 4 pages.
Selective area growth and characterization of AlGaN/GaN heterojunction bipolar transistors by metalorganic chemi- cal vapor deposition. Shelton et al., “Selective area growth and characterization of AlGaN/GaN heterojunction bipolar transistors by metalorganic chemi- cal vapor deposition,” IEEE Trans. Electron Devices, 48(3):490- 494, 2001.
Realization of p-type gallium nitride by magnesium ion implantation for vertical power devices. Shi et al., “Realization of p-type gallium nitride by magnesium ion implantation for vertical power devices,” Sci. Rep., 9(1):8796, 2019, 9 pages.
High-Performance GaN Vertical Fin Power Transistors on Bulk GaN Substrates. Sun et al., “High-Performance GaN Vertical Fin Power Transistors on Bulk GaN Substrates,” IEEE Electron Device Lett., 38(4):509- 512, 2017.
Ultrawide-Bandgap Semiconductors: Research Oppor- tunities and Challenges. Tsao et al., “Ultrawide-Bandgap Semiconductors: Research Oppor- tunities and Challenges,” Adv. Electron. Mater., 4(1):1600501, Jan. 2018, 49 pages.
Selective-area regrowth of GaN field emission tips. Underwood et al., “Selective-area regrowth of GaN field emission tips,” Solid. State. Electron., 41(2):243-245, 1997.
Ion implanted GaN MISFETs fabricated in Mg implanted layers activated by conventional rapid thermal anneal- ing. Yoshino et al., “Ion implanted GaN MISFETs fabricated in Mg implanted layers activated by conventional rapid thermal anneal- ing,” Nucl. Inst. Methods Phys. Res. B, 449:49-53, 2019.
Large-Area 1.2-kV GaN Vertical Power FinFETs with a Record Switching Figure of Merit. Zhang et al., “Large-Area 1.2-kV GaN Vertical Power FinFETs with a Record Switching Figure of Merit,” IEEE Electron Device Lett., 40(1):75-78, 2019.
Trench formation and corner rounding in vertical GaN power devices. Zhang et al., “Trench formation and corner rounding in vertical GaN power devices,” Appl. Phys. Lett., 110(19):193506, May 2017, 5 pages.
Toward ultimate efficiency: progress and prospects on planar and 3D nanostructured nonpolar and semipolar InGaN light- emitting diodes. Zhao et al., “Toward ultimate efficiency: progress and prospects on planar and 3D nanostructured nonpolar and semipolar InGaN light- emitting diodes,” Adv. Opt. Photon., 10(1):246-308, Mar. 2018.
growth MOCVDsubstrate GaNcharacterization device performancecharacterization FET transport