Patent
Atlas literature
Patent
US 11,990,343 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 illustrates an example electrode structure during a manufacturing process for a device using reactive evapora- tive liftoff of layers.
FIGS. 2A and 2B illustrate example electrode structures for devices during manufacturing process steps according to various embodiments described herein.
FIGS. 3A and 3B illustrate the example electrode struc- tures with photoresist masks removed at a manufacturing process step after
FIGS. 4A and 4B illustrate the example electrode struc- tures after sputtering layers at a manufacturing process step after
FIGS. 5A and 5B illustrate the example electrode struc- 5 tures with a cap photoresist in place at a manufacturing process step after
FIGS. 6A and 6B illustrate the final electrode structures for the devices according to various embodiments described 10 herein.
FIG. 7 illustrates an example method of forming the electrode structures shown in
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of manufacturing an electrode structure for a device, comprising: forming an opening in a silicon nitride layer to expose a surface region of a substrate through the opening; forming a photoresist layer over the silicon nitride layer and around the opening in the silicon nitride layer, the photoresist layer comprising a mask opening; depositing a gate metal layer through the mask opening and onto the surface region of the substrate; removing the photoresist layer; and depositing a barrier metal layer over the gate metal layer and the silicon nitride layer.
The method according to claim 1, wherein depositing the gate metal layer comprises depositing the gate metal layer using reactive evaporation.
The method according to claim 1, wherein the gate metal layer comprises at least one of nickel, tungsten, platinum, palladium, and tungsten nitride.
The method according to claim 1, wherein depositing the gate metal layer comprises: depositing a first gate metal layer using reactive evapo-ration; and depositing a second gate metal layer using reactive evapo-ration.
The method according to claim 1, wherein depositing the barrier metal layer comprises sputtering tungsten nitride over the gate metal layer, a top surface of the silicon nitride layer, and at least a portion of a step around the opening in the silicon nitride layer.
The method according to claim 1, further comprising: depositing a conductive metal layer on the barrier metal layer; and depositing a cap metal layer on the conductive metal layer.
The method according to claim 1, wherein the pho-toresist layer comprises a first photoresist layer and a second photoresist layer, the second photoresist layer comprising an undercut profile for liftoff.
The method according to claim 1, wherein the substrate comprises a substrate of gallium nitride, aluminum gallium nitride, or a combination of gallium nitride and aluminum gallium nitride.
A gate metal formation, comprising: a silicon nitride layer comprising an opening in the silicon nitride layer that exposes a surface region of a substrate, the opening comprising a step around the open-ing; a gate metal layer on the surface region of the substrate and at least a portion of the silicon nitride layer; 20 a barrier metal layer on the gate metal layer, on a top surface of the silicon nitride layer, and on at least a portion of the step around the opening in the silicon nitride layer; and a conductive metal layer on the barrier metal layer.
The gate metal formation according to claim 12, wherein: the gate metal layer is deposited using reactive evapora-tion; and the barrier metal layer is deposited using sputtering.
The gate metal formation according to claim 12, wherein the gate metal layer comprises at least one of nickel, tungsten, platinum, palladium, and tungsten nitride.
The gate metal formation according claim 12, wherein the gate metal layer comprises a first gate metal layer and a second gate metal layer.
The gate metal formation according to claim 12, wherein the barrier metal layer comprises tungsten nitride.
The gate metal formation according to claim 12, further comprising a cap metal layer on the conductive metal layer.
The gate metal formation according to claim 12, wherein the substrate comprises a substrate of gallium nitride, aluminum gallium nitride, or a combination of gallium nitride and aluminum gallium nitride.
The gate metal formation according to claim 12, wherein the gate metal formation comprises a gate con-nected field plate (GCFP) formed on the substrate with a width of about 1.1 microns. ∗ ∗ ∗ ∗ ∗
Layer stacks claimed or described, ordered top of device to substrate.
gate electrode structure for GaN/AlGaN HEMT
gate connected field plate (GCFP)
No layer stack recorded.
Materials described outside the worked examples.
silicon nitride
Si₃N₄
gate metal layer
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 6000–7000 Å | — |
Thickness | 900–1025 Å |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 12
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,990,343 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 illustrates an example electrode structure during a manufacturing process for a device using reactive evapora- tive liftoff of layers.
FIGS. 2A and 2B illustrate example electrode structures for devices during manufacturing process steps according to various embodiments described herein.
FIGS. 3A and 3B illustrate the example electrode struc- tures with photoresist masks removed at a manufacturing process step after
FIGS. 4A and 4B illustrate the example electrode struc- tures after sputtering layers at a manufacturing process step after
FIGS. 5A and 5B illustrate the example electrode struc- 5 tures with a cap photoresist in place at a manufacturing process step after
FIGS. 6A and 6B illustrate the final electrode structures for the devices according to various embodiments described 10 herein.
FIG. 7 illustrates an example method of forming the electrode structures shown in
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of manufacturing an electrode structure for a device, comprising: forming an opening in a silicon nitride layer to expose a surface region of a substrate through the opening; forming a photoresist layer over the silicon nitride layer and around the opening in the silicon nitride layer, the photoresist layer comprising a mask opening; depositing a gate metal layer through the mask opening and onto the surface region of the substrate; removing the photoresist layer; and depositing a barrier metal layer over the gate metal layer and the silicon nitride layer.
The method according to claim 1, wherein depositing the gate metal layer comprises depositing the gate metal layer using reactive evaporation.
The method according to claim 1, wherein the gate metal layer comprises at least one of nickel, tungsten, platinum, palladium, and tungsten nitride.
The method according to claim 1, wherein depositing the gate metal layer comprises: depositing a first gate metal layer using reactive evapo-ration; and depositing a second gate metal layer using reactive evapo-ration.
The method according to claim 1, wherein depositing the barrier metal layer comprises sputtering tungsten nitride over the gate metal layer, a top surface of the silicon nitride layer, and at least a portion of a step around the opening in the silicon nitride layer.
The method according to claim 1, further comprising: depositing a conductive metal layer on the barrier metal layer; and depositing a cap metal layer on the conductive metal layer.
The method according to claim 1, wherein the pho-toresist layer comprises a first photoresist layer and a second photoresist layer, the second photoresist layer comprising an undercut profile for liftoff.
The method according to claim 1, wherein the substrate comprises a substrate of gallium nitride, aluminum gallium nitride, or a combination of gallium nitride and aluminum gallium nitride.
A gate metal formation, comprising: a silicon nitride layer comprising an opening in the silicon nitride layer that exposes a surface region of a substrate, the opening comprising a step around the open-ing; a gate metal layer on the surface region of the substrate and at least a portion of the silicon nitride layer; 20 a barrier metal layer on the gate metal layer, on a top surface of the silicon nitride layer, and on at least a portion of the step around the opening in the silicon nitride layer; and a conductive metal layer on the barrier metal layer.
The gate metal formation according to claim 12, wherein: the gate metal layer is deposited using reactive evapora-tion; and the barrier metal layer is deposited using sputtering.
The gate metal formation according to claim 12, wherein the gate metal layer comprises at least one of nickel, tungsten, platinum, palladium, and tungsten nitride.
The gate metal formation according claim 12, wherein the gate metal layer comprises a first gate metal layer and a second gate metal layer.
The gate metal formation according to claim 12, wherein the barrier metal layer comprises tungsten nitride.
The gate metal formation according to claim 12, further comprising a cap metal layer on the conductive metal layer.
The gate metal formation according to claim 12, wherein the substrate comprises a substrate of gallium nitride, aluminum gallium nitride, or a combination of gallium nitride and aluminum gallium nitride.
The gate metal formation according to claim 12, wherein the gate metal formation comprises a gate con-nected field plate (GCFP) formed on the substrate with a width of about 1.1 microns. ∗ ∗ ∗ ∗ ∗
Layer stacks claimed or described, ordered top of device to substrate.
gate electrode structure for GaN/AlGaN HEMT
gate connected field plate (GCFP)
No layer stack recorded.
Materials described outside the worked examples.
silicon nitride
Si₃N₄
gate metal layer
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 6000–7000 Å | — |
Thickness | 900–1025 Å |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 12
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,990,343 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 illustrates an example electrode structure during a manufacturing process for a device using reactive evapora- tive liftoff of layers.
FIGS. 2A and 2B illustrate example electrode structures for devices during manufacturing process steps according to various embodiments described herein.
FIGS. 3A and 3B illustrate the example electrode struc- tures with photoresist masks removed at a manufacturing process step after
FIGS. 4A and 4B illustrate the example electrode struc- tures after sputtering layers at a manufacturing process step after
FIGS. 5A and 5B illustrate the example electrode struc- 5 tures with a cap photoresist in place at a manufacturing process step after
FIGS. 6A and 6B illustrate the final electrode structures for the devices according to various embodiments described 10 herein.
FIG. 7 illustrates an example method of forming the electrode structures shown in
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of manufacturing an electrode structure for a device, comprising: forming an opening in a silicon nitride layer to expose a surface region of a substrate through the opening; forming a photoresist layer over the silicon nitride layer and around the opening in the silicon nitride layer, the photoresist layer comprising a mask opening; depositing a gate metal layer through the mask opening and onto the surface region of the substrate; removing the photoresist layer; and depositing a barrier metal layer over the gate metal layer and the silicon nitride layer.
The method according to claim 1, wherein depositing the gate metal layer comprises depositing the gate metal layer using reactive evaporation.
The method according to claim 1, wherein the gate metal layer comprises at least one of nickel, tungsten, platinum, palladium, and tungsten nitride.
The method according to claim 1, wherein depositing the gate metal layer comprises: depositing a first gate metal layer using reactive evapo-ration; and depositing a second gate metal layer using reactive evapo-ration.
The method according to claim 1, wherein depositing the barrier metal layer comprises sputtering tungsten nitride over the gate metal layer, a top surface of the silicon nitride layer, and at least a portion of a step around the opening in the silicon nitride layer.
The method according to claim 1, further comprising: depositing a conductive metal layer on the barrier metal layer; and depositing a cap metal layer on the conductive metal layer.
The method according to claim 1, wherein the pho-toresist layer comprises a first photoresist layer and a second photoresist layer, the second photoresist layer comprising an undercut profile for liftoff.
The method according to claim 1, wherein the substrate comprises a substrate of gallium nitride, aluminum gallium nitride, or a combination of gallium nitride and aluminum gallium nitride.
A gate metal formation, comprising: a silicon nitride layer comprising an opening in the silicon nitride layer that exposes a surface region of a substrate, the opening comprising a step around the open-ing; a gate metal layer on the surface region of the substrate and at least a portion of the silicon nitride layer; 20 a barrier metal layer on the gate metal layer, on a top surface of the silicon nitride layer, and on at least a portion of the step around the opening in the silicon nitride layer; and a conductive metal layer on the barrier metal layer.
The gate metal formation according to claim 12, wherein: the gate metal layer is deposited using reactive evapora-tion; and the barrier metal layer is deposited using sputtering.
The gate metal formation according to claim 12, wherein the gate metal layer comprises at least one of nickel, tungsten, platinum, palladium, and tungsten nitride.
The gate metal formation according claim 12, wherein the gate metal layer comprises a first gate metal layer and a second gate metal layer.
The gate metal formation according to claim 12, wherein the barrier metal layer comprises tungsten nitride.
The gate metal formation according to claim 12, further comprising a cap metal layer on the conductive metal layer.
The gate metal formation according to claim 12, wherein the substrate comprises a substrate of gallium nitride, aluminum gallium nitride, or a combination of gallium nitride and aluminum gallium nitride.
The gate metal formation according to claim 12, wherein the gate metal formation comprises a gate con-nected field plate (GCFP) formed on the substrate with a width of about 1.1 microns. ∗ ∗ ∗ ∗ ∗
Layer stacks claimed or described, ordered top of device to substrate.
gate electrode structure for GaN/AlGaN HEMT
gate connected field plate (GCFP)
No layer stack recorded.
Materials described outside the worked examples.
silicon nitride
Si₃N₄
gate metal layer
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 6000–7000 Å | — |
Thickness | 900–1025 Å |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 12
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 11,990,343 B2Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 illustrates an example electrode structure during a manufacturing process for a device using reactive evapora- tive liftoff of layers.
FIGS. 2A and 2B illustrate example electrode structures for devices during manufacturing process steps according to various embodiments described herein.
FIGS. 3A and 3B illustrate the example electrode struc- tures with photoresist masks removed at a manufacturing process step after
FIGS. 4A and 4B illustrate the example electrode struc- tures after sputtering layers at a manufacturing process step after
FIGS. 5A and 5B illustrate the example electrode struc- 5 tures with a cap photoresist in place at a manufacturing process step after
FIGS. 6A and 6B illustrate the final electrode structures for the devices according to various embodiments described 10 herein.
FIG. 7 illustrates an example method of forming the electrode structures shown in
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method of manufacturing an electrode structure for a device, comprising: forming an opening in a silicon nitride layer to expose a surface region of a substrate through the opening; forming a photoresist layer over the silicon nitride layer and around the opening in the silicon nitride layer, the photoresist layer comprising a mask opening; depositing a gate metal layer through the mask opening and onto the surface region of the substrate; removing the photoresist layer; and depositing a barrier metal layer over the gate metal layer and the silicon nitride layer.
The method according to claim 1, wherein depositing the gate metal layer comprises depositing the gate metal layer using reactive evaporation.
The method according to claim 1, wherein the gate metal layer comprises at least one of nickel, tungsten, platinum, palladium, and tungsten nitride.
The method according to claim 1, wherein depositing the gate metal layer comprises: depositing a first gate metal layer using reactive evapo-ration; and depositing a second gate metal layer using reactive evapo-ration.
The method according to claim 1, wherein depositing the barrier metal layer comprises sputtering tungsten nitride over the gate metal layer, a top surface of the silicon nitride layer, and at least a portion of a step around the opening in the silicon nitride layer.
The method according to claim 1, further comprising: depositing a conductive metal layer on the barrier metal layer; and depositing a cap metal layer on the conductive metal layer.
The method according to claim 1, wherein the pho-toresist layer comprises a first photoresist layer and a second photoresist layer, the second photoresist layer comprising an undercut profile for liftoff.
The method according to claim 1, wherein the substrate comprises a substrate of gallium nitride, aluminum gallium nitride, or a combination of gallium nitride and aluminum gallium nitride.
A gate metal formation, comprising: a silicon nitride layer comprising an opening in the silicon nitride layer that exposes a surface region of a substrate, the opening comprising a step around the open-ing; a gate metal layer on the surface region of the substrate and at least a portion of the silicon nitride layer; 20 a barrier metal layer on the gate metal layer, on a top surface of the silicon nitride layer, and on at least a portion of the step around the opening in the silicon nitride layer; and a conductive metal layer on the barrier metal layer.
The gate metal formation according to claim 12, wherein: the gate metal layer is deposited using reactive evapora-tion; and the barrier metal layer is deposited using sputtering.
The gate metal formation according to claim 12, wherein the gate metal layer comprises at least one of nickel, tungsten, platinum, palladium, and tungsten nitride.
The gate metal formation according claim 12, wherein the gate metal layer comprises a first gate metal layer and a second gate metal layer.
The gate metal formation according to claim 12, wherein the barrier metal layer comprises tungsten nitride.
The gate metal formation according to claim 12, further comprising a cap metal layer on the conductive metal layer.
The gate metal formation according to claim 12, wherein the substrate comprises a substrate of gallium nitride, aluminum gallium nitride, or a combination of gallium nitride and aluminum gallium nitride.
The gate metal formation according to claim 12, wherein the gate metal formation comprises a gate con-nected field plate (GCFP) formed on the substrate with a width of about 1.1 microns. ∗ ∗ ∗ ∗ ∗
Layer stacks claimed or described, ordered top of device to substrate.
gate electrode structure for GaN/AlGaN HEMT
gate connected field plate (GCFP)
No layer stack recorded.
Materials described outside the worked examples.
silicon nitride
Si₃N₄
gate metal layer
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 6000–7000 Å | — |
Thickness | 900–1025 Å |
Patents and literature cited by this patent (applicant and examiner references).
Cited patents · 12
Related documents with shared materials, methods, properties, or citations.
barrier metal layer
nickel
Ni
tungsten
W
platinum
Pt
palladium
Pd
tungsten nitride
WN
aluminum
Al
titanium nitride
TiN
gallium nitride
GaN
aluminum gallium nitride
AlGaN
tantalum nitride
TaN
| — |
Thickness | 300–500 Å | — |
Thickness | 60–110 Å | — |
Thickness | 200–500 Å | — |
Thickness | 5800–6200 Å | — |
Thickness | 80–110 Å | — |
Thickness | 1.1–1.2 µm | — |
Thickness | 100–200 Å | — |
Temperature | ≥ 550 °C | — |
Cited non-patent literature · 5
barrier metal layer
nickel
Ni
tungsten
W
platinum
Pt
palladium
Pd
tungsten nitride
WN
aluminum
Al
titanium nitride
TiN
gallium nitride
GaN
aluminum gallium nitride
AlGaN
tantalum nitride
TaN
| — |
Thickness | 300–500 Å | — |
Thickness | 60–110 Å | — |
Thickness | 200–500 Å | — |
Thickness | 5800–6200 Å | — |
Thickness | 80–110 Å | — |
Thickness | 1.1–1.2 µm | — |
Thickness | 100–200 Å | — |
Temperature | ≥ 550 °C | — |
Cited non-patent literature · 5
barrier metal layer
nickel
Ni
tungsten
W
platinum
Pt
palladium
Pd
tungsten nitride
WN
aluminum
Al
titanium nitride
TiN
gallium nitride
GaN
aluminum gallium nitride
AlGaN
tantalum nitride
TaN
| — |
Thickness | 300–500 Å | — |
Thickness | 60–110 Å | — |
Thickness | 200–500 Å | — |
Thickness | 5800–6200 Å | — |
Thickness | 80–110 Å | — |
Thickness | 1.1–1.2 µm | — |
Thickness | 100–200 Å | — |
Temperature | ≥ 550 °C | — |
Cited non-patent literature · 5
barrier metal layer
nickel
Ni
tungsten
W
platinum
Pt
palladium
Pd
tungsten nitride
WN
aluminum
Al
titanium nitride
TiN
gallium nitride
GaN
aluminum gallium nitride
AlGaN
tantalum nitride
TaN
| — |
Thickness | 300–500 Å | — |
Thickness | 60–110 Å | — |
Thickness | 200–500 Å | — |
Thickness | 5800–6200 Å | — |
Thickness | 80–110 Å | — |
Thickness | 1.1–1.2 µm | — |
Thickness | 100–200 Å | — |
Temperature | ≥ 550 °C | — |
Cited non-patent literature · 5
