Patent
US 8,969,180METHOD AND SYSTEM FOR JUNCTION TERMINATION IN GaN MATERIALS USING CONDUCTIVITY MODULATION
Hui Nie
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 8,969,180Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 B illustrates how junction termination elements 61 and 62, referred to collectively as junction termination structure 60 can be used to alleviate field …
FIGS. 2-7A are simplified cross-sectional diagrams illustrating the fabrication of a Schottky diode in gallium-nitride with junction termination structures …
FIG. 3 illustrates the formation of a second GaN epitaxial layer 301 above the first GaN 30 epitaxial layer 201. The second GaN epitaxial layer 301, from which …
FIG. 4 illustrates the formation of a first metallic structure 401 below the GaN substrate 200. The first metallic structure 401 can be one or more layers of …
FIG. 5. In some embodiments, the region 506 is an isolation region characterized by a high resistivity. Thus, embodiments of the present invention provide for …
FIG. 6. The second metallic structure 601 can be one or more layers of metal and/or alloys to create a 15 Schottky barrier with the first GaN epitaxial layer …
FIG. 7A. The embodiment illustrated in
FIG. 8A. The structure properties, such as dopant concentrations and thicknesses, can vary from those of a Schottky diode, depending on the desired …
FIG. 9 illustrates the formation of a second metallic structure 901 (in addition to the metallic structure 401) electrically coupled to at least a portion of …
FIG. 10A. The embodiment illustrated in
FIG. 11 is simplified cross-sectional diagram illustrating a vertical JFET with junction termination structures according to another embodiment of the present …
FIGS. 12-14 are simplified top-view illustrations showing different example 5 embodiments of junction termination structures according to embodiments of the …
FIG. 13, illustrating how junction termination structures 1420 and 1425 can be shaped differently to accommodate differently-shaped semiconductor structures. …
FIG. 14 illustrates yet another embodiment of a transistor structure similar to the embodiment shown in
FIG. 15 is a simplified flowchart illustrating a method of fabricating a Schottky diode with junction termination structures formed through ion implantation into …
FIG. 16 is a simplified flowchart illustrating a method of fabricating a PIN or PN diode with junction termination structures in a I II -nitride material, …
FIG. 17, a mask structure includes 5 a region 1710 having a first thickness, a region 1711 having a second thickness less than the first thickness, and a region …
FIG. 18 is a simplified schematic diagram illustrating an etched junction termination structure according to an embodiment of the present invention. [0021] In …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for fabricating a junction termination structure, the method comprising: providing a substrate of a first conductivity type, the substrate having a first surface and a second surface; forming a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the substrate; forming a second GaN epitaxial layer of a second conductivity type opposite to the first conductivity type, the second GaN epitaxial layer being coupled to the first GaN epitaxial layer; an d after forming the second GaN epitaxial la y er: implanting ions into a first region of the second GaN epitaxial layer to form a first junction termination element characterized by a first conductivity less than a conductivity of the second GaN epitaxial layer; and implanting ions into a second region of the second GaN epitaxial layer to form a second junction termination element characterized by a second conductivity less than the first conductivity.
The method of claim 1 further comprising forming a first metallic structure electrically coupled to the second surface of the substrate.
The method of claim 1 wherein implanting ions into the second region comprises performing a multi-energy ion implantation process. Page 2 of 7 App l. No. 14/220,564 PATENT Am dt. dated Response to Office Action of
The method of claim 1 f u rther comprising forming a metallic field plate coupled to the junction termination structure.
The method of claim 1 f u rther comprising forming an active device coupled to the second GaN epitaxial layer, wherein the first junction termination element circumscribes the active device and the second junction termination element circumscribes the first junction termination element.
The method of claim 1 wherein a net active charge in the first junction termination element is between 1 x 1012 cm⁻² and 1 x 1014 cm⁻².
The method of claim 42 further comprising: forming a dielectric layer coupled to the junction termination structure and the second metallic structure; removing a portion of the dielectric layer to expose a portion of the second metallic structure; and forming a field plate coupled to the exposed portion of the second metallic structure.
A method of fabricating a vertical power device structure, the method comprising: forming an epitaxial structure by: providing a I II -nitride substrate of a first conductivity type characterized by a first dopant concentration; forming a first I II -nitride epitaxial layer of the first conductivity type coupled to a first surface of the I II -nitride substrate; and forming a second I II -nitride epitaxial layer of a second conductivity type coupled to the first I II -nitride epitaxial layer, wherein the second I II -nitride epitaxial layer has a surface opposing the first I II -nitride epitaxial layer; an d after forming the second III -nitride e p itaxial la y er: Page 3 of 7 App l. No. 14/220,564 PATENT Am dt. dated Response to Office Action of defining regions of differing conductivity by implanting ions into the surface of the second III -nitride epitaxial layer to form a set of implantation regions of the epitaxial structure; and forming one or more active devices using at least a device region of the epitaxial structure.
The method of claim 10 wherein the regions of differing conductivity comprise junction termination elements of a junction termination structure.
The method of claim 10 further comprising forming a Schottky metallic structure coupled to the first III -nitride epitaxial layer.
The method of claim 10 further comprising forming a metallic field plate coupled to the one or more active devices.
The method of claim 10 wherein a first implantation region of the set of implantation regions is electrically connected to a second implantation region of the set of implantation regions. Page 4 of 7
The method of claim 44 14 wherein the junction termination structure circumscribes the one or more active devices.
Layer stacks claimed or described, ordered top of device to substrate.
junction termination structure (GaN)
Schottky diode (GaN)
Materials described outside the worked examples.
first GaN epitaxial layer (n-type)
GaN
III-nitride epitaxial layers
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 B illustrates how junction termination elements 61 and 62, referred to collectively as junction termination structure 60 can be used to alleviate field …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
net active charge in first junction termination element | 1000000000000–100000000000000 cm⁻² | GaN |
Voltage | ≥ 1 V |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,969,180Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 B illustrates how junction termination elements 61 and 62, referred to collectively as junction termination structure 60 can be used to alleviate field …
FIGS. 2-7A are simplified cross-sectional diagrams illustrating the fabrication of a Schottky diode in gallium-nitride with junction termination structures …
FIG. 3 illustrates the formation of a second GaN epitaxial layer 301 above the first GaN 30 epitaxial layer 201. The second GaN epitaxial layer 301, from which …
FIG. 4 illustrates the formation of a first metallic structure 401 below the GaN substrate 200. The first metallic structure 401 can be one or more layers of …
FIG. 5. In some embodiments, the region 506 is an isolation region characterized by a high resistivity. Thus, embodiments of the present invention provide for …
FIG. 6. The second metallic structure 601 can be one or more layers of metal and/or alloys to create a 15 Schottky barrier with the first GaN epitaxial layer …
FIG. 7A. The embodiment illustrated in
FIG. 8A. The structure properties, such as dopant concentrations and thicknesses, can vary from those of a Schottky diode, depending on the desired …
FIG. 9 illustrates the formation of a second metallic structure 901 (in addition to the metallic structure 401) electrically coupled to at least a portion of …
FIG. 10A. The embodiment illustrated in
FIG. 11 is simplified cross-sectional diagram illustrating a vertical JFET with junction termination structures according to another embodiment of the present …
FIGS. 12-14 are simplified top-view illustrations showing different example 5 embodiments of junction termination structures according to embodiments of the …
FIG. 13, illustrating how junction termination structures 1420 and 1425 can be shaped differently to accommodate differently-shaped semiconductor structures. …
FIG. 14 illustrates yet another embodiment of a transistor structure similar to the embodiment shown in
FIG. 15 is a simplified flowchart illustrating a method of fabricating a Schottky diode with junction termination structures formed through ion implantation into …
FIG. 16 is a simplified flowchart illustrating a method of fabricating a PIN or PN diode with junction termination structures in a I II -nitride material, …
FIG. 17, a mask structure includes 5 a region 1710 having a first thickness, a region 1711 having a second thickness less than the first thickness, and a region …
FIG. 18 is a simplified schematic diagram illustrating an etched junction termination structure according to an embodiment of the present invention. [0021] In …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for fabricating a junction termination structure, the method comprising: providing a substrate of a first conductivity type, the substrate having a first surface and a second surface; forming a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the substrate; forming a second GaN epitaxial layer of a second conductivity type opposite to the first conductivity type, the second GaN epitaxial layer being coupled to the first GaN epitaxial layer; an d after forming the second GaN epitaxial la y er: implanting ions into a first region of the second GaN epitaxial layer to form a first junction termination element characterized by a first conductivity less than a conductivity of the second GaN epitaxial layer; and implanting ions into a second region of the second GaN epitaxial layer to form a second junction termination element characterized by a second conductivity less than the first conductivity.
The method of claim 1 further comprising forming a first metallic structure electrically coupled to the second surface of the substrate.
The method of claim 1 wherein implanting ions into the second region comprises performing a multi-energy ion implantation process. Page 2 of 7 App l. No. 14/220,564 PATENT Am dt. dated Response to Office Action of
The method of claim 1 f u rther comprising forming a metallic field plate coupled to the junction termination structure.
The method of claim 1 f u rther comprising forming an active device coupled to the second GaN epitaxial layer, wherein the first junction termination element circumscribes the active device and the second junction termination element circumscribes the first junction termination element.
The method of claim 1 wherein a net active charge in the first junction termination element is between 1 x 1012 cm⁻² and 1 x 1014 cm⁻².
The method of claim 42 further comprising: forming a dielectric layer coupled to the junction termination structure and the second metallic structure; removing a portion of the dielectric layer to expose a portion of the second metallic structure; and forming a field plate coupled to the exposed portion of the second metallic structure.
A method of fabricating a vertical power device structure, the method comprising: forming an epitaxial structure by: providing a I II -nitride substrate of a first conductivity type characterized by a first dopant concentration; forming a first I II -nitride epitaxial layer of the first conductivity type coupled to a first surface of the I II -nitride substrate; and forming a second I II -nitride epitaxial layer of a second conductivity type coupled to the first I II -nitride epitaxial layer, wherein the second I II -nitride epitaxial layer has a surface opposing the first I II -nitride epitaxial layer; an d after forming the second III -nitride e p itaxial la y er: Page 3 of 7 App l. No. 14/220,564 PATENT Am dt. dated Response to Office Action of defining regions of differing conductivity by implanting ions into the surface of the second III -nitride epitaxial layer to form a set of implantation regions of the epitaxial structure; and forming one or more active devices using at least a device region of the epitaxial structure.
The method of claim 10 wherein the regions of differing conductivity comprise junction termination elements of a junction termination structure.
The method of claim 10 further comprising forming a Schottky metallic structure coupled to the first III -nitride epitaxial layer.
The method of claim 10 further comprising forming a metallic field plate coupled to the one or more active devices.
The method of claim 10 wherein a first implantation region of the set of implantation regions is electrically connected to a second implantation region of the set of implantation regions. Page 4 of 7
The method of claim 44 14 wherein the junction termination structure circumscribes the one or more active devices.
Layer stacks claimed or described, ordered top of device to substrate.
junction termination structure (GaN)
Schottky diode (GaN)
Materials described outside the worked examples.
first GaN epitaxial layer (n-type)
GaN
III-nitride epitaxial layers
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 B illustrates how junction termination elements 61 and 62, referred to collectively as junction termination structure 60 can be used to alleviate field …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
net active charge in first junction termination element | 1000000000000–100000000000000 cm⁻² | GaN |
Voltage | ≥ 1 V |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,969,180Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 B illustrates how junction termination elements 61 and 62, referred to collectively as junction termination structure 60 can be used to alleviate field …
FIGS. 2-7A are simplified cross-sectional diagrams illustrating the fabrication of a Schottky diode in gallium-nitride with junction termination structures …
FIG. 3 illustrates the formation of a second GaN epitaxial layer 301 above the first GaN 30 epitaxial layer 201. The second GaN epitaxial layer 301, from which …
FIG. 4 illustrates the formation of a first metallic structure 401 below the GaN substrate 200. The first metallic structure 401 can be one or more layers of …
FIG. 5. In some embodiments, the region 506 is an isolation region characterized by a high resistivity. Thus, embodiments of the present invention provide for …
FIG. 6. The second metallic structure 601 can be one or more layers of metal and/or alloys to create a 15 Schottky barrier with the first GaN epitaxial layer …
FIG. 7A. The embodiment illustrated in
FIG. 8A. The structure properties, such as dopant concentrations and thicknesses, can vary from those of a Schottky diode, depending on the desired …
FIG. 9 illustrates the formation of a second metallic structure 901 (in addition to the metallic structure 401) electrically coupled to at least a portion of …
FIG. 10A. The embodiment illustrated in
FIG. 11 is simplified cross-sectional diagram illustrating a vertical JFET with junction termination structures according to another embodiment of the present …
FIGS. 12-14 are simplified top-view illustrations showing different example 5 embodiments of junction termination structures according to embodiments of the …
FIG. 13, illustrating how junction termination structures 1420 and 1425 can be shaped differently to accommodate differently-shaped semiconductor structures. …
FIG. 14 illustrates yet another embodiment of a transistor structure similar to the embodiment shown in
FIG. 15 is a simplified flowchart illustrating a method of fabricating a Schottky diode with junction termination structures formed through ion implantation into …
FIG. 16 is a simplified flowchart illustrating a method of fabricating a PIN or PN diode with junction termination structures in a I II -nitride material, …
FIG. 17, a mask structure includes 5 a region 1710 having a first thickness, a region 1711 having a second thickness less than the first thickness, and a region …
FIG. 18 is a simplified schematic diagram illustrating an etched junction termination structure according to an embodiment of the present invention. [0021] In …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for fabricating a junction termination structure, the method comprising: providing a substrate of a first conductivity type, the substrate having a first surface and a second surface; forming a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the substrate; forming a second GaN epitaxial layer of a second conductivity type opposite to the first conductivity type, the second GaN epitaxial layer being coupled to the first GaN epitaxial layer; an d after forming the second GaN epitaxial la y er: implanting ions into a first region of the second GaN epitaxial layer to form a first junction termination element characterized by a first conductivity less than a conductivity of the second GaN epitaxial layer; and implanting ions into a second region of the second GaN epitaxial layer to form a second junction termination element characterized by a second conductivity less than the first conductivity.
The method of claim 1 further comprising forming a first metallic structure electrically coupled to the second surface of the substrate.
The method of claim 1 wherein implanting ions into the second region comprises performing a multi-energy ion implantation process. Page 2 of 7 App l. No. 14/220,564 PATENT Am dt. dated Response to Office Action of
The method of claim 1 f u rther comprising forming a metallic field plate coupled to the junction termination structure.
The method of claim 1 f u rther comprising forming an active device coupled to the second GaN epitaxial layer, wherein the first junction termination element circumscribes the active device and the second junction termination element circumscribes the first junction termination element.
The method of claim 1 wherein a net active charge in the first junction termination element is between 1 x 1012 cm⁻² and 1 x 1014 cm⁻².
The method of claim 42 further comprising: forming a dielectric layer coupled to the junction termination structure and the second metallic structure; removing a portion of the dielectric layer to expose a portion of the second metallic structure; and forming a field plate coupled to the exposed portion of the second metallic structure.
A method of fabricating a vertical power device structure, the method comprising: forming an epitaxial structure by: providing a I II -nitride substrate of a first conductivity type characterized by a first dopant concentration; forming a first I II -nitride epitaxial layer of the first conductivity type coupled to a first surface of the I II -nitride substrate; and forming a second I II -nitride epitaxial layer of a second conductivity type coupled to the first I II -nitride epitaxial layer, wherein the second I II -nitride epitaxial layer has a surface opposing the first I II -nitride epitaxial layer; an d after forming the second III -nitride e p itaxial la y er: Page 3 of 7 App l. No. 14/220,564 PATENT Am dt. dated Response to Office Action of defining regions of differing conductivity by implanting ions into the surface of the second III -nitride epitaxial layer to form a set of implantation regions of the epitaxial structure; and forming one or more active devices using at least a device region of the epitaxial structure.
The method of claim 10 wherein the regions of differing conductivity comprise junction termination elements of a junction termination structure.
The method of claim 10 further comprising forming a Schottky metallic structure coupled to the first III -nitride epitaxial layer.
The method of claim 10 further comprising forming a metallic field plate coupled to the one or more active devices.
The method of claim 10 wherein a first implantation region of the set of implantation regions is electrically connected to a second implantation region of the set of implantation regions. Page 4 of 7
The method of claim 44 14 wherein the junction termination structure circumscribes the one or more active devices.
Layer stacks claimed or described, ordered top of device to substrate.
junction termination structure (GaN)
Schottky diode (GaN)
Materials described outside the worked examples.
first GaN epitaxial layer (n-type)
GaN
III-nitride epitaxial layers
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 B illustrates how junction termination elements 61 and 62, referred to collectively as junction termination structure 60 can be used to alleviate field …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
net active charge in first junction termination element | 1000000000000–100000000000000 cm⁻² | GaN |
Voltage | ≥ 1 V |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,969,180Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 B illustrates how junction termination elements 61 and 62, referred to collectively as junction termination structure 60 can be used to alleviate field …
FIGS. 2-7A are simplified cross-sectional diagrams illustrating the fabrication of a Schottky diode in gallium-nitride with junction termination structures …
FIG. 3 illustrates the formation of a second GaN epitaxial layer 301 above the first GaN 30 epitaxial layer 201. The second GaN epitaxial layer 301, from which …
FIG. 4 illustrates the formation of a first metallic structure 401 below the GaN substrate 200. The first metallic structure 401 can be one or more layers of …
FIG. 5. In some embodiments, the region 506 is an isolation region characterized by a high resistivity. Thus, embodiments of the present invention provide for …
FIG. 6. The second metallic structure 601 can be one or more layers of metal and/or alloys to create a 15 Schottky barrier with the first GaN epitaxial layer …
FIG. 7A. The embodiment illustrated in
FIG. 8A. The structure properties, such as dopant concentrations and thicknesses, can vary from those of a Schottky diode, depending on the desired …
FIG. 9 illustrates the formation of a second metallic structure 901 (in addition to the metallic structure 401) electrically coupled to at least a portion of …
FIG. 10A. The embodiment illustrated in
FIG. 11 is simplified cross-sectional diagram illustrating a vertical JFET with junction termination structures according to another embodiment of the present …
FIGS. 12-14 are simplified top-view illustrations showing different example 5 embodiments of junction termination structures according to embodiments of the …
FIG. 13, illustrating how junction termination structures 1420 and 1425 can be shaped differently to accommodate differently-shaped semiconductor structures. …
FIG. 14 illustrates yet another embodiment of a transistor structure similar to the embodiment shown in
FIG. 15 is a simplified flowchart illustrating a method of fabricating a Schottky diode with junction termination structures formed through ion implantation into …
FIG. 16 is a simplified flowchart illustrating a method of fabricating a PIN or PN diode with junction termination structures in a I II -nitride material, …
FIG. 17, a mask structure includes 5 a region 1710 having a first thickness, a region 1711 having a second thickness less than the first thickness, and a region …
FIG. 18 is a simplified schematic diagram illustrating an etched junction termination structure according to an embodiment of the present invention. [0021] In …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for fabricating a junction termination structure, the method comprising: providing a substrate of a first conductivity type, the substrate having a first surface and a second surface; forming a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the substrate; forming a second GaN epitaxial layer of a second conductivity type opposite to the first conductivity type, the second GaN epitaxial layer being coupled to the first GaN epitaxial layer; an d after forming the second GaN epitaxial la y er: implanting ions into a first region of the second GaN epitaxial layer to form a first junction termination element characterized by a first conductivity less than a conductivity of the second GaN epitaxial layer; and implanting ions into a second region of the second GaN epitaxial layer to form a second junction termination element characterized by a second conductivity less than the first conductivity.
The method of claim 1 further comprising forming a first metallic structure electrically coupled to the second surface of the substrate.
The method of claim 1 wherein implanting ions into the second region comprises performing a multi-energy ion implantation process. Page 2 of 7 App l. No. 14/220,564 PATENT Am dt. dated Response to Office Action of
The method of claim 1 f u rther comprising forming a metallic field plate coupled to the junction termination structure.
The method of claim 1 f u rther comprising forming an active device coupled to the second GaN epitaxial layer, wherein the first junction termination element circumscribes the active device and the second junction termination element circumscribes the first junction termination element.
The method of claim 1 wherein a net active charge in the first junction termination element is between 1 x 1012 cm⁻² and 1 x 1014 cm⁻².
The method of claim 42 further comprising: forming a dielectric layer coupled to the junction termination structure and the second metallic structure; removing a portion of the dielectric layer to expose a portion of the second metallic structure; and forming a field plate coupled to the exposed portion of the second metallic structure.
A method of fabricating a vertical power device structure, the method comprising: forming an epitaxial structure by: providing a I II -nitride substrate of a first conductivity type characterized by a first dopant concentration; forming a first I II -nitride epitaxial layer of the first conductivity type coupled to a first surface of the I II -nitride substrate; and forming a second I II -nitride epitaxial layer of a second conductivity type coupled to the first I II -nitride epitaxial layer, wherein the second I II -nitride epitaxial layer has a surface opposing the first I II -nitride epitaxial layer; an d after forming the second III -nitride e p itaxial la y er: Page 3 of 7 App l. No. 14/220,564 PATENT Am dt. dated Response to Office Action of defining regions of differing conductivity by implanting ions into the surface of the second III -nitride epitaxial layer to form a set of implantation regions of the epitaxial structure; and forming one or more active devices using at least a device region of the epitaxial structure.
The method of claim 10 wherein the regions of differing conductivity comprise junction termination elements of a junction termination structure.
The method of claim 10 further comprising forming a Schottky metallic structure coupled to the first III -nitride epitaxial layer.
The method of claim 10 further comprising forming a metallic field plate coupled to the one or more active devices.
The method of claim 10 wherein a first implantation region of the set of implantation regions is electrically connected to a second implantation region of the set of implantation regions. Page 4 of 7
The method of claim 44 14 wherein the junction termination structure circumscribes the one or more active devices.
Layer stacks claimed or described, ordered top of device to substrate.
junction termination structure (GaN)
Schottky diode (GaN)
Materials described outside the worked examples.
first GaN epitaxial layer (n-type)
GaN
III-nitride epitaxial layers
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 B illustrates how junction termination elements 61 and 62, referred to collectively as junction termination structure 60 can be used to alleviate field …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
net active charge in first junction termination element | 1000000000000–100000000000000 cm⁻² | GaN |
Voltage | ≥ 1 V |
Related documents with shared materials, methods, properties, or citations.
vertical power device structure (III-nitride)
FIG. 5. In some embodiments, the region 506 is an isolation region characterized by a high resistivity. Thus, embodiments of the present invention provide for …
FIG. 5. In some embodiments, the region 506 is an isolation region characterized by a high resistivity. Thus, embodiments of the present invention provide for …
FIG. 7A. The embodiment illustrated in
FIG. 9 illustrates the formation of a second metallic structure 901 (in addition to the metallic structure 401) electrically coupled to at least a portion of …
FIGS. 12-14 are simplified top-view illustrations showing different example 5 embodiments of junction termination structures according to embodiments of the …
FIG. 13, illustrating how junction termination structures 1420 and 1425 can be shaped differently to accommodate differently-shaped semiconductor structures. …
FIG. 14 illustrates yet another embodiment of a transistor structure similar to the embodiment shown in
FIG. 17, a mask structure includes 5 a region 1710 having a first thickness, a region 1711 having a second thickness less than the first thickness, and a region …
| — |
vertical power device structure (III-nitride)
FIG. 5. In some embodiments, the region 506 is an isolation region characterized by a high resistivity. Thus, embodiments of the present invention provide for …
FIG. 5. In some embodiments, the region 506 is an isolation region characterized by a high resistivity. Thus, embodiments of the present invention provide for …
FIG. 7A. The embodiment illustrated in
FIG. 9 illustrates the formation of a second metallic structure 901 (in addition to the metallic structure 401) electrically coupled to at least a portion of …
FIGS. 12-14 are simplified top-view illustrations showing different example 5 embodiments of junction termination structures according to embodiments of the …
FIG. 13, illustrating how junction termination structures 1420 and 1425 can be shaped differently to accommodate differently-shaped semiconductor structures. …
FIG. 14 illustrates yet another embodiment of a transistor structure similar to the embodiment shown in
FIG. 17, a mask structure includes 5 a region 1710 having a first thickness, a region 1711 having a second thickness less than the first thickness, and a region …
| — |
vertical power device structure (III-nitride)
FIG. 5. In some embodiments, the region 506 is an isolation region characterized by a high resistivity. Thus, embodiments of the present invention provide for …
FIG. 5. In some embodiments, the region 506 is an isolation region characterized by a high resistivity. Thus, embodiments of the present invention provide for …
FIG. 7A. The embodiment illustrated in
FIG. 9 illustrates the formation of a second metallic structure 901 (in addition to the metallic structure 401) electrically coupled to at least a portion of …
FIGS. 12-14 are simplified top-view illustrations showing different example 5 embodiments of junction termination structures according to embodiments of the …
FIG. 13, illustrating how junction termination structures 1420 and 1425 can be shaped differently to accommodate differently-shaped semiconductor structures. …
FIG. 14 illustrates yet another embodiment of a transistor structure similar to the embodiment shown in
FIG. 17, a mask structure includes 5 a region 1710 having a first thickness, a region 1711 having a second thickness less than the first thickness, and a region …
| — |
vertical power device structure (III-nitride)
FIG. 5. In some embodiments, the region 506 is an isolation region characterized by a high resistivity. Thus, embodiments of the present invention provide for …
FIG. 5. In some embodiments, the region 506 is an isolation region characterized by a high resistivity. Thus, embodiments of the present invention provide for …
FIG. 7A. The embodiment illustrated in
FIG. 9 illustrates the formation of a second metallic structure 901 (in addition to the metallic structure 401) electrically coupled to at least a portion of …
FIGS. 12-14 are simplified top-view illustrations showing different example 5 embodiments of junction termination structures according to embodiments of the …
FIG. 13, illustrating how junction termination structures 1420 and 1425 can be shaped differently to accommodate differently-shaped semiconductor structures. …
FIG. 14 illustrates yet another embodiment of a transistor structure similar to the embodiment shown in
FIG. 17, a mask structure includes 5 a region 1710 having a first thickness, a region 1711 having a second thickness less than the first thickness, and a region …
| — |