Patent
US 9,153,450METHOD FOR MANUFACTURING GALLIUM NITRIDE WAFER
Yong-Jin Kim
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 9,153,450Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 1 to 3 are process cross-sectional views of manufacturing method for a gallium nitride (GaN) wafer and exemplary photographs according to a first …
FIG. 2, a portion of the first GaN layer 140 may be etched using a silane gas. This etching process may be performed in-situ with the forming process of the GaN …
FIG. 3, a second GaN layer 150 is formed on the etched first GaN layer 140 to form the second GaN layer 150 including voids V. Thereafter, a third GaN layer 160 …
FIGS. 4 to 6 are process cross-sectional views of manufacturing method of a GaN wafer and exemplary photographs according to a second embodiment.
FIG. 5, a portion of the first GaN layer 240 is etched using a silane gas. This etching process may be performed in-situ with the forming process of the first …
FIG. 6, the second GaN layer 250 may be formed on the first GaN layer 240. [0093] In the forming of the second GaN layer 250 on the etched first GaN layer 240, …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for manufacturing a gallium nitride (GaN) wafer, the method comprising: forming an etch stop layer on a substrate; forming a first GaN layer on the etch stop layer; etching a portion of the first GaN layer with a silane gas to form trenches; forming a second GaN layer on the etched first GaN layer including voids, the voids of the second GaN layer extending from one or more of the trenches of the first GaN layer; and forming a third GaN layer on the second GaN layer wherein during the etching of the portion of the first GaN layer with the silane gas, the etching process is performed using a silicon nitride (SixNy) [[(Si₃N₄)]] random mask.
The method of claim 1, wherein the etching the portion of the first GaN layer is performed until the etch stop layer is exposed.
The method of claim 1, wherein the etching the portion of the first GaN layer is performed in a vertical shape.
The method of claim 1, wherein the voids are formed at a bottom surface of the second GaN layer.
The method of claim 1, wherein the voids have different height. 3
A method for manufacturing a GaN wafer, the method comprising: forming an etch stop layer on a substrate; forming a first GaN layer on the etch stop layer; etching a portion of the first GaN layer with a silane gas to form a concave portion having a predetermined angle; [[and]] forming a second GaN layer on the etched first GaN layer and having a bottom surface and a top surface, the bottom surface of the second GaN layer including a convex portion and the top surface of the GaN layer having a flat surface, the convex portion of the second GaN layer contacting the concave portion of the first GaN layer and having a shape corresponding to a shape of the concave portion of the first GaN layer; and forming a third GaN layer contacting the top surface of the second GaN layer, wherein a N/Ga ratio of the third GaN layer is lower than a N/Ga ratio of the second GaN layer. 2
The method of claim 2, wherein during the etching of the portion of the first GaN layer with the silane gas the etching process is performed without an etching mask.
The method of claim 2, wherein a pyramidal-shaped damage region is formed in the etched first GaN layer.
Layer stacks claimed or described, ordered top of device to substrate.
GaN wafer with voids (first embodiment)
GaN wafer with concave/convex profile (second embodiment)
Materials described outside the worked examples.
gallium nitride (first GaN layer)
GaN
etch stop layer
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Duration | 5–30 minutes | — |
Duration |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,153,450Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 1 to 3 are process cross-sectional views of manufacturing method for a gallium nitride (GaN) wafer and exemplary photographs according to a first …
FIG. 2, a portion of the first GaN layer 140 may be etched using a silane gas. This etching process may be performed in-situ with the forming process of the GaN …
FIG. 3, a second GaN layer 150 is formed on the etched first GaN layer 140 to form the second GaN layer 150 including voids V. Thereafter, a third GaN layer 160 …
FIGS. 4 to 6 are process cross-sectional views of manufacturing method of a GaN wafer and exemplary photographs according to a second embodiment.
FIG. 5, a portion of the first GaN layer 240 is etched using a silane gas. This etching process may be performed in-situ with the forming process of the first …
FIG. 6, the second GaN layer 250 may be formed on the first GaN layer 240. [0093] In the forming of the second GaN layer 250 on the etched first GaN layer 240, …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for manufacturing a gallium nitride (GaN) wafer, the method comprising: forming an etch stop layer on a substrate; forming a first GaN layer on the etch stop layer; etching a portion of the first GaN layer with a silane gas to form trenches; forming a second GaN layer on the etched first GaN layer including voids, the voids of the second GaN layer extending from one or more of the trenches of the first GaN layer; and forming a third GaN layer on the second GaN layer wherein during the etching of the portion of the first GaN layer with the silane gas, the etching process is performed using a silicon nitride (SixNy) [[(Si₃N₄)]] random mask.
The method of claim 1, wherein the etching the portion of the first GaN layer is performed until the etch stop layer is exposed.
The method of claim 1, wherein the etching the portion of the first GaN layer is performed in a vertical shape.
The method of claim 1, wherein the voids are formed at a bottom surface of the second GaN layer.
The method of claim 1, wherein the voids have different height. 3
A method for manufacturing a GaN wafer, the method comprising: forming an etch stop layer on a substrate; forming a first GaN layer on the etch stop layer; etching a portion of the first GaN layer with a silane gas to form a concave portion having a predetermined angle; [[and]] forming a second GaN layer on the etched first GaN layer and having a bottom surface and a top surface, the bottom surface of the second GaN layer including a convex portion and the top surface of the GaN layer having a flat surface, the convex portion of the second GaN layer contacting the concave portion of the first GaN layer and having a shape corresponding to a shape of the concave portion of the first GaN layer; and forming a third GaN layer contacting the top surface of the second GaN layer, wherein a N/Ga ratio of the third GaN layer is lower than a N/Ga ratio of the second GaN layer. 2
The method of claim 2, wherein during the etching of the portion of the first GaN layer with the silane gas the etching process is performed without an etching mask.
The method of claim 2, wherein a pyramidal-shaped damage region is formed in the etched first GaN layer.
Layer stacks claimed or described, ordered top of device to substrate.
GaN wafer with voids (first embodiment)
GaN wafer with concave/convex profile (second embodiment)
Materials described outside the worked examples.
gallium nitride (first GaN layer)
GaN
etch stop layer
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Duration | 5–30 minutes | — |
Duration |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,153,450Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 1 to 3 are process cross-sectional views of manufacturing method for a gallium nitride (GaN) wafer and exemplary photographs according to a first …
FIG. 2, a portion of the first GaN layer 140 may be etched using a silane gas. This etching process may be performed in-situ with the forming process of the GaN …
FIG. 3, a second GaN layer 150 is formed on the etched first GaN layer 140 to form the second GaN layer 150 including voids V. Thereafter, a third GaN layer 160 …
FIGS. 4 to 6 are process cross-sectional views of manufacturing method of a GaN wafer and exemplary photographs according to a second embodiment.
FIG. 5, a portion of the first GaN layer 240 is etched using a silane gas. This etching process may be performed in-situ with the forming process of the first …
FIG. 6, the second GaN layer 250 may be formed on the first GaN layer 240. [0093] In the forming of the second GaN layer 250 on the etched first GaN layer 240, …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for manufacturing a gallium nitride (GaN) wafer, the method comprising: forming an etch stop layer on a substrate; forming a first GaN layer on the etch stop layer; etching a portion of the first GaN layer with a silane gas to form trenches; forming a second GaN layer on the etched first GaN layer including voids, the voids of the second GaN layer extending from one or more of the trenches of the first GaN layer; and forming a third GaN layer on the second GaN layer wherein during the etching of the portion of the first GaN layer with the silane gas, the etching process is performed using a silicon nitride (SixNy) [[(Si₃N₄)]] random mask.
The method of claim 1, wherein the etching the portion of the first GaN layer is performed until the etch stop layer is exposed.
The method of claim 1, wherein the etching the portion of the first GaN layer is performed in a vertical shape.
The method of claim 1, wherein the voids are formed at a bottom surface of the second GaN layer.
The method of claim 1, wherein the voids have different height. 3
A method for manufacturing a GaN wafer, the method comprising: forming an etch stop layer on a substrate; forming a first GaN layer on the etch stop layer; etching a portion of the first GaN layer with a silane gas to form a concave portion having a predetermined angle; [[and]] forming a second GaN layer on the etched first GaN layer and having a bottom surface and a top surface, the bottom surface of the second GaN layer including a convex portion and the top surface of the GaN layer having a flat surface, the convex portion of the second GaN layer contacting the concave portion of the first GaN layer and having a shape corresponding to a shape of the concave portion of the first GaN layer; and forming a third GaN layer contacting the top surface of the second GaN layer, wherein a N/Ga ratio of the third GaN layer is lower than a N/Ga ratio of the second GaN layer. 2
The method of claim 2, wherein during the etching of the portion of the first GaN layer with the silane gas the etching process is performed without an etching mask.
The method of claim 2, wherein a pyramidal-shaped damage region is formed in the etched first GaN layer.
Layer stacks claimed or described, ordered top of device to substrate.
GaN wafer with voids (first embodiment)
GaN wafer with concave/convex profile (second embodiment)
Materials described outside the worked examples.
gallium nitride (first GaN layer)
GaN
etch stop layer
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Duration | 5–30 minutes | — |
Duration |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,153,450Patent drawings and their descriptions. Click a drawing to enlarge it.
FIGS. 1 to 3 are process cross-sectional views of manufacturing method for a gallium nitride (GaN) wafer and exemplary photographs according to a first …
FIG. 2, a portion of the first GaN layer 140 may be etched using a silane gas. This etching process may be performed in-situ with the forming process of the GaN …
FIG. 3, a second GaN layer 150 is formed on the etched first GaN layer 140 to form the second GaN layer 150 including voids V. Thereafter, a third GaN layer 160 …
FIGS. 4 to 6 are process cross-sectional views of manufacturing method of a GaN wafer and exemplary photographs according to a second embodiment.
FIG. 5, a portion of the first GaN layer 240 is etched using a silane gas. This etching process may be performed in-situ with the forming process of the first …
FIG. 6, the second GaN layer 250 may be formed on the first GaN layer 240. [0093] In the forming of the second GaN layer 250 on the etched first GaN layer 240, …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A method for manufacturing a gallium nitride (GaN) wafer, the method comprising: forming an etch stop layer on a substrate; forming a first GaN layer on the etch stop layer; etching a portion of the first GaN layer with a silane gas to form trenches; forming a second GaN layer on the etched first GaN layer including voids, the voids of the second GaN layer extending from one or more of the trenches of the first GaN layer; and forming a third GaN layer on the second GaN layer wherein during the etching of the portion of the first GaN layer with the silane gas, the etching process is performed using a silicon nitride (SixNy) [[(Si₃N₄)]] random mask.
The method of claim 1, wherein the etching the portion of the first GaN layer is performed until the etch stop layer is exposed.
The method of claim 1, wherein the etching the portion of the first GaN layer is performed in a vertical shape.
The method of claim 1, wherein the voids are formed at a bottom surface of the second GaN layer.
The method of claim 1, wherein the voids have different height. 3
A method for manufacturing a GaN wafer, the method comprising: forming an etch stop layer on a substrate; forming a first GaN layer on the etch stop layer; etching a portion of the first GaN layer with a silane gas to form a concave portion having a predetermined angle; [[and]] forming a second GaN layer on the etched first GaN layer and having a bottom surface and a top surface, the bottom surface of the second GaN layer including a convex portion and the top surface of the GaN layer having a flat surface, the convex portion of the second GaN layer contacting the concave portion of the first GaN layer and having a shape corresponding to a shape of the concave portion of the first GaN layer; and forming a third GaN layer contacting the top surface of the second GaN layer, wherein a N/Ga ratio of the third GaN layer is lower than a N/Ga ratio of the second GaN layer. 2
The method of claim 2, wherein during the etching of the portion of the first GaN layer with the silane gas the etching process is performed without an etching mask.
The method of claim 2, wherein a pyramidal-shaped damage region is formed in the etched first GaN layer.
Layer stacks claimed or described, ordered top of device to substrate.
GaN wafer with voids (first embodiment)
GaN wafer with concave/convex profile (second embodiment)
Materials described outside the worked examples.
gallium nitride (first GaN layer)
GaN
etch stop layer
Additional fabrication and treatment steps described in the patent.
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Duration | 5–30 minutes | — |
Duration |
Related documents with shared materials, methods, properties, or citations.
silicon nitride random mask
SixNy
silane gas
SinH2n+2
low-temperature aluminum nitride
AlN
silicon nitride (etch stop)
SiN
sapphire substrate
Al₂O₃
silicon carbide substrate
SiC
gallium arsenide substrate
GaAs
silicon substrate
Si
| 30–300 s |
| — |
Duration | 3–10 minutes | — |
silicon nitride random mask
SixNy
silane gas
SinH2n+2
low-temperature aluminum nitride
AlN
silicon nitride (etch stop)
SiN
sapphire substrate
Al₂O₃
silicon carbide substrate
SiC
gallium arsenide substrate
GaAs
silicon substrate
Si
| 30–300 s |
| — |
Duration | 3–10 minutes | — |
silicon nitride random mask
SixNy
silane gas
SinH2n+2
low-temperature aluminum nitride
AlN
silicon nitride (etch stop)
SiN
sapphire substrate
Al₂O₃
silicon carbide substrate
SiC
gallium arsenide substrate
GaAs
silicon substrate
Si
| 30–300 s |
| — |
Duration | 3–10 minutes | — |
silicon nitride random mask
SixNy
silane gas
SinH2n+2
low-temperature aluminum nitride
AlN
silicon nitride (etch stop)
SiN
sapphire substrate
Al₂O₃
silicon carbide substrate
SiC
gallium arsenide substrate
GaAs
silicon substrate
Si
| 30–300 s |
| — |
Duration | 3–10 minutes | — |