Patent
US 8,916,871BONDABLE TOP METAL CONTACTS FOR GALLIUM NITRIDE POWER DEVICES
Brian Joel Alvarez, Donald R. Disney, Hui Nie, Patrick James Lazlo Hyland
AVOGY, INC.·US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 8,916,871Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 B, other embodiments of vertical semiconductor devices, such as transistors, can include multiple metal contacts 140, 150 in order to achieve additional …
FIGS. 2-6 are simplified cross-sectional diagrams illustrating a process for creating a solderable back metal on a vertical semiconductor device and attaching …
FIG. 3, a diffusion barrier 310 is formed, coupled to the adhesion layer 210. The diffusion ba rri er 310 can help protect the adhesion layer 210 from …
FIG. 4, a protection layer 410 is formed, coupled to the diffusion ba rrier 310. In some embodiments, the protection layer 410 can protect the diffusion ba rri …
FIG. 5 is a simplified cross-sectional illustration of a process of using a layer of solder 510 to attach the vertical semiconductor device to a lead frame 520. …
FIG. 6 shows the formation of a metal contact 150 on a top surface 610 of the vertical semiconductor device. The metal contact 150 can be one or more layers of …
FIG. 7 is a flowchart illustrating a method 800 of fabricating a vertical GaN power device, according to an embodiment of the present invention. 10 [0010]
FIG. 8 is a simplified cross-sectional diagram illustrating an embodiment of a vertical semiconductor device showing the metal stack of a top metal contact. …
FIGS. 9-12 are illustrations of a particular embodiment of a process for creating a bondable contact surface on a vertical semiconductor device. [0012]
FIG. 10, a dielectric layer 1010 can be 25 coupled to the protection layer 920. This dielectric layer 1010 can comprise an oxide and/or other dielectric that …
FIG. 11, the metal stack of the top metal contact further can comprise a diffusion barrier 1110 and pad metal 1120. The diffusion ba rri er 1110, coupled with …
FIG. 12 illustrates the formation of a back metal 810 on a bottom surface of the GaN substrate 100. The back metal 810 can be formed using processes such as …
FIG. 13 illustrates an embodiment of a vertical semiconductor device including 15 components for both a bondable top metal contact and a solderable backside …
FIG. 14 is flowchart illustrating a method of fabricating a vertical GaN power device, according to an embodiment of the present invention. [0014] In the …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
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A semiconductor device s comprising: a gallium nitride (GaN) substrate having a first surface and a second surface, the second surface being substantially opposite the first surface; at least one device layer coupled to the first surface; a backside metal coupled to the second surface and comprising: an adhesion layer coupled to the second surface of the GaN substrate; a first diffusion barrier coupled to the adhesion layer; and a first protection layer coupled to the first diffusion barrier; and a top metal stack coupled to the at least one device layer and comprising: a contact metal coupled to a surface of the at least one device layer; a second protection layer coupled to the contact metal; a dielectric layer comprising a gap; a second diffusion ba rri er over the dielectric layer and over the second protection layer in the gap of the dielectric layer; and a pad metal coupled to the second diffusion ba rri er; wherein the semiconductor device is configured to conduct electricity between the top metal stack and the backside metal.
The semiconductor device of claim 22 wherein the contact metal forms an Ohmic contact with at least a portion of the at least one device layer.
The semiconductor device of claim 22 wherein the contact metal forms a Schottky contact with at least a portion of the at least one device layer. Page 2 of 6 App l. No. 13/611,467 PATENT Amdt. dated Response to Office Action of
The semiconductor device of claim 22 wherein the contact metal comprises at least one of: platinum, palladium, titanium, titanium nitride, aluminum, silver, or nickel.
The semiconductor device of claim 22 wherein either or both of the first protection layer or the second protection layer comprises gold.
The semiconductor device of claim 22 wherein the pad metal has a thickness of at least 2 microns and comprises at least one o f: aluminum, or copper.
The semiconductor device of claim 22 wherein either or both of the first diffusion ba rri er or the second diffusion layer comprises at least one o f: nickel, chromium, molybdenum, tungsten, or titanium. original
The semiconductor device of claim 22 further comprising an aluminum bond wire electrically connecting the pad metal to a package.
The semiconductor device of claim 22 further comprising a solder mechanically and electrically connecting the backside metal to a lead frame. Page 3 of 6 App l. No. 13/611,467 PATENT Amdt. dated Response to Office Action of
canceled
Layer stacks claimed or described, ordered top of device to substrate.
vertical GaN semiconductor device
Materials described outside the worked examples.
gallium nitride (GaN) substrate
GaN
adhesion layer
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 B, other embodiments of vertical semiconductor devices, such as transistors, can include multiple metal contacts 140, 150 in order to achieve additional …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 1–200 nm | — |
Thickness | 20–100 nm |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,916,871Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 B, other embodiments of vertical semiconductor devices, such as transistors, can include multiple metal contacts 140, 150 in order to achieve additional …
FIGS. 2-6 are simplified cross-sectional diagrams illustrating a process for creating a solderable back metal on a vertical semiconductor device and attaching …
FIG. 3, a diffusion barrier 310 is formed, coupled to the adhesion layer 210. The diffusion ba rri er 310 can help protect the adhesion layer 210 from …
FIG. 4, a protection layer 410 is formed, coupled to the diffusion ba rrier 310. In some embodiments, the protection layer 410 can protect the diffusion ba rri …
FIG. 5 is a simplified cross-sectional illustration of a process of using a layer of solder 510 to attach the vertical semiconductor device to a lead frame 520. …
FIG. 6 shows the formation of a metal contact 150 on a top surface 610 of the vertical semiconductor device. The metal contact 150 can be one or more layers of …
FIG. 7 is a flowchart illustrating a method 800 of fabricating a vertical GaN power device, according to an embodiment of the present invention. 10 [0010]
FIG. 8 is a simplified cross-sectional diagram illustrating an embodiment of a vertical semiconductor device showing the metal stack of a top metal contact. …
FIGS. 9-12 are illustrations of a particular embodiment of a process for creating a bondable contact surface on a vertical semiconductor device. [0012]
FIG. 10, a dielectric layer 1010 can be 25 coupled to the protection layer 920. This dielectric layer 1010 can comprise an oxide and/or other dielectric that …
FIG. 11, the metal stack of the top metal contact further can comprise a diffusion barrier 1110 and pad metal 1120. The diffusion ba rri er 1110, coupled with …
FIG. 12 illustrates the formation of a back metal 810 on a bottom surface of the GaN substrate 100. The back metal 810 can be formed using processes such as …
FIG. 13 illustrates an embodiment of a vertical semiconductor device including 15 components for both a bondable top metal contact and a solderable backside …
FIG. 14 is flowchart illustrating a method of fabricating a vertical GaN power device, according to an embodiment of the present invention. [0014] In the …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
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A semiconductor device s comprising: a gallium nitride (GaN) substrate having a first surface and a second surface, the second surface being substantially opposite the first surface; at least one device layer coupled to the first surface; a backside metal coupled to the second surface and comprising: an adhesion layer coupled to the second surface of the GaN substrate; a first diffusion barrier coupled to the adhesion layer; and a first protection layer coupled to the first diffusion barrier; and a top metal stack coupled to the at least one device layer and comprising: a contact metal coupled to a surface of the at least one device layer; a second protection layer coupled to the contact metal; a dielectric layer comprising a gap; a second diffusion ba rri er over the dielectric layer and over the second protection layer in the gap of the dielectric layer; and a pad metal coupled to the second diffusion ba rri er; wherein the semiconductor device is configured to conduct electricity between the top metal stack and the backside metal.
The semiconductor device of claim 22 wherein the contact metal forms an Ohmic contact with at least a portion of the at least one device layer.
The semiconductor device of claim 22 wherein the contact metal forms a Schottky contact with at least a portion of the at least one device layer. Page 2 of 6 App l. No. 13/611,467 PATENT Amdt. dated Response to Office Action of
The semiconductor device of claim 22 wherein the contact metal comprises at least one of: platinum, palladium, titanium, titanium nitride, aluminum, silver, or nickel.
The semiconductor device of claim 22 wherein either or both of the first protection layer or the second protection layer comprises gold.
The semiconductor device of claim 22 wherein the pad metal has a thickness of at least 2 microns and comprises at least one o f: aluminum, or copper.
The semiconductor device of claim 22 wherein either or both of the first diffusion ba rri er or the second diffusion layer comprises at least one o f: nickel, chromium, molybdenum, tungsten, or titanium. original
The semiconductor device of claim 22 further comprising an aluminum bond wire electrically connecting the pad metal to a package.
The semiconductor device of claim 22 further comprising a solder mechanically and electrically connecting the backside metal to a lead frame. Page 3 of 6 App l. No. 13/611,467 PATENT Amdt. dated Response to Office Action of
canceled
Layer stacks claimed or described, ordered top of device to substrate.
vertical GaN semiconductor device
Materials described outside the worked examples.
gallium nitride (GaN) substrate
GaN
adhesion layer
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 B, other embodiments of vertical semiconductor devices, such as transistors, can include multiple metal contacts 140, 150 in order to achieve additional …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 1–200 nm | — |
Thickness | 20–100 nm |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,916,871Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 B, other embodiments of vertical semiconductor devices, such as transistors, can include multiple metal contacts 140, 150 in order to achieve additional …
FIGS. 2-6 are simplified cross-sectional diagrams illustrating a process for creating a solderable back metal on a vertical semiconductor device and attaching …
FIG. 3, a diffusion barrier 310 is formed, coupled to the adhesion layer 210. The diffusion ba rri er 310 can help protect the adhesion layer 210 from …
FIG. 4, a protection layer 410 is formed, coupled to the diffusion ba rrier 310. In some embodiments, the protection layer 410 can protect the diffusion ba rri …
FIG. 5 is a simplified cross-sectional illustration of a process of using a layer of solder 510 to attach the vertical semiconductor device to a lead frame 520. …
FIG. 6 shows the formation of a metal contact 150 on a top surface 610 of the vertical semiconductor device. The metal contact 150 can be one or more layers of …
FIG. 7 is a flowchart illustrating a method 800 of fabricating a vertical GaN power device, according to an embodiment of the present invention. 10 [0010]
FIG. 8 is a simplified cross-sectional diagram illustrating an embodiment of a vertical semiconductor device showing the metal stack of a top metal contact. …
FIGS. 9-12 are illustrations of a particular embodiment of a process for creating a bondable contact surface on a vertical semiconductor device. [0012]
FIG. 10, a dielectric layer 1010 can be 25 coupled to the protection layer 920. This dielectric layer 1010 can comprise an oxide and/or other dielectric that …
FIG. 11, the metal stack of the top metal contact further can comprise a diffusion barrier 1110 and pad metal 1120. The diffusion ba rri er 1110, coupled with …
FIG. 12 illustrates the formation of a back metal 810 on a bottom surface of the GaN substrate 100. The back metal 810 can be formed using processes such as …
FIG. 13 illustrates an embodiment of a vertical semiconductor device including 15 components for both a bondable top metal contact and a solderable backside …
FIG. 14 is flowchart illustrating a method of fabricating a vertical GaN power device, according to an embodiment of the present invention. [0014] In the …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
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A semiconductor device s comprising: a gallium nitride (GaN) substrate having a first surface and a second surface, the second surface being substantially opposite the first surface; at least one device layer coupled to the first surface; a backside metal coupled to the second surface and comprising: an adhesion layer coupled to the second surface of the GaN substrate; a first diffusion barrier coupled to the adhesion layer; and a first protection layer coupled to the first diffusion barrier; and a top metal stack coupled to the at least one device layer and comprising: a contact metal coupled to a surface of the at least one device layer; a second protection layer coupled to the contact metal; a dielectric layer comprising a gap; a second diffusion ba rri er over the dielectric layer and over the second protection layer in the gap of the dielectric layer; and a pad metal coupled to the second diffusion ba rri er; wherein the semiconductor device is configured to conduct electricity between the top metal stack and the backside metal.
The semiconductor device of claim 22 wherein the contact metal forms an Ohmic contact with at least a portion of the at least one device layer.
The semiconductor device of claim 22 wherein the contact metal forms a Schottky contact with at least a portion of the at least one device layer. Page 2 of 6 App l. No. 13/611,467 PATENT Amdt. dated Response to Office Action of
The semiconductor device of claim 22 wherein the contact metal comprises at least one of: platinum, palladium, titanium, titanium nitride, aluminum, silver, or nickel.
The semiconductor device of claim 22 wherein either or both of the first protection layer or the second protection layer comprises gold.
The semiconductor device of claim 22 wherein the pad metal has a thickness of at least 2 microns and comprises at least one o f: aluminum, or copper.
The semiconductor device of claim 22 wherein either or both of the first diffusion ba rri er or the second diffusion layer comprises at least one o f: nickel, chromium, molybdenum, tungsten, or titanium. original
The semiconductor device of claim 22 further comprising an aluminum bond wire electrically connecting the pad metal to a package.
The semiconductor device of claim 22 further comprising a solder mechanically and electrically connecting the backside metal to a lead frame. Page 3 of 6 App l. No. 13/611,467 PATENT Amdt. dated Response to Office Action of
canceled
Layer stacks claimed or described, ordered top of device to substrate.
vertical GaN semiconductor device
Materials described outside the worked examples.
gallium nitride (GaN) substrate
GaN
adhesion layer
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 B, other embodiments of vertical semiconductor devices, such as transistors, can include multiple metal contacts 140, 150 in order to achieve additional …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 1–200 nm | — |
Thickness | 20–100 nm |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,916,871Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 B, other embodiments of vertical semiconductor devices, such as transistors, can include multiple metal contacts 140, 150 in order to achieve additional …
FIGS. 2-6 are simplified cross-sectional diagrams illustrating a process for creating a solderable back metal on a vertical semiconductor device and attaching …
FIG. 3, a diffusion barrier 310 is formed, coupled to the adhesion layer 210. The diffusion ba rri er 310 can help protect the adhesion layer 210 from …
FIG. 4, a protection layer 410 is formed, coupled to the diffusion ba rrier 310. In some embodiments, the protection layer 410 can protect the diffusion ba rri …
FIG. 5 is a simplified cross-sectional illustration of a process of using a layer of solder 510 to attach the vertical semiconductor device to a lead frame 520. …
FIG. 6 shows the formation of a metal contact 150 on a top surface 610 of the vertical semiconductor device. The metal contact 150 can be one or more layers of …
FIG. 7 is a flowchart illustrating a method 800 of fabricating a vertical GaN power device, according to an embodiment of the present invention. 10 [0010]
FIG. 8 is a simplified cross-sectional diagram illustrating an embodiment of a vertical semiconductor device showing the metal stack of a top metal contact. …
FIGS. 9-12 are illustrations of a particular embodiment of a process for creating a bondable contact surface on a vertical semiconductor device. [0012]
FIG. 10, a dielectric layer 1010 can be 25 coupled to the protection layer 920. This dielectric layer 1010 can comprise an oxide and/or other dielectric that …
FIG. 11, the metal stack of the top metal contact further can comprise a diffusion barrier 1110 and pad metal 1120. The diffusion ba rri er 1110, coupled with …
FIG. 12 illustrates the formation of a back metal 810 on a bottom surface of the GaN substrate 100. The back metal 810 can be formed using processes such as …
FIG. 13 illustrates an embodiment of a vertical semiconductor device including 15 components for both a bondable top metal contact and a solderable backside …
FIG. 14 is flowchart illustrating a method of fabricating a vertical GaN power device, according to an embodiment of the present invention. [0014] In the …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
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A semiconductor device s comprising: a gallium nitride (GaN) substrate having a first surface and a second surface, the second surface being substantially opposite the first surface; at least one device layer coupled to the first surface; a backside metal coupled to the second surface and comprising: an adhesion layer coupled to the second surface of the GaN substrate; a first diffusion barrier coupled to the adhesion layer; and a first protection layer coupled to the first diffusion barrier; and a top metal stack coupled to the at least one device layer and comprising: a contact metal coupled to a surface of the at least one device layer; a second protection layer coupled to the contact metal; a dielectric layer comprising a gap; a second diffusion ba rri er over the dielectric layer and over the second protection layer in the gap of the dielectric layer; and a pad metal coupled to the second diffusion ba rri er; wherein the semiconductor device is configured to conduct electricity between the top metal stack and the backside metal.
The semiconductor device of claim 22 wherein the contact metal forms an Ohmic contact with at least a portion of the at least one device layer.
The semiconductor device of claim 22 wherein the contact metal forms a Schottky contact with at least a portion of the at least one device layer. Page 2 of 6 App l. No. 13/611,467 PATENT Amdt. dated Response to Office Action of
The semiconductor device of claim 22 wherein the contact metal comprises at least one of: platinum, palladium, titanium, titanium nitride, aluminum, silver, or nickel.
The semiconductor device of claim 22 wherein either or both of the first protection layer or the second protection layer comprises gold.
The semiconductor device of claim 22 wherein the pad metal has a thickness of at least 2 microns and comprises at least one o f: aluminum, or copper.
The semiconductor device of claim 22 wherein either or both of the first diffusion ba rri er or the second diffusion layer comprises at least one o f: nickel, chromium, molybdenum, tungsten, or titanium. original
The semiconductor device of claim 22 further comprising an aluminum bond wire electrically connecting the pad metal to a package.
The semiconductor device of claim 22 further comprising a solder mechanically and electrically connecting the backside metal to a lead frame. Page 3 of 6 App l. No. 13/611,467 PATENT Amdt. dated Response to Office Action of
canceled
Layer stacks claimed or described, ordered top of device to substrate.
vertical GaN semiconductor device
Materials described outside the worked examples.
gallium nitride (GaN) substrate
GaN
adhesion layer
Measurements and analyses referenced in the patent, with their drawing references.
FIG. 1 B, other embodiments of vertical semiconductor devices, such as transistors, can include multiple metal contacts 140, 150 in order to achieve additional …
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 1–200 nm | — |
Thickness | 20–100 nm |
Related documents with shared materials, methods, properties, or citations.
vertical GaN power device (general embodiment)
first diffusion barrier
first protection layer
contact metal
second protection layer
pad metal
contact metal (platinum, palladium, titanium, titanium nitride, aluminum, silver, or nickel)
gold
Au
pad metal (aluminum or copper)
diffusion barrier (nickel, chromium, molybdenum, tungsten, or titanium)
aluminum bond wire
Al
solder
| — |
Thickness | 25–250 nm | — |
Thickness | 25–400 nm | — |
Duration | 1–30 minutes | — |
Thickness | 3.5–4.5 µm | — |
Thickness | 5–300 nm | — |
Thickness | 50–300 nm | — |
Thickness | 50–2000 nm | — |
Thickness | 15–100 µm | — |
Thickness | 50–500 µm | — |
Thickness | ≥ 2 µm | — |
vertical GaN power device (general embodiment)
first diffusion barrier
first protection layer
contact metal
second protection layer
pad metal
contact metal (platinum, palladium, titanium, titanium nitride, aluminum, silver, or nickel)
gold
Au
pad metal (aluminum or copper)
diffusion barrier (nickel, chromium, molybdenum, tungsten, or titanium)
aluminum bond wire
Al
solder
| — |
Thickness | 25–250 nm | — |
Thickness | 25–400 nm | — |
Duration | 1–30 minutes | — |
Thickness | 3.5–4.5 µm | — |
Thickness | 5–300 nm | — |
Thickness | 50–300 nm | — |
Thickness | 50–2000 nm | — |
Thickness | 15–100 µm | — |
Thickness | 50–500 µm | — |
Thickness | ≥ 2 µm | — |
vertical GaN power device (general embodiment)
first diffusion barrier
first protection layer
contact metal
second protection layer
pad metal
contact metal (platinum, palladium, titanium, titanium nitride, aluminum, silver, or nickel)
gold
Au
pad metal (aluminum or copper)
diffusion barrier (nickel, chromium, molybdenum, tungsten, or titanium)
aluminum bond wire
Al
solder
| — |
Thickness | 25–250 nm | — |
Thickness | 25–400 nm | — |
Duration | 1–30 minutes | — |
Thickness | 3.5–4.5 µm | — |
Thickness | 5–300 nm | — |
Thickness | 50–300 nm | — |
Thickness | 50–2000 nm | — |
Thickness | 15–100 µm | — |
Thickness | 50–500 µm | — |
Thickness | ≥ 2 µm | — |
vertical GaN power device (general embodiment)
first diffusion barrier
first protection layer
contact metal
second protection layer
pad metal
contact metal (platinum, palladium, titanium, titanium nitride, aluminum, silver, or nickel)
gold
Au
pad metal (aluminum or copper)
diffusion barrier (nickel, chromium, molybdenum, tungsten, or titanium)
aluminum bond wire
Al
solder
| — |
Thickness | 25–250 nm | — |
Thickness | 25–400 nm | — |
Duration | 1–30 minutes | — |
Thickness | 3.5–4.5 µm | — |
Thickness | 5–300 nm | — |
Thickness | 50–300 nm | — |
Thickness | 50–2000 nm | — |
Thickness | 15–100 µm | — |
Thickness | 50–500 µm | — |
Thickness | ≥ 2 µm | — |