Patent
US 7,903,016HIGH POWER AND HIGH FREQUENCY GALLIUM NITRIDE BASED DIGITAL TO ANALOG CONVERTER FOR DIRECT DIGITAL RADIO FREQUENCY POWER WAVEFORM SYNTHESIS
MICHAEL A. WYATT
US
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US 7,903,016Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG.1 is a schematic diagram depicting a composite device including a gallium nitride transistor and an array of n silicon germanium transistors which provide …
FIG. 2 is a schematic diagram of a direct digital-to-antenna (DDA) radio frequency transmitter, in accordance with an embodiment of the present invention.
FIG. 3 is a schematic diagram of a portion of the elements shown in
FIG. 4 is a schematic diagram of a load connected to the gallium nitride 25 transistor shown in
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A high power digital to analog converter comprising an array of n transistors arranged in a binary sequence, in which any transistor in the sequence is twice as large as its preceding transistor, the array of n transistors including respective collector terminals tied together, a depletion mode field-effect transistor (FET) including a source terminal connected to the respective collector terminals, and a drain terminal for providing a drain current, and an array of n switches for selectively activating the n transistors of the array, and selectively providing binary weighted collector currents in the respective collector termina l s, wherein the drain current is an approximate sum of the binary weighted collector currents.
The high power digital to analog converter of claim 1 wherein the depletion mode FET includes a gate terminal connected to a ground potential, and the array of n transistors includes respective emitter terminals connected to the array of n switches for selectively connecting the respective emitter terminals to the ground potential.
The high power digital to analog converter of claim 1 wherein the array of n switches are controlled by a digital word of n bits.
The high power digital to analog converter of claim 1 wherein the depletion mode FET includes a gallium nitride, high electron mobility transistor.
The high power digital to analog converter of claim 1 wherein the array of n switches includes an array of n-channel metal-oxide- semiconductor (NMOS) transistors, and SH: \N RPORTBL\RP\SSEILER\492953 1. DOC ITDE- PACD₂₀₅ US-12-the array of n transistors includes an array of bipolar transistors or NMOS transistors.
The high power digital to analog converter of claim 1 wherein the array of n switches are controlled, respectively, by n bits, and the drain current provides an analog signal corresponding to the n bits.
The high power digital to analog converter of claim 1 wherein the array of n transistors includes respective base terminals tied together, and a reference transistor having a base terminal tied to the respective base terminals of the array of n transistors for establishing a reference current to amplitude modulate the drain current.
A direct digital to antenna (DDA) transmitter comprising an array of n transistors having n collector terminals for providing respective n collector currents, wherein the n collector currents are arranged in a binary sequence of I 0, I 1, I 2,.. In-i, and a depletion mode field-effect transistor (FET) including a source terminal connected to the n collector terminals, and a drain terminal connected to a load for transmitting an analog signal, wherein the array of n transistors are selectively activated by digital data to provide a selective binary sequence of Io, I1, I 2,.. In-1, and SH:\NRPORTBL\RP\SSEILER\492953 1.DOC ITDE-PACD₂ 0 5US-13-the analog signal includes a value that is a predetermined constant value times an approximate sum of the selective binary sequence of I o, I 1, I2,... Imi.
The DDA transmitter of claim 11 including an array of n switches for receiving n bits of the digital data and selectively activating at least a portion of the n transistors in the array.
The DDA transmitter of claim 11 wherein the depletion mode FET includes a base terminal connected to a ground potential, and the array of n transistors includes n emitter terminals coupled to the ground potential.
The DDA transmitter of claim 11 including the array of n transistors includes respective base terminals tied together, and a reference transistor having a base terminal is tied to the respective n base terminals of the array of n transistors for establishing a reference current to amplitude modulate the analog signal.
The DDA transmitter of claim 11 wherein the depletion mode FET includes a gallium nitride, high electron mobility transistor.
The DDA transmitter of claim 11 wherein the array of n switches includes an array of n-channel metal-oxide- semiconductors (NMOS) transistors, and the array of n transistors includes an array of bipolar transistors or NMOS transistors.
The DDA transmitter of claim 11 wherein S_ H:\NRPORTBL\RP\SSEILER\492953 1. DOC ITDE-PACD₂ 0 5US-14-the load coupled to the drain terminal is a matching transformer including a primary coil coupled to the drain terminal and a secondary coil configured for coupling to an antenna.
The DDA transmitter of claim 11 wherein the load coupled to the drain terminal is configured for connection to a voltage supply, and the array lower than a voltage provided by the voltage supply.
The DDA transmitter of claim 11 wherein the array of n switches for selectively providing the of n transistors have a breakdown voltage that is array of n transistors are coupled to another digital data.
Layer stacks claimed or described, ordered top of device to substrate.
high power digital to analog converter (DAC)
direct digital to antenna (DDA) transmitter
Materials described outside the worked examples.
gallium nitride (GaN)
GaN
silicon germanium (SiGe) bipolar transistor material
SiGe
Measurements and analyses referenced in the patent, with their drawing references.
FIG.1 is a schematic diagram depicting a composite device including a gallium nitride transistor and an array of n silicon germanium transistors which provide …
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 7,903,016Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG.1 is a schematic diagram depicting a composite device including a gallium nitride transistor and an array of n silicon germanium transistors which provide …
FIG. 2 is a schematic diagram of a direct digital-to-antenna (DDA) radio frequency transmitter, in accordance with an embodiment of the present invention.
FIG. 3 is a schematic diagram of a portion of the elements shown in
FIG. 4 is a schematic diagram of a load connected to the gallium nitride 25 transistor shown in
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A high power digital to analog converter comprising an array of n transistors arranged in a binary sequence, in which any transistor in the sequence is twice as large as its preceding transistor, the array of n transistors including respective collector terminals tied together, a depletion mode field-effect transistor (FET) including a source terminal connected to the respective collector terminals, and a drain terminal for providing a drain current, and an array of n switches for selectively activating the n transistors of the array, and selectively providing binary weighted collector currents in the respective collector termina l s, wherein the drain current is an approximate sum of the binary weighted collector currents.
The high power digital to analog converter of claim 1 wherein the depletion mode FET includes a gate terminal connected to a ground potential, and the array of n transistors includes respective emitter terminals connected to the array of n switches for selectively connecting the respective emitter terminals to the ground potential.
The high power digital to analog converter of claim 1 wherein the array of n switches are controlled by a digital word of n bits.
The high power digital to analog converter of claim 1 wherein the depletion mode FET includes a gallium nitride, high electron mobility transistor.
The high power digital to analog converter of claim 1 wherein the array of n switches includes an array of n-channel metal-oxide- semiconductor (NMOS) transistors, and SH: \N RPORTBL\RP\SSEILER\492953 1. DOC ITDE- PACD₂₀₅ US-12-the array of n transistors includes an array of bipolar transistors or NMOS transistors.
The high power digital to analog converter of claim 1 wherein the array of n switches are controlled, respectively, by n bits, and the drain current provides an analog signal corresponding to the n bits.
The high power digital to analog converter of claim 1 wherein the array of n transistors includes respective base terminals tied together, and a reference transistor having a base terminal tied to the respective base terminals of the array of n transistors for establishing a reference current to amplitude modulate the drain current.
A direct digital to antenna (DDA) transmitter comprising an array of n transistors having n collector terminals for providing respective n collector currents, wherein the n collector currents are arranged in a binary sequence of I 0, I 1, I 2,.. In-i, and a depletion mode field-effect transistor (FET) including a source terminal connected to the n collector terminals, and a drain terminal connected to a load for transmitting an analog signal, wherein the array of n transistors are selectively activated by digital data to provide a selective binary sequence of Io, I1, I 2,.. In-1, and SH:\NRPORTBL\RP\SSEILER\492953 1.DOC ITDE-PACD₂ 0 5US-13-the analog signal includes a value that is a predetermined constant value times an approximate sum of the selective binary sequence of I o, I 1, I2,... Imi.
The DDA transmitter of claim 11 including an array of n switches for receiving n bits of the digital data and selectively activating at least a portion of the n transistors in the array.
The DDA transmitter of claim 11 wherein the depletion mode FET includes a base terminal connected to a ground potential, and the array of n transistors includes n emitter terminals coupled to the ground potential.
The DDA transmitter of claim 11 including the array of n transistors includes respective base terminals tied together, and a reference transistor having a base terminal is tied to the respective n base terminals of the array of n transistors for establishing a reference current to amplitude modulate the analog signal.
The DDA transmitter of claim 11 wherein the depletion mode FET includes a gallium nitride, high electron mobility transistor.
The DDA transmitter of claim 11 wherein the array of n switches includes an array of n-channel metal-oxide- semiconductors (NMOS) transistors, and the array of n transistors includes an array of bipolar transistors or NMOS transistors.
The DDA transmitter of claim 11 wherein S_ H:\NRPORTBL\RP\SSEILER\492953 1. DOC ITDE-PACD₂ 0 5US-14-the load coupled to the drain terminal is a matching transformer including a primary coil coupled to the drain terminal and a secondary coil configured for coupling to an antenna.
The DDA transmitter of claim 11 wherein the load coupled to the drain terminal is configured for connection to a voltage supply, and the array lower than a voltage provided by the voltage supply.
The DDA transmitter of claim 11 wherein the array of n switches for selectively providing the of n transistors have a breakdown voltage that is array of n transistors are coupled to another digital data.
Layer stacks claimed or described, ordered top of device to substrate.
high power digital to analog converter (DAC)
direct digital to antenna (DDA) transmitter
Materials described outside the worked examples.
gallium nitride (GaN)
GaN
silicon germanium (SiGe) bipolar transistor material
SiGe
Measurements and analyses referenced in the patent, with their drawing references.
FIG.1 is a schematic diagram depicting a composite device including a gallium nitride transistor and an array of n silicon germanium transistors which provide …
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 7,903,016Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG.1 is a schematic diagram depicting a composite device including a gallium nitride transistor and an array of n silicon germanium transistors which provide …
FIG. 2 is a schematic diagram of a direct digital-to-antenna (DDA) radio frequency transmitter, in accordance with an embodiment of the present invention.
FIG. 3 is a schematic diagram of a portion of the elements shown in
FIG. 4 is a schematic diagram of a load connected to the gallium nitride 25 transistor shown in
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A high power digital to analog converter comprising an array of n transistors arranged in a binary sequence, in which any transistor in the sequence is twice as large as its preceding transistor, the array of n transistors including respective collector terminals tied together, a depletion mode field-effect transistor (FET) including a source terminal connected to the respective collector terminals, and a drain terminal for providing a drain current, and an array of n switches for selectively activating the n transistors of the array, and selectively providing binary weighted collector currents in the respective collector termina l s, wherein the drain current is an approximate sum of the binary weighted collector currents.
The high power digital to analog converter of claim 1 wherein the depletion mode FET includes a gate terminal connected to a ground potential, and the array of n transistors includes respective emitter terminals connected to the array of n switches for selectively connecting the respective emitter terminals to the ground potential.
The high power digital to analog converter of claim 1 wherein the array of n switches are controlled by a digital word of n bits.
The high power digital to analog converter of claim 1 wherein the depletion mode FET includes a gallium nitride, high electron mobility transistor.
The high power digital to analog converter of claim 1 wherein the array of n switches includes an array of n-channel metal-oxide- semiconductor (NMOS) transistors, and SH: \N RPORTBL\RP\SSEILER\492953 1. DOC ITDE- PACD₂₀₅ US-12-the array of n transistors includes an array of bipolar transistors or NMOS transistors.
The high power digital to analog converter of claim 1 wherein the array of n switches are controlled, respectively, by n bits, and the drain current provides an analog signal corresponding to the n bits.
The high power digital to analog converter of claim 1 wherein the array of n transistors includes respective base terminals tied together, and a reference transistor having a base terminal tied to the respective base terminals of the array of n transistors for establishing a reference current to amplitude modulate the drain current.
A direct digital to antenna (DDA) transmitter comprising an array of n transistors having n collector terminals for providing respective n collector currents, wherein the n collector currents are arranged in a binary sequence of I 0, I 1, I 2,.. In-i, and a depletion mode field-effect transistor (FET) including a source terminal connected to the n collector terminals, and a drain terminal connected to a load for transmitting an analog signal, wherein the array of n transistors are selectively activated by digital data to provide a selective binary sequence of Io, I1, I 2,.. In-1, and SH:\NRPORTBL\RP\SSEILER\492953 1.DOC ITDE-PACD₂ 0 5US-13-the analog signal includes a value that is a predetermined constant value times an approximate sum of the selective binary sequence of I o, I 1, I2,... Imi.
The DDA transmitter of claim 11 including an array of n switches for receiving n bits of the digital data and selectively activating at least a portion of the n transistors in the array.
The DDA transmitter of claim 11 wherein the depletion mode FET includes a base terminal connected to a ground potential, and the array of n transistors includes n emitter terminals coupled to the ground potential.
The DDA transmitter of claim 11 including the array of n transistors includes respective base terminals tied together, and a reference transistor having a base terminal is tied to the respective n base terminals of the array of n transistors for establishing a reference current to amplitude modulate the analog signal.
The DDA transmitter of claim 11 wherein the depletion mode FET includes a gallium nitride, high electron mobility transistor.
The DDA transmitter of claim 11 wherein the array of n switches includes an array of n-channel metal-oxide- semiconductors (NMOS) transistors, and the array of n transistors includes an array of bipolar transistors or NMOS transistors.
The DDA transmitter of claim 11 wherein S_ H:\NRPORTBL\RP\SSEILER\492953 1. DOC ITDE-PACD₂ 0 5US-14-the load coupled to the drain terminal is a matching transformer including a primary coil coupled to the drain terminal and a secondary coil configured for coupling to an antenna.
The DDA transmitter of claim 11 wherein the load coupled to the drain terminal is configured for connection to a voltage supply, and the array lower than a voltage provided by the voltage supply.
The DDA transmitter of claim 11 wherein the array of n switches for selectively providing the of n transistors have a breakdown voltage that is array of n transistors are coupled to another digital data.
Layer stacks claimed or described, ordered top of device to substrate.
high power digital to analog converter (DAC)
direct digital to antenna (DDA) transmitter
Materials described outside the worked examples.
gallium nitride (GaN)
GaN
silicon germanium (SiGe) bipolar transistor material
SiGe
Measurements and analyses referenced in the patent, with their drawing references.
FIG.1 is a schematic diagram depicting a composite device including a gallium nitride transistor and an array of n silicon germanium transistors which provide …
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 7,903,016Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG.1 is a schematic diagram depicting a composite device including a gallium nitride transistor and an array of n silicon germanium transistors which provide …
FIG. 2 is a schematic diagram of a direct digital-to-antenna (DDA) radio frequency transmitter, in accordance with an embodiment of the present invention.
FIG. 3 is a schematic diagram of a portion of the elements shown in
FIG. 4 is a schematic diagram of a load connected to the gallium nitride 25 transistor shown in
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A high power digital to analog converter comprising an array of n transistors arranged in a binary sequence, in which any transistor in the sequence is twice as large as its preceding transistor, the array of n transistors including respective collector terminals tied together, a depletion mode field-effect transistor (FET) including a source terminal connected to the respective collector terminals, and a drain terminal for providing a drain current, and an array of n switches for selectively activating the n transistors of the array, and selectively providing binary weighted collector currents in the respective collector termina l s, wherein the drain current is an approximate sum of the binary weighted collector currents.
The high power digital to analog converter of claim 1 wherein the depletion mode FET includes a gate terminal connected to a ground potential, and the array of n transistors includes respective emitter terminals connected to the array of n switches for selectively connecting the respective emitter terminals to the ground potential.
The high power digital to analog converter of claim 1 wherein the array of n switches are controlled by a digital word of n bits.
The high power digital to analog converter of claim 1 wherein the depletion mode FET includes a gallium nitride, high electron mobility transistor.
The high power digital to analog converter of claim 1 wherein the array of n switches includes an array of n-channel metal-oxide- semiconductor (NMOS) transistors, and SH: \N RPORTBL\RP\SSEILER\492953 1. DOC ITDE- PACD₂₀₅ US-12-the array of n transistors includes an array of bipolar transistors or NMOS transistors.
The high power digital to analog converter of claim 1 wherein the array of n switches are controlled, respectively, by n bits, and the drain current provides an analog signal corresponding to the n bits.
The high power digital to analog converter of claim 1 wherein the array of n transistors includes respective base terminals tied together, and a reference transistor having a base terminal tied to the respective base terminals of the array of n transistors for establishing a reference current to amplitude modulate the drain current.
A direct digital to antenna (DDA) transmitter comprising an array of n transistors having n collector terminals for providing respective n collector currents, wherein the n collector currents are arranged in a binary sequence of I 0, I 1, I 2,.. In-i, and a depletion mode field-effect transistor (FET) including a source terminal connected to the n collector terminals, and a drain terminal connected to a load for transmitting an analog signal, wherein the array of n transistors are selectively activated by digital data to provide a selective binary sequence of Io, I1, I 2,.. In-1, and SH:\NRPORTBL\RP\SSEILER\492953 1.DOC ITDE-PACD₂ 0 5US-13-the analog signal includes a value that is a predetermined constant value times an approximate sum of the selective binary sequence of I o, I 1, I2,... Imi.
The DDA transmitter of claim 11 including an array of n switches for receiving n bits of the digital data and selectively activating at least a portion of the n transistors in the array.
The DDA transmitter of claim 11 wherein the depletion mode FET includes a base terminal connected to a ground potential, and the array of n transistors includes n emitter terminals coupled to the ground potential.
The DDA transmitter of claim 11 including the array of n transistors includes respective base terminals tied together, and a reference transistor having a base terminal is tied to the respective n base terminals of the array of n transistors for establishing a reference current to amplitude modulate the analog signal.
The DDA transmitter of claim 11 wherein the depletion mode FET includes a gallium nitride, high electron mobility transistor.
The DDA transmitter of claim 11 wherein the array of n switches includes an array of n-channel metal-oxide- semiconductors (NMOS) transistors, and the array of n transistors includes an array of bipolar transistors or NMOS transistors.
The DDA transmitter of claim 11 wherein S_ H:\NRPORTBL\RP\SSEILER\492953 1. DOC ITDE-PACD₂ 0 5US-14-the load coupled to the drain terminal is a matching transformer including a primary coil coupled to the drain terminal and a secondary coil configured for coupling to an antenna.
The DDA transmitter of claim 11 wherein the load coupled to the drain terminal is configured for connection to a voltage supply, and the array lower than a voltage provided by the voltage supply.
The DDA transmitter of claim 11 wherein the array of n switches for selectively providing the of n transistors have a breakdown voltage that is array of n transistors are coupled to another digital data.
Layer stacks claimed or described, ordered top of device to substrate.
high power digital to analog converter (DAC)
direct digital to antenna (DDA) transmitter
Materials described outside the worked examples.
gallium nitride (GaN)
GaN
silicon germanium (SiGe) bipolar transistor material
SiGe
Measurements and analyses referenced in the patent, with their drawing references.
FIG.1 is a schematic diagram depicting a composite device including a gallium nitride transistor and an array of n silicon germanium transistors which provide …
Related documents with shared materials, methods, properties, or citations.
FIG. 4 is a schematic diagram of a load connected to the gallium nitride 25 transistor shown in
GAN DRIVER USING ACTIVE PRE-DRIVER WITH FEEDBACK
FIG. 4 is a schematic diagram of a load connected to the gallium nitride 25 transistor shown in
GAN DRIVER USING ACTIVE PRE-DRIVER WITH FEEDBACK
FIG. 4 is a schematic diagram of a load connected to the gallium nitride 25 transistor shown in
GAN DRIVER USING ACTIVE PRE-DRIVER WITH FEEDBACK
FIG. 4 is a schematic diagram of a load connected to the gallium nitride 25 transistor shown in