Patent
US 9,428,829BOARD AND METHOD FOR GROWING HIGH-QUALITY GRAPHENE LAYER
Byung Jin Cho
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 9,428,829Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a schematic view illustrating the configuration 7 4366-133545 of a board for forming a graphene layer according to an embodiment of the present …
FIGS. 2A and 2 B are graphs illustrating the results of measurement of the stress level of a metal catalyst layer due 5 to the insertion of a stress reduction …
FIGS. 3A and 3B are graphs illustrating the rocking curve for evaluating the crystallinity of a metal catalyst layer due to the insertion of a stress reduction …
FIGS. 4A and 4B are atomic force microscope images 10 illustrating the surface height and surface roughness (RMS roughness) of a metal catalyst layer due to …
FIGS. 5A and 5B are graphs illustrating Raman spectra for evaluating the quality of the graphene layer transferred to a 15 silicon (Si O 2/Si) wafer; and
FIG. 6 is a graph illustrating 2D Raman mapping of layer uniformity of the graphene layer transferred to a silicon (Si O 2/Si) wafer.
FIG. 10 3A illustrates the case having no stress reduction layer 120, the full width half maximum (FWHM) of which is 3.785.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A board for forming a graphene layer, comprising: a board layer; a metal catalyst layer disposed on the board layer and functioning as a catalyst for forming the graphene layer; and a stress reduction layer disposed between the board layer and the metal catalyst layer so as to reduce stress of the metal catalyst layer. withdrawn
The board of claim 1, wherein the stress reduction layer comprises a layered material configured such that a compound having a two-dimensional planar thin film structure of atoms formed by chemically strong bonding is provided in a form of a monolayer or a multilayer stack formed by weak bonding. withdrawn
The board of claim 1, wherein the stress reduction layer comprises an adhesion reducing material for reducing adhesion of the metal catalyst layer to the board layer. withdrawn
The board of claim 1, wherein the board layer does not react with the metal catalyst layer and thus forms no compound. withdrawn
The board of claim 1, wherein the metal catalyst layer comprises any one selected from among nickel (Ni), copper (Cu), platinum (Pt), ruthenium (Ru), rhodium (Rh), gold (Au), tungsten (W), cobalt (Co), palladium (Pd), titanium (Ti), tantalum (Ta), molybdenum (Mo), hafnium (Hf), lanthanum (La), iridium (Ir) and silver (Ag). withdrawn
A method of forming a graphene layer, comprising, in the following order: (a) forming a board layer; (b) forming a stress reduction layer on the board layer; (c) forming a metal catalyst layer whi c h fun ction s on the stress reduction layer, the metal catalyst la y er functioning as a catalyst for forming the graphene layer; and (d) growing the graphene layer on the metal catalyst layer, wherein the stress reduction layer reduces stress of the metal catalyst layer.
The method of claim 11, wherein the stress reduction layer comprises a layered material configured such that a compound having a two-dimensional planar 3DI 2908.D OCX Page 5 of 1 1 Application No. 14/132,12 1 Paper Dated: In Reply to USPTO Correspondence of Attorney Docket No. 4366-133545 thin film structure of atoms formed by chemically strong bonding is provided in a form of a monolayer or a multilayer stack formed by weak bonding.
The method of claim 11, wherein the stress reduction layer comprises an adhesion reducing material for reducing adhesion of the metal catalyst layer to the board layer.
The method of claim 11, wherein forming the board layer in (a) comprises: (al) forming a substrate layer for supporting a series of layers stacked thereon; and (a2) forming a reaction barrier layer on the substrate layer so as to prevent generation of a compound between the substrate layer and the metal catalyst layer.
The method of claim 11, wherein growing the graphene layer in (d) is performed using chemical vapor deposition.
The method of claim 11, wherein the board layer comprises a substrate layer and a reaction barrier layer formed on the substrate layer such that the board layer does not react with the metal catalyst layer and no compound is formed between the substrate layer and the metal catalyst layer and the substrate layer comprises any one selected from the group consisting of silicon (Si), germanium (Ge) and silicon germanium (SiGe), or comprises silicon on insulator (SOI).
The method of claim 11, wherein the board layer comprises a substrate layer and a reaction barrier layer formed on the substrate layer such that the board layer does not react with the metal catalyst'layer and no compound is formed between the substrate layer and the metal catalyst layer and the reaction barrier layer comprises any one 3DI 2908.DOCX Page 7 of 11 Application No. 14/132,12 1 Paper Dated: In Reply to USPTO Correspondence of Attorney Docket No. 4366-133545 selected from the group consisting of Si oxide, Hf oxide, Zr oxide, Al oxide, La oxide, Ti oxide, W oxide, Co oxide, Ta oxide, Ni oxide, Mo oxide, V oxide, and Cr oxide.
The method of claim 11, wherein the board layer does not react with the metal catalyst layer and, thus, forms no compound and the board layer comprises any one selected from the group consisting of glass, quartz, and sapphire.
The method of claim 11, wherein the metal catalyst layer comprises any one selected from the group consisting of nickel (Ni), copper (Cu), platinum (Pt), ruthenium (Ru), rhodium (Rh), gold (Au), tungsten (W), cobalt (Co), palladium (Pd), titanium (Ti), tantalum (Ta), molybdenum (Mo), hafnium (Hf), lanthanum (La), iridium (Ir), and silver (Ag).
. canceled
Layer stacks claimed or described, ordered top of device to substrate.
board for forming graphene layer
Materials described outside the worked examples.
graphene layer
metal catalyst layer
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIGS. 4A and 4B are atomic force microscope images 10 illustrating the surface height and surface roughness (RMS roughness) of a metal catalyst layer due to …
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,428,829Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a schematic view illustrating the configuration 7 4366-133545 of a board for forming a graphene layer according to an embodiment of the present …
FIGS. 2A and 2 B are graphs illustrating the results of measurement of the stress level of a metal catalyst layer due 5 to the insertion of a stress reduction …
FIGS. 3A and 3B are graphs illustrating the rocking curve for evaluating the crystallinity of a metal catalyst layer due to the insertion of a stress reduction …
FIGS. 4A and 4B are atomic force microscope images 10 illustrating the surface height and surface roughness (RMS roughness) of a metal catalyst layer due to …
FIGS. 5A and 5B are graphs illustrating Raman spectra for evaluating the quality of the graphene layer transferred to a 15 silicon (Si O 2/Si) wafer; and
FIG. 6 is a graph illustrating 2D Raman mapping of layer uniformity of the graphene layer transferred to a silicon (Si O 2/Si) wafer.
FIG. 10 3A illustrates the case having no stress reduction layer 120, the full width half maximum (FWHM) of which is 3.785.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A board for forming a graphene layer, comprising: a board layer; a metal catalyst layer disposed on the board layer and functioning as a catalyst for forming the graphene layer; and a stress reduction layer disposed between the board layer and the metal catalyst layer so as to reduce stress of the metal catalyst layer. withdrawn
The board of claim 1, wherein the stress reduction layer comprises a layered material configured such that a compound having a two-dimensional planar thin film structure of atoms formed by chemically strong bonding is provided in a form of a monolayer or a multilayer stack formed by weak bonding. withdrawn
The board of claim 1, wherein the stress reduction layer comprises an adhesion reducing material for reducing adhesion of the metal catalyst layer to the board layer. withdrawn
The board of claim 1, wherein the board layer does not react with the metal catalyst layer and thus forms no compound. withdrawn
The board of claim 1, wherein the metal catalyst layer comprises any one selected from among nickel (Ni), copper (Cu), platinum (Pt), ruthenium (Ru), rhodium (Rh), gold (Au), tungsten (W), cobalt (Co), palladium (Pd), titanium (Ti), tantalum (Ta), molybdenum (Mo), hafnium (Hf), lanthanum (La), iridium (Ir) and silver (Ag). withdrawn
A method of forming a graphene layer, comprising, in the following order: (a) forming a board layer; (b) forming a stress reduction layer on the board layer; (c) forming a metal catalyst layer whi c h fun ction s on the stress reduction layer, the metal catalyst la y er functioning as a catalyst for forming the graphene layer; and (d) growing the graphene layer on the metal catalyst layer, wherein the stress reduction layer reduces stress of the metal catalyst layer.
The method of claim 11, wherein the stress reduction layer comprises a layered material configured such that a compound having a two-dimensional planar 3DI 2908.D OCX Page 5 of 1 1 Application No. 14/132,12 1 Paper Dated: In Reply to USPTO Correspondence of Attorney Docket No. 4366-133545 thin film structure of atoms formed by chemically strong bonding is provided in a form of a monolayer or a multilayer stack formed by weak bonding.
The method of claim 11, wherein the stress reduction layer comprises an adhesion reducing material for reducing adhesion of the metal catalyst layer to the board layer.
The method of claim 11, wherein forming the board layer in (a) comprises: (al) forming a substrate layer for supporting a series of layers stacked thereon; and (a2) forming a reaction barrier layer on the substrate layer so as to prevent generation of a compound between the substrate layer and the metal catalyst layer.
The method of claim 11, wherein growing the graphene layer in (d) is performed using chemical vapor deposition.
The method of claim 11, wherein the board layer comprises a substrate layer and a reaction barrier layer formed on the substrate layer such that the board layer does not react with the metal catalyst layer and no compound is formed between the substrate layer and the metal catalyst layer and the substrate layer comprises any one selected from the group consisting of silicon (Si), germanium (Ge) and silicon germanium (SiGe), or comprises silicon on insulator (SOI).
The method of claim 11, wherein the board layer comprises a substrate layer and a reaction barrier layer formed on the substrate layer such that the board layer does not react with the metal catalyst'layer and no compound is formed between the substrate layer and the metal catalyst layer and the reaction barrier layer comprises any one 3DI 2908.DOCX Page 7 of 11 Application No. 14/132,12 1 Paper Dated: In Reply to USPTO Correspondence of Attorney Docket No. 4366-133545 selected from the group consisting of Si oxide, Hf oxide, Zr oxide, Al oxide, La oxide, Ti oxide, W oxide, Co oxide, Ta oxide, Ni oxide, Mo oxide, V oxide, and Cr oxide.
The method of claim 11, wherein the board layer does not react with the metal catalyst layer and, thus, forms no compound and the board layer comprises any one selected from the group consisting of glass, quartz, and sapphire.
The method of claim 11, wherein the metal catalyst layer comprises any one selected from the group consisting of nickel (Ni), copper (Cu), platinum (Pt), ruthenium (Ru), rhodium (Rh), gold (Au), tungsten (W), cobalt (Co), palladium (Pd), titanium (Ti), tantalum (Ta), molybdenum (Mo), hafnium (Hf), lanthanum (La), iridium (Ir), and silver (Ag).
. canceled
Layer stacks claimed or described, ordered top of device to substrate.
board for forming graphene layer
Materials described outside the worked examples.
graphene layer
metal catalyst layer
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIGS. 4A and 4B are atomic force microscope images 10 illustrating the surface height and surface roughness (RMS roughness) of a metal catalyst layer due to …
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,428,829Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a schematic view illustrating the configuration 7 4366-133545 of a board for forming a graphene layer according to an embodiment of the present …
FIGS. 2A and 2 B are graphs illustrating the results of measurement of the stress level of a metal catalyst layer due 5 to the insertion of a stress reduction …
FIGS. 3A and 3B are graphs illustrating the rocking curve for evaluating the crystallinity of a metal catalyst layer due to the insertion of a stress reduction …
FIGS. 4A and 4B are atomic force microscope images 10 illustrating the surface height and surface roughness (RMS roughness) of a metal catalyst layer due to …
FIGS. 5A and 5B are graphs illustrating Raman spectra for evaluating the quality of the graphene layer transferred to a 15 silicon (Si O 2/Si) wafer; and
FIG. 6 is a graph illustrating 2D Raman mapping of layer uniformity of the graphene layer transferred to a silicon (Si O 2/Si) wafer.
FIG. 10 3A illustrates the case having no stress reduction layer 120, the full width half maximum (FWHM) of which is 3.785.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A board for forming a graphene layer, comprising: a board layer; a metal catalyst layer disposed on the board layer and functioning as a catalyst for forming the graphene layer; and a stress reduction layer disposed between the board layer and the metal catalyst layer so as to reduce stress of the metal catalyst layer. withdrawn
The board of claim 1, wherein the stress reduction layer comprises a layered material configured such that a compound having a two-dimensional planar thin film structure of atoms formed by chemically strong bonding is provided in a form of a monolayer or a multilayer stack formed by weak bonding. withdrawn
The board of claim 1, wherein the stress reduction layer comprises an adhesion reducing material for reducing adhesion of the metal catalyst layer to the board layer. withdrawn
The board of claim 1, wherein the board layer does not react with the metal catalyst layer and thus forms no compound. withdrawn
The board of claim 1, wherein the metal catalyst layer comprises any one selected from among nickel (Ni), copper (Cu), platinum (Pt), ruthenium (Ru), rhodium (Rh), gold (Au), tungsten (W), cobalt (Co), palladium (Pd), titanium (Ti), tantalum (Ta), molybdenum (Mo), hafnium (Hf), lanthanum (La), iridium (Ir) and silver (Ag). withdrawn
A method of forming a graphene layer, comprising, in the following order: (a) forming a board layer; (b) forming a stress reduction layer on the board layer; (c) forming a metal catalyst layer whi c h fun ction s on the stress reduction layer, the metal catalyst la y er functioning as a catalyst for forming the graphene layer; and (d) growing the graphene layer on the metal catalyst layer, wherein the stress reduction layer reduces stress of the metal catalyst layer.
The method of claim 11, wherein the stress reduction layer comprises a layered material configured such that a compound having a two-dimensional planar 3DI 2908.D OCX Page 5 of 1 1 Application No. 14/132,12 1 Paper Dated: In Reply to USPTO Correspondence of Attorney Docket No. 4366-133545 thin film structure of atoms formed by chemically strong bonding is provided in a form of a monolayer or a multilayer stack formed by weak bonding.
The method of claim 11, wherein the stress reduction layer comprises an adhesion reducing material for reducing adhesion of the metal catalyst layer to the board layer.
The method of claim 11, wherein forming the board layer in (a) comprises: (al) forming a substrate layer for supporting a series of layers stacked thereon; and (a2) forming a reaction barrier layer on the substrate layer so as to prevent generation of a compound between the substrate layer and the metal catalyst layer.
The method of claim 11, wherein growing the graphene layer in (d) is performed using chemical vapor deposition.
The method of claim 11, wherein the board layer comprises a substrate layer and a reaction barrier layer formed on the substrate layer such that the board layer does not react with the metal catalyst layer and no compound is formed between the substrate layer and the metal catalyst layer and the substrate layer comprises any one selected from the group consisting of silicon (Si), germanium (Ge) and silicon germanium (SiGe), or comprises silicon on insulator (SOI).
The method of claim 11, wherein the board layer comprises a substrate layer and a reaction barrier layer formed on the substrate layer such that the board layer does not react with the metal catalyst'layer and no compound is formed between the substrate layer and the metal catalyst layer and the reaction barrier layer comprises any one 3DI 2908.DOCX Page 7 of 11 Application No. 14/132,12 1 Paper Dated: In Reply to USPTO Correspondence of Attorney Docket No. 4366-133545 selected from the group consisting of Si oxide, Hf oxide, Zr oxide, Al oxide, La oxide, Ti oxide, W oxide, Co oxide, Ta oxide, Ni oxide, Mo oxide, V oxide, and Cr oxide.
The method of claim 11, wherein the board layer does not react with the metal catalyst layer and, thus, forms no compound and the board layer comprises any one selected from the group consisting of glass, quartz, and sapphire.
The method of claim 11, wherein the metal catalyst layer comprises any one selected from the group consisting of nickel (Ni), copper (Cu), platinum (Pt), ruthenium (Ru), rhodium (Rh), gold (Au), tungsten (W), cobalt (Co), palladium (Pd), titanium (Ti), tantalum (Ta), molybdenum (Mo), hafnium (Hf), lanthanum (La), iridium (Ir), and silver (Ag).
. canceled
Layer stacks claimed or described, ordered top of device to substrate.
board for forming graphene layer
Materials described outside the worked examples.
graphene layer
metal catalyst layer
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIGS. 4A and 4B are atomic force microscope images 10 illustrating the surface height and surface roughness (RMS roughness) of a metal catalyst layer due to …
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 9,428,829Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a schematic view illustrating the configuration 7 4366-133545 of a board for forming a graphene layer according to an embodiment of the present …
FIGS. 2A and 2 B are graphs illustrating the results of measurement of the stress level of a metal catalyst layer due 5 to the insertion of a stress reduction …
FIGS. 3A and 3B are graphs illustrating the rocking curve for evaluating the crystallinity of a metal catalyst layer due to the insertion of a stress reduction …
FIGS. 4A and 4B are atomic force microscope images 10 illustrating the surface height and surface roughness (RMS roughness) of a metal catalyst layer due to …
FIGS. 5A and 5B are graphs illustrating Raman spectra for evaluating the quality of the graphene layer transferred to a 15 silicon (Si O 2/Si) wafer; and
FIG. 6 is a graph illustrating 2D Raman mapping of layer uniformity of the graphene layer transferred to a silicon (Si O 2/Si) wafer.
FIG. 10 3A illustrates the case having no stress reduction layer 120, the full width half maximum (FWHM) of which is 3.785.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A board for forming a graphene layer, comprising: a board layer; a metal catalyst layer disposed on the board layer and functioning as a catalyst for forming the graphene layer; and a stress reduction layer disposed between the board layer and the metal catalyst layer so as to reduce stress of the metal catalyst layer. withdrawn
The board of claim 1, wherein the stress reduction layer comprises a layered material configured such that a compound having a two-dimensional planar thin film structure of atoms formed by chemically strong bonding is provided in a form of a monolayer or a multilayer stack formed by weak bonding. withdrawn
The board of claim 1, wherein the stress reduction layer comprises an adhesion reducing material for reducing adhesion of the metal catalyst layer to the board layer. withdrawn
The board of claim 1, wherein the board layer does not react with the metal catalyst layer and thus forms no compound. withdrawn
The board of claim 1, wherein the metal catalyst layer comprises any one selected from among nickel (Ni), copper (Cu), platinum (Pt), ruthenium (Ru), rhodium (Rh), gold (Au), tungsten (W), cobalt (Co), palladium (Pd), titanium (Ti), tantalum (Ta), molybdenum (Mo), hafnium (Hf), lanthanum (La), iridium (Ir) and silver (Ag). withdrawn
A method of forming a graphene layer, comprising, in the following order: (a) forming a board layer; (b) forming a stress reduction layer on the board layer; (c) forming a metal catalyst layer whi c h fun ction s on the stress reduction layer, the metal catalyst la y er functioning as a catalyst for forming the graphene layer; and (d) growing the graphene layer on the metal catalyst layer, wherein the stress reduction layer reduces stress of the metal catalyst layer.
The method of claim 11, wherein the stress reduction layer comprises a layered material configured such that a compound having a two-dimensional planar 3DI 2908.D OCX Page 5 of 1 1 Application No. 14/132,12 1 Paper Dated: In Reply to USPTO Correspondence of Attorney Docket No. 4366-133545 thin film structure of atoms formed by chemically strong bonding is provided in a form of a monolayer or a multilayer stack formed by weak bonding.
The method of claim 11, wherein the stress reduction layer comprises an adhesion reducing material for reducing adhesion of the metal catalyst layer to the board layer.
The method of claim 11, wherein forming the board layer in (a) comprises: (al) forming a substrate layer for supporting a series of layers stacked thereon; and (a2) forming a reaction barrier layer on the substrate layer so as to prevent generation of a compound between the substrate layer and the metal catalyst layer.
The method of claim 11, wherein growing the graphene layer in (d) is performed using chemical vapor deposition.
The method of claim 11, wherein the board layer comprises a substrate layer and a reaction barrier layer formed on the substrate layer such that the board layer does not react with the metal catalyst layer and no compound is formed between the substrate layer and the metal catalyst layer and the substrate layer comprises any one selected from the group consisting of silicon (Si), germanium (Ge) and silicon germanium (SiGe), or comprises silicon on insulator (SOI).
The method of claim 11, wherein the board layer comprises a substrate layer and a reaction barrier layer formed on the substrate layer such that the board layer does not react with the metal catalyst'layer and no compound is formed between the substrate layer and the metal catalyst layer and the reaction barrier layer comprises any one 3DI 2908.DOCX Page 7 of 11 Application No. 14/132,12 1 Paper Dated: In Reply to USPTO Correspondence of Attorney Docket No. 4366-133545 selected from the group consisting of Si oxide, Hf oxide, Zr oxide, Al oxide, La oxide, Ti oxide, W oxide, Co oxide, Ta oxide, Ni oxide, Mo oxide, V oxide, and Cr oxide.
The method of claim 11, wherein the board layer does not react with the metal catalyst layer and, thus, forms no compound and the board layer comprises any one selected from the group consisting of glass, quartz, and sapphire.
The method of claim 11, wherein the metal catalyst layer comprises any one selected from the group consisting of nickel (Ni), copper (Cu), platinum (Pt), ruthenium (Ru), rhodium (Rh), gold (Au), tungsten (W), cobalt (Co), palladium (Pd), titanium (Ti), tantalum (Ta), molybdenum (Mo), hafnium (Hf), lanthanum (La), iridium (Ir), and silver (Ag).
. canceled
Layer stacks claimed or described, ordered top of device to substrate.
board for forming graphene layer
Materials described outside the worked examples.
graphene layer
metal catalyst layer
Additional fabrication and treatment steps described in the patent.
Measurements and analyses referenced in the patent, with their drawing references.
FIGS. 4A and 4B are atomic force microscope images 10 illustrating the surface height and surface roughness (RMS roughness) of a metal catalyst layer due to …
Related documents with shared materials, methods, properties, or citations.
stress reduction layer
graphene
reduced graphite oxide
molybdenum disulfide
MoS₂
molybdenum diselenide
MoSe₂
substrate layer
reaction barrier layer
silicon
Si
germanium
Ge
silicon germanium
SiGe
silicon on insulator
reaction barrier layer oxides
glass, quartz or sapphire board layer
nickel
Ni
reduced graphite oxide (spin-coated stress reduction layer)
FIGS. 5A and 5B are graphs illustrating Raman spectra for evaluating the quality of the graphene layer transferred to a 15 silicon (Si O 2/Si) wafer; and
FIG. 6 is a graph illustrating 2D Raman mapping of layer uniformity of the graphene layer transferred to a silicon (Si O 2/Si) wafer.
FIG. 6 is a graph illustrating 2D Raman mapping of layer uniformity of the graphene layer transferred to a silicon (Si O 2/Si) wafer.
stress reduction layer
graphene
reduced graphite oxide
molybdenum disulfide
MoS₂
molybdenum diselenide
MoSe₂
substrate layer
reaction barrier layer
silicon
Si
germanium
Ge
silicon germanium
SiGe
silicon on insulator
reaction barrier layer oxides
glass, quartz or sapphire board layer
nickel
Ni
reduced graphite oxide (spin-coated stress reduction layer)
FIGS. 5A and 5B are graphs illustrating Raman spectra for evaluating the quality of the graphene layer transferred to a 15 silicon (Si O 2/Si) wafer; and
FIG. 6 is a graph illustrating 2D Raman mapping of layer uniformity of the graphene layer transferred to a silicon (Si O 2/Si) wafer.
FIG. 6 is a graph illustrating 2D Raman mapping of layer uniformity of the graphene layer transferred to a silicon (Si O 2/Si) wafer.
stress reduction layer
graphene
reduced graphite oxide
molybdenum disulfide
MoS₂
molybdenum diselenide
MoSe₂
substrate layer
reaction barrier layer
silicon
Si
germanium
Ge
silicon germanium
SiGe
silicon on insulator
reaction barrier layer oxides
glass, quartz or sapphire board layer
nickel
Ni
reduced graphite oxide (spin-coated stress reduction layer)
FIGS. 5A and 5B are graphs illustrating Raman spectra for evaluating the quality of the graphene layer transferred to a 15 silicon (Si O 2/Si) wafer; and
FIG. 6 is a graph illustrating 2D Raman mapping of layer uniformity of the graphene layer transferred to a silicon (Si O 2/Si) wafer.
FIG. 6 is a graph illustrating 2D Raman mapping of layer uniformity of the graphene layer transferred to a silicon (Si O 2/Si) wafer.
stress reduction layer
graphene
reduced graphite oxide
molybdenum disulfide
MoS₂
molybdenum diselenide
MoSe₂
substrate layer
reaction barrier layer
silicon
Si
germanium
Ge
silicon germanium
SiGe
silicon on insulator
reaction barrier layer oxides
glass, quartz or sapphire board layer
nickel
Ni
reduced graphite oxide (spin-coated stress reduction layer)
FIGS. 5A and 5B are graphs illustrating Raman spectra for evaluating the quality of the graphene layer transferred to a 15 silicon (Si O 2/Si) wafer; and
FIG. 6 is a graph illustrating 2D Raman mapping of layer uniformity of the graphene layer transferred to a silicon (Si O 2/Si) wafer.
FIG. 6 is a graph illustrating 2D Raman mapping of layer uniformity of the graphene layer transferred to a silicon (Si O 2/Si) wafer.