Patent
US 10,771,022CIRCUITRY AND METHOD FOR GaN DEVICE
Baoliang Feng
US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
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US 10,771,022Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 schematically illustrates circuitry for a GaN radio frequency power amplifier according to prior art. [0024]
FIG. 2 schematically illustrates a block diagram of circuitry for a GaN device according to one embodiment of the present disclosure. [0025] FIG 3 …
FIG. 3 is schematically illustrates a block diagram of circuitry 300 for a GaN device according to another embodiment of the present disclosure. It would be …
FIG. 4 schematically illustrates a control circuit 400 of circuitry for a GaN device according to one embodiment of the present disclosure. It would be …
FIG. 6 only shows the circuit components in the control circuit 600 which are closely related with the embodiments of the present disclosure. In practice, the …
FIG. 10 schematically illustrates a working waveform 1000 of a negative bias circuit of circuitry for a GaN device according to one embodiment of the present …
FIGS. 12-13, several embodiments of the voltage holding circuit 305 according to embodiments of the present disclosure will be described below. FIG 12 …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
Circuitry for a gallium nitride (GaN) device, comprising: a negative bias circuit configured to provide a negative bias voltage for a gate of the GaN device; a drain switch circuit configured to turn on or off a positive voltage for a drain of the GaN device; and a control circuit configured to control the drain switch circuit based on provision of the negative bias voltage, such that the positive voltage for the drain is turned on after a voltage of the gate reaches the negative bias voltage and turned off before the negative bias voltage completely disappears. Original
The circuitry according to claim 1, wherein the control circuit is further configured to: turn on the drain switch circuit when an output voltage of the negative bias circuit is decreased from a voltage of zero to a threshold voltage, and turn off the drain switch circuit when the output voltage of the negative bias circuit is increased from the negative bias voltage to the threshold voltage, the threshold voltage being between the negative bias voltage and the voltage of zero. Original
The circuitry according to claim 1, further comprising: a voltage holding circuit configured to hold the negative bias voltage for the gate of the GaN device for a predetermined period when the output voltage of the negative bias circuit begins to increase from the negative bias voltage. Original
The circuitry according to claim 1, wherein the negative bias circuit includes a negative switch power supply buck-boost circuit, the negative switch power supply buck-boost circuit converting a power supply voltage into the negative bias voltage and providing a current required for an operation of the GaN device. Original
The circuitry according to claim 1, wherein the drain switch circuit is further configured to increase from a voltage of zero slowly at a first predetermined speed to the positive voltage for the drain when being turned on, and to decrease from the positive voltage for the drain quickly at a second predetermined speed to the voltage of zero when being turned off. Original
The circuitry according to claim 1, further comprising: a bias switch circuit connected between the negative bias circuit and the gate of the GaN device and configured to apply an output voltage of the negative bias circuit to the gate of the GaN device based on a control command. Original
The circuitry according to claim 1, further comprising: a big capacitor having a predetermined large capacitance and connected between the drain of the GaN device and ground. Original
The circuitry according to claim 1, wherein the GaN device operates as a GaN radio frequency power amplifier. New
The circuitry according to claim 1, wherein the negative bias voltage is adjustable from -5 V to -10 V and the positive voltage for the drain is 48 V. New
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A method for a gallium nitride (GaN) device, comprising: providing a negative bias voltage to a gate of the GaN device by decreasing a voltage of zero to the negative bias voltage; a positive voltage to a drain of the GaN device during the decreasing;.i tro lling t ne turnin g on oT t ne positive vo l tage to t ne arain oT t ne UaiN aevice i provision of the ne g ative bias volta g e to the g ate, such that the positive/oltage to the drain is turned on after the ne g ative bias volta g e is provided to the g ate nr ff+ r an actual volta g e at th o n-+o nnrn rhoc +hn neg ative bias-the negative bias voltage the gate of the GaN device by increasing the negative bias voltage to the voltage of zero; and,i oiLing turning off the positive voltage the drain of the GaN device..j e bi & hat the positive volta g e to the drain is turned off after the ne g ative bias volta g e is-emoved from the g ate and before the actual volta g e at the g ate approaches the volta ge Currently amended
The method according to claim 16, wherein, -the positive voltage to the drain of the GaN device during the decreasing h e neaa ' comprises: providing the positive voltage to the drain of the GaN device when the voltage of zero is decreased to a threshold voltage, the threshold voltage being between the negative bias voltage and the voltage of zero. Currently amended
The method according to claim 16, wherein turning off the positive voltage the drain of the GaN device during the increasing comprises: turning off the positive voltage for the drain of the GaN device when the negative bias voltage is increased to threshold voltage. Currently amended
The method according to claim 16, further comprising: holding the negative bias voltage for the gate of the GaN device for a predetermined period when the negative bias voltage begins to increase. Original
The method according to claim 16, wherein the decreasing and the increasing are performed by a negative switch power supply buck-boost circuit, and the method further comprising: providing a current required for an operation of the GaN device by the negative switch power supply buck-boost circuit. Currently amended
The method according to claim 16, wherein providing the positive voltage to the drain of the GaN device during the decreasing comprises: the positive voltage to the drain of the GaN device by increasing a voltage of zero slowly at a first predetermined speed to the positive voltage for the drain; and turning off the positive voltage the drain of the GaN device by decreasing the positive voltage the drain quickly at a second predetermined speed to the voltage of zero. Currently amended
The method according to claim 16, further comprising: applying a big capacitor having a predetermined large capacitance as a decoupling capacitor of the GaN device. Original
The method according to claim 16, further comprising: applying the negative bias voltage to the gate of the GaN device based on a control command. New
The method according to claim 16, wherein the negative bias voltage is adjustable from -5 V to -10 V and the positive voltage for the drain is 48 V. New
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Layer stacks claimed or described, ordered top of device to substrate.
GaN RF power amplifier/GaN transistor with gate bias and drain switch circuitry
No layer stack recorded.
Materials described outside the worked examples.
gallium nitride
GaN
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
negative gate bias voltage range | -10–-5 V | — |
positive drain voltage | 48 V |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,771,022Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 schematically illustrates circuitry for a GaN radio frequency power amplifier according to prior art. [0024]
FIG. 2 schematically illustrates a block diagram of circuitry for a GaN device according to one embodiment of the present disclosure. [0025] FIG 3 …
FIG. 3 is schematically illustrates a block diagram of circuitry 300 for a GaN device according to another embodiment of the present disclosure. It would be …
FIG. 4 schematically illustrates a control circuit 400 of circuitry for a GaN device according to one embodiment of the present disclosure. It would be …
FIG. 6 only shows the circuit components in the control circuit 600 which are closely related with the embodiments of the present disclosure. In practice, the …
FIG. 10 schematically illustrates a working waveform 1000 of a negative bias circuit of circuitry for a GaN device according to one embodiment of the present …
FIGS. 12-13, several embodiments of the voltage holding circuit 305 according to embodiments of the present disclosure will be described below. FIG 12 …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
Circuitry for a gallium nitride (GaN) device, comprising: a negative bias circuit configured to provide a negative bias voltage for a gate of the GaN device; a drain switch circuit configured to turn on or off a positive voltage for a drain of the GaN device; and a control circuit configured to control the drain switch circuit based on provision of the negative bias voltage, such that the positive voltage for the drain is turned on after a voltage of the gate reaches the negative bias voltage and turned off before the negative bias voltage completely disappears. Original
The circuitry according to claim 1, wherein the control circuit is further configured to: turn on the drain switch circuit when an output voltage of the negative bias circuit is decreased from a voltage of zero to a threshold voltage, and turn off the drain switch circuit when the output voltage of the negative bias circuit is increased from the negative bias voltage to the threshold voltage, the threshold voltage being between the negative bias voltage and the voltage of zero. Original
The circuitry according to claim 1, further comprising: a voltage holding circuit configured to hold the negative bias voltage for the gate of the GaN device for a predetermined period when the output voltage of the negative bias circuit begins to increase from the negative bias voltage. Original
The circuitry according to claim 1, wherein the negative bias circuit includes a negative switch power supply buck-boost circuit, the negative switch power supply buck-boost circuit converting a power supply voltage into the negative bias voltage and providing a current required for an operation of the GaN device. Original
The circuitry according to claim 1, wherein the drain switch circuit is further configured to increase from a voltage of zero slowly at a first predetermined speed to the positive voltage for the drain when being turned on, and to decrease from the positive voltage for the drain quickly at a second predetermined speed to the voltage of zero when being turned off. Original
The circuitry according to claim 1, further comprising: a bias switch circuit connected between the negative bias circuit and the gate of the GaN device and configured to apply an output voltage of the negative bias circuit to the gate of the GaN device based on a control command. Original
The circuitry according to claim 1, further comprising: a big capacitor having a predetermined large capacitance and connected between the drain of the GaN device and ground. Original
The circuitry according to claim 1, wherein the GaN device operates as a GaN radio frequency power amplifier. New
The circuitry according to claim 1, wherein the negative bias voltage is adjustable from -5 V to -10 V and the positive voltage for the drain is 48 V. New
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A method for a gallium nitride (GaN) device, comprising: providing a negative bias voltage to a gate of the GaN device by decreasing a voltage of zero to the negative bias voltage; a positive voltage to a drain of the GaN device during the decreasing;.i tro lling t ne turnin g on oT t ne positive vo l tage to t ne arain oT t ne UaiN aevice i provision of the ne g ative bias volta g e to the g ate, such that the positive/oltage to the drain is turned on after the ne g ative bias volta g e is provided to the g ate nr ff+ r an actual volta g e at th o n-+o nnrn rhoc +hn neg ative bias-the negative bias voltage the gate of the GaN device by increasing the negative bias voltage to the voltage of zero; and,i oiLing turning off the positive voltage the drain of the GaN device..j e bi & hat the positive volta g e to the drain is turned off after the ne g ative bias volta g e is-emoved from the g ate and before the actual volta g e at the g ate approaches the volta ge Currently amended
The method according to claim 16, wherein, -the positive voltage to the drain of the GaN device during the decreasing h e neaa ' comprises: providing the positive voltage to the drain of the GaN device when the voltage of zero is decreased to a threshold voltage, the threshold voltage being between the negative bias voltage and the voltage of zero. Currently amended
The method according to claim 16, wherein turning off the positive voltage the drain of the GaN device during the increasing comprises: turning off the positive voltage for the drain of the GaN device when the negative bias voltage is increased to threshold voltage. Currently amended
The method according to claim 16, further comprising: holding the negative bias voltage for the gate of the GaN device for a predetermined period when the negative bias voltage begins to increase. Original
The method according to claim 16, wherein the decreasing and the increasing are performed by a negative switch power supply buck-boost circuit, and the method further comprising: providing a current required for an operation of the GaN device by the negative switch power supply buck-boost circuit. Currently amended
The method according to claim 16, wherein providing the positive voltage to the drain of the GaN device during the decreasing comprises: the positive voltage to the drain of the GaN device by increasing a voltage of zero slowly at a first predetermined speed to the positive voltage for the drain; and turning off the positive voltage the drain of the GaN device by decreasing the positive voltage the drain quickly at a second predetermined speed to the voltage of zero. Currently amended
The method according to claim 16, further comprising: applying a big capacitor having a predetermined large capacitance as a decoupling capacitor of the GaN device. Original
The method according to claim 16, further comprising: applying the negative bias voltage to the gate of the GaN device based on a control command. New
The method according to claim 16, wherein the negative bias voltage is adjustable from -5 V to -10 V and the positive voltage for the drain is 48 V. New
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Layer stacks claimed or described, ordered top of device to substrate.
GaN RF power amplifier/GaN transistor with gate bias and drain switch circuitry
No layer stack recorded.
Materials described outside the worked examples.
gallium nitride
GaN
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
negative gate bias voltage range | -10–-5 V | — |
positive drain voltage | 48 V |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,771,022Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 schematically illustrates circuitry for a GaN radio frequency power amplifier according to prior art. [0024]
FIG. 2 schematically illustrates a block diagram of circuitry for a GaN device according to one embodiment of the present disclosure. [0025] FIG 3 …
FIG. 3 is schematically illustrates a block diagram of circuitry 300 for a GaN device according to another embodiment of the present disclosure. It would be …
FIG. 4 schematically illustrates a control circuit 400 of circuitry for a GaN device according to one embodiment of the present disclosure. It would be …
FIG. 6 only shows the circuit components in the control circuit 600 which are closely related with the embodiments of the present disclosure. In practice, the …
FIG. 10 schematically illustrates a working waveform 1000 of a negative bias circuit of circuitry for a GaN device according to one embodiment of the present …
FIGS. 12-13, several embodiments of the voltage holding circuit 305 according to embodiments of the present disclosure will be described below. FIG 12 …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
Circuitry for a gallium nitride (GaN) device, comprising: a negative bias circuit configured to provide a negative bias voltage for a gate of the GaN device; a drain switch circuit configured to turn on or off a positive voltage for a drain of the GaN device; and a control circuit configured to control the drain switch circuit based on provision of the negative bias voltage, such that the positive voltage for the drain is turned on after a voltage of the gate reaches the negative bias voltage and turned off before the negative bias voltage completely disappears. Original
The circuitry according to claim 1, wherein the control circuit is further configured to: turn on the drain switch circuit when an output voltage of the negative bias circuit is decreased from a voltage of zero to a threshold voltage, and turn off the drain switch circuit when the output voltage of the negative bias circuit is increased from the negative bias voltage to the threshold voltage, the threshold voltage being between the negative bias voltage and the voltage of zero. Original
The circuitry according to claim 1, further comprising: a voltage holding circuit configured to hold the negative bias voltage for the gate of the GaN device for a predetermined period when the output voltage of the negative bias circuit begins to increase from the negative bias voltage. Original
The circuitry according to claim 1, wherein the negative bias circuit includes a negative switch power supply buck-boost circuit, the negative switch power supply buck-boost circuit converting a power supply voltage into the negative bias voltage and providing a current required for an operation of the GaN device. Original
The circuitry according to claim 1, wherein the drain switch circuit is further configured to increase from a voltage of zero slowly at a first predetermined speed to the positive voltage for the drain when being turned on, and to decrease from the positive voltage for the drain quickly at a second predetermined speed to the voltage of zero when being turned off. Original
The circuitry according to claim 1, further comprising: a bias switch circuit connected between the negative bias circuit and the gate of the GaN device and configured to apply an output voltage of the negative bias circuit to the gate of the GaN device based on a control command. Original
The circuitry according to claim 1, further comprising: a big capacitor having a predetermined large capacitance and connected between the drain of the GaN device and ground. Original
The circuitry according to claim 1, wherein the GaN device operates as a GaN radio frequency power amplifier. New
The circuitry according to claim 1, wherein the negative bias voltage is adjustable from -5 V to -10 V and the positive voltage for the drain is 48 V. New
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A method for a gallium nitride (GaN) device, comprising: providing a negative bias voltage to a gate of the GaN device by decreasing a voltage of zero to the negative bias voltage; a positive voltage to a drain of the GaN device during the decreasing;.i tro lling t ne turnin g on oT t ne positive vo l tage to t ne arain oT t ne UaiN aevice i provision of the ne g ative bias volta g e to the g ate, such that the positive/oltage to the drain is turned on after the ne g ative bias volta g e is provided to the g ate nr ff+ r an actual volta g e at th o n-+o nnrn rhoc +hn neg ative bias-the negative bias voltage the gate of the GaN device by increasing the negative bias voltage to the voltage of zero; and,i oiLing turning off the positive voltage the drain of the GaN device..j e bi & hat the positive volta g e to the drain is turned off after the ne g ative bias volta g e is-emoved from the g ate and before the actual volta g e at the g ate approaches the volta ge Currently amended
The method according to claim 16, wherein, -the positive voltage to the drain of the GaN device during the decreasing h e neaa ' comprises: providing the positive voltage to the drain of the GaN device when the voltage of zero is decreased to a threshold voltage, the threshold voltage being between the negative bias voltage and the voltage of zero. Currently amended
The method according to claim 16, wherein turning off the positive voltage the drain of the GaN device during the increasing comprises: turning off the positive voltage for the drain of the GaN device when the negative bias voltage is increased to threshold voltage. Currently amended
The method according to claim 16, further comprising: holding the negative bias voltage for the gate of the GaN device for a predetermined period when the negative bias voltage begins to increase. Original
The method according to claim 16, wherein the decreasing and the increasing are performed by a negative switch power supply buck-boost circuit, and the method further comprising: providing a current required for an operation of the GaN device by the negative switch power supply buck-boost circuit. Currently amended
The method according to claim 16, wherein providing the positive voltage to the drain of the GaN device during the decreasing comprises: the positive voltage to the drain of the GaN device by increasing a voltage of zero slowly at a first predetermined speed to the positive voltage for the drain; and turning off the positive voltage the drain of the GaN device by decreasing the positive voltage the drain quickly at a second predetermined speed to the voltage of zero. Currently amended
The method according to claim 16, further comprising: applying a big capacitor having a predetermined large capacitance as a decoupling capacitor of the GaN device. Original
The method according to claim 16, further comprising: applying the negative bias voltage to the gate of the GaN device based on a control command. New
The method according to claim 16, wherein the negative bias voltage is adjustable from -5 V to -10 V and the positive voltage for the drain is 48 V. New
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Layer stacks claimed or described, ordered top of device to substrate.
GaN RF power amplifier/GaN transistor with gate bias and drain switch circuitry
No layer stack recorded.
Materials described outside the worked examples.
gallium nitride
GaN
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
negative gate bias voltage range | -10–-5 V | — |
positive drain voltage | 48 V |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 10,771,022Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 schematically illustrates circuitry for a GaN radio frequency power amplifier according to prior art. [0024]
FIG. 2 schematically illustrates a block diagram of circuitry for a GaN device according to one embodiment of the present disclosure. [0025] FIG 3 …
FIG. 3 is schematically illustrates a block diagram of circuitry 300 for a GaN device according to another embodiment of the present disclosure. It would be …
FIG. 4 schematically illustrates a control circuit 400 of circuitry for a GaN device according to one embodiment of the present disclosure. It would be …
FIG. 6 only shows the circuit components in the control circuit 600 which are closely related with the embodiments of the present disclosure. In practice, the …
FIG. 10 schematically illustrates a working waveform 1000 of a negative bias circuit of circuitry for a GaN device according to one embodiment of the present …
FIGS. 12-13, several embodiments of the voltage holding circuit 305 according to embodiments of the present disclosure will be described below. FIG 12 …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
Circuitry for a gallium nitride (GaN) device, comprising: a negative bias circuit configured to provide a negative bias voltage for a gate of the GaN device; a drain switch circuit configured to turn on or off a positive voltage for a drain of the GaN device; and a control circuit configured to control the drain switch circuit based on provision of the negative bias voltage, such that the positive voltage for the drain is turned on after a voltage of the gate reaches the negative bias voltage and turned off before the negative bias voltage completely disappears. Original
The circuitry according to claim 1, wherein the control circuit is further configured to: turn on the drain switch circuit when an output voltage of the negative bias circuit is decreased from a voltage of zero to a threshold voltage, and turn off the drain switch circuit when the output voltage of the negative bias circuit is increased from the negative bias voltage to the threshold voltage, the threshold voltage being between the negative bias voltage and the voltage of zero. Original
The circuitry according to claim 1, further comprising: a voltage holding circuit configured to hold the negative bias voltage for the gate of the GaN device for a predetermined period when the output voltage of the negative bias circuit begins to increase from the negative bias voltage. Original
The circuitry according to claim 1, wherein the negative bias circuit includes a negative switch power supply buck-boost circuit, the negative switch power supply buck-boost circuit converting a power supply voltage into the negative bias voltage and providing a current required for an operation of the GaN device. Original
The circuitry according to claim 1, wherein the drain switch circuit is further configured to increase from a voltage of zero slowly at a first predetermined speed to the positive voltage for the drain when being turned on, and to decrease from the positive voltage for the drain quickly at a second predetermined speed to the voltage of zero when being turned off. Original
The circuitry according to claim 1, further comprising: a bias switch circuit connected between the negative bias circuit and the gate of the GaN device and configured to apply an output voltage of the negative bias circuit to the gate of the GaN device based on a control command. Original
The circuitry according to claim 1, further comprising: a big capacitor having a predetermined large capacitance and connected between the drain of the GaN device and ground. Original
The circuitry according to claim 1, wherein the GaN device operates as a GaN radio frequency power amplifier. New
The circuitry according to claim 1, wherein the negative bias voltage is adjustable from -5 V to -10 V and the positive voltage for the drain is 48 V. New
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A method for a gallium nitride (GaN) device, comprising: providing a negative bias voltage to a gate of the GaN device by decreasing a voltage of zero to the negative bias voltage; a positive voltage to a drain of the GaN device during the decreasing;.i tro lling t ne turnin g on oT t ne positive vo l tage to t ne arain oT t ne UaiN aevice i provision of the ne g ative bias volta g e to the g ate, such that the positive/oltage to the drain is turned on after the ne g ative bias volta g e is provided to the g ate nr ff+ r an actual volta g e at th o n-+o nnrn rhoc +hn neg ative bias-the negative bias voltage the gate of the GaN device by increasing the negative bias voltage to the voltage of zero; and,i oiLing turning off the positive voltage the drain of the GaN device..j e bi & hat the positive volta g e to the drain is turned off after the ne g ative bias volta g e is-emoved from the g ate and before the actual volta g e at the g ate approaches the volta ge Currently amended
The method according to claim 16, wherein, -the positive voltage to the drain of the GaN device during the decreasing h e neaa ' comprises: providing the positive voltage to the drain of the GaN device when the voltage of zero is decreased to a threshold voltage, the threshold voltage being between the negative bias voltage and the voltage of zero. Currently amended
The method according to claim 16, wherein turning off the positive voltage the drain of the GaN device during the increasing comprises: turning off the positive voltage for the drain of the GaN device when the negative bias voltage is increased to threshold voltage. Currently amended
The method according to claim 16, further comprising: holding the negative bias voltage for the gate of the GaN device for a predetermined period when the negative bias voltage begins to increase. Original
The method according to claim 16, wherein the decreasing and the increasing are performed by a negative switch power supply buck-boost circuit, and the method further comprising: providing a current required for an operation of the GaN device by the negative switch power supply buck-boost circuit. Currently amended
The method according to claim 16, wherein providing the positive voltage to the drain of the GaN device during the decreasing comprises: the positive voltage to the drain of the GaN device by increasing a voltage of zero slowly at a first predetermined speed to the positive voltage for the drain; and turning off the positive voltage the drain of the GaN device by decreasing the positive voltage the drain quickly at a second predetermined speed to the voltage of zero. Currently amended
The method according to claim 16, further comprising: applying a big capacitor having a predetermined large capacitance as a decoupling capacitor of the GaN device. Original
The method according to claim 16, further comprising: applying the negative bias voltage to the gate of the GaN device based on a control command. New
The method according to claim 16, wherein the negative bias voltage is adjustable from -5 V to -10 V and the positive voltage for the drain is 48 V. New
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Layer stacks claimed or described, ordered top of device to substrate.
GaN RF power amplifier/GaN transistor with gate bias and drain switch circuitry
No layer stack recorded.
Materials described outside the worked examples.
gallium nitride
GaN
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
negative gate bias voltage range | -10–-5 V | — |
positive drain voltage | 48 V |
Related documents with shared materials, methods, properties, or citations.
| — |
voltage holding period for negative gate bias | 1–2 ms | — |
current provided by negative switch power supply buck-boost circuit | 300–500 mA | — |
High-Side Gate Driver for Gallium Nitride Integrated Circuits
| — |
voltage holding period for negative gate bias | 1–2 ms | — |
current provided by negative switch power supply buck-boost circuit | 300–500 mA | — |
High-Side Gate Driver for Gallium Nitride Integrated Circuits
| — |
voltage holding period for negative gate bias | 1–2 ms | — |
current provided by negative switch power supply buck-boost circuit | 300–500 mA | — |
High-Side Gate Driver for Gallium Nitride Integrated Circuits
| — |
voltage holding period for negative gate bias | 1–2 ms | — |
current provided by negative switch power supply buck-boost circuit | 300–500 mA | — |