Patent
US 8,969,920SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SAME
Makoto Kiyama
US
Copyright © 2026 Matter42. All rights reserved.
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Atlas literature
Patent
US 8,969,920Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
canceled
The A vertical semiconductor device according-to Claim 1, whe-em including a GaN-based stacked layer havin g an o penin g, the semiconductor device comprising: a regrown la y er including a channel located so as to cover a wall surface of the opening; a p -type GaN-based semiconductor layer having an end face covered with the regrown la yer at the wall surface of the opening; an n + -type GaN-based semiconductor layer servin g as a top layer of the GaN-based stacked laver; a p+ -type GaN-based su pp lementar y layer containin g a p-type impurity in a concentration higher than that of the p-type GaN-based semiconductor layer, the p + -type GaN-based supp lementar y lay er being located between the p-type GaN-based semiconductor layer and the n +- type GaN-based semiconductor layer; a g ate electrode located on the regrown la y er in the opening; and a source electrode located on the GaN-based stacked layer around the opening so as to be in contact with the regrown la y er and the n + -type GaN-based semiconductor layer, wherein the regrown la y er includes an electron drift la y er and an electron source la yer and the channel is formed of two-dimensional electron gas g enerated in the electron drift la yer at a p osition near an interface between the electron drift la y er and the electron source la y er, and 3 SVG 13824248.10-24-2014.I₁NXS₈QPPXXIFW3.CLM33526266.1.300.246.2248.331.svg 0.283 6.493 Chemistry Black and white the p*- type GaN-based su pp lementar y layer is included in a structure that electrically connects the p-type GaN-based semiconductor layer and the source electrode to each other in order to fix an electric potential of the p-type GaN-based semiconductor layer at an electric potential of the source electrode, and the n +- type GaN-based semiconductor layer and the p +- type GaN-based supplementary layer form a tunnel junction, and the source electrode and the p-type GaN-based semiconductor layer are electrically connected to each other through the tunnel junction.
A method for producing a vertical GaN-based semiconductor device, the method comprising: a step of forming a p-type GaN-based semiconductor layer on an n- -type GaN-based semiconductor layer; a step of forming a p +- type GaN-based supplementary layer on the p-type GaN-based semiconductor layer; a step of forming an n +- type GaN-based semiconductor layer on the p +- type GaN-based supplementary layer; 5 SVG 13824248.10-24-2014.I₁NXS₈QPPXXIFW3.CLM33526268.1.300.246.2248.331.svg 0.283 6.493 Graph Black and white a step of forming, by etching, an opening that extends from a top layer to the n- -type GaN- based semiconductor layer; a step of epitaxially growing a regrown layer in the opening, the regrown layer including an electron drift layer and an electron source layer; and a step of forming a source electrode around the opening so as to be in contact with the regrown layer and the n +- type GaN-based semiconductor layer, wherein a donor concentration of the n +- type GaN-based semiconductor layer is set to be 1 x 1018 cm⁻³ or more and 5 x 1020 cm⁻³ or less and a p-type impurity concentration of the p +- type GaN- based supplementary layer is set to be 5 x 10ig cm -3 or more and 5 x 1020 cm- 3 or less so that the n +- type GaN-based semiconductor layer and the p +- type GaN-based supplementary layer form a tunnel junction. withdrawn
The method for producing a semiconductor device according to Claim 10, wherein, in the step of forming the p +- type GaN-based supplementary layer on the p-type GaN- based semiconductor layer, the p +- type GaN-based supplementary layer is formed away from the 7 SVG 13824248.10-24-2014.I₁NXS₈QPPXXIFW3.CLM33526270.1.300.246.2248.331.svg 0.283 6.493 Graph Black and white opening by implanting a p-type impurity by ion implantation in a region of the p-type GaN-based semiconductor layer, the region being present at a certain distance from a region constituted by the opening. withdrawn
The method for producing a semiconductor device according to Claim 10, wherein, in the step of forming the p + -type GaN-based supplementary layer on the p-type GaN- based semiconductor layer, the p + -type GaN-based supplementary layer is selectively grown in a region of the p-type GaN-based semiconductor layer, the region being present at a certain distance from a region constituted by the opening. withdrawn
A method for producing a vertical GaN-based semiconductor device including a source electrode on one principal surface and a drain electrode on the other principal surface, the method comprising: a step of forming a p-type GaN-based semiconductor layer on an n- -type GaN-based semiconductor layer; a step of forming a p +- type GaN-based supplementary layer on the p-type GaN-based semiconductor layer; a step of forming an n +- type GaN-based semiconductor layer on the p +- type GaN-based supplementary layer; 6 SVG 13824248.10-24-2014.I₁NXS₈QPPXXIFW3.CLM33526269.1.300.246.2248.331.svg 0.283 6.493 Graph Black and white a step of forming, by etching, an opening that extends from a top layer to the n- -type GaN- based semiconductor layer; a step of epitaxially growing a regrown layer in the opening, the regrown layer including an electron drift layer and an electron source layer; a step of exposing the p +- type GaN-based supplementary layer by selectively removing the n+- type GaN-based semiconductor layer using photolithography and then forming an extended electrode by performing filling with a conductive material; and a step of forming a source electrode so as to be in contact with the extended electrode, the n+- type GaN-based semiconductor layer, and the regrown layer. withdrawn
The method for producing a semiconductor device according to Claim 11, wherein, in the step of forming the extended electrode and the step of forming the source electrode, for the purpose of allowing the source electrode to also serve as the extended electrode, in the photolithography, the n +- type GaN-based semiconductor layer and the regrown layer are selectively removed to expose the p +- type GaN-based supplementary layer and then the source electrode is formed by performing filling with a conductive material so that the source electrode is in contact with the p +- type GaN-based supplementary layer, the n +- type GaN-based semiconductor layer, and the regrown layer. withdrawn
The method for producing a semiconductor device according to Claim 11, wherein, in the step of forming the p + -type GaN-based supplementary layer on the p-type GaN- based semiconductor layer, the p + -type GaN-based supplementary layer is formed away from the opening by implanting a p-type impurity by ion implantation in a region of the p-type GaN-based semiconductor layer, the region being present at a certain distance from a region constituted by the opening. withdrawn
The method for producing a semiconductor device according to claim 11, wherein, in the step of forming the p + -type GaN-based supplementary layer on the p-type GaN- based semiconductor layer, the p + -type GaN-based supplementary layer is selectively grown in a region of the p-type GaN-based semiconductor layer, the region being present at a certain distance from a region constituted by the opening. 8 withdrawn
Layer stacks claimed or described, ordered top of device to substrate.
vertical GaN-based field-effect transistor
Materials described outside the worked examples.
p-type GaN-based semiconductor layer (p-type barrier layer)
n+-type GaN-based semiconductor layer (n+-type source layer)
p+-type GaN-based supplementary layer
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
p+-type GaN-based supplementary layer p-type impurity concentration (claimed range) | 5000000000000000000–500000000000000000000 cm⁻³ | p+-type GaN-based supplementary layer |
n+-type GaN-based semiconductor layer donor concentration (claimed range) |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,969,920Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
canceled
The A vertical semiconductor device according-to Claim 1, whe-em including a GaN-based stacked layer havin g an o penin g, the semiconductor device comprising: a regrown la y er including a channel located so as to cover a wall surface of the opening; a p -type GaN-based semiconductor layer having an end face covered with the regrown la yer at the wall surface of the opening; an n + -type GaN-based semiconductor layer servin g as a top layer of the GaN-based stacked laver; a p+ -type GaN-based su pp lementar y layer containin g a p-type impurity in a concentration higher than that of the p-type GaN-based semiconductor layer, the p + -type GaN-based supp lementar y lay er being located between the p-type GaN-based semiconductor layer and the n +- type GaN-based semiconductor layer; a g ate electrode located on the regrown la y er in the opening; and a source electrode located on the GaN-based stacked layer around the opening so as to be in contact with the regrown la y er and the n + -type GaN-based semiconductor layer, wherein the regrown la y er includes an electron drift la y er and an electron source la yer and the channel is formed of two-dimensional electron gas g enerated in the electron drift la yer at a p osition near an interface between the electron drift la y er and the electron source la y er, and 3 SVG 13824248.10-24-2014.I₁NXS₈QPPXXIFW3.CLM33526266.1.300.246.2248.331.svg 0.283 6.493 Chemistry Black and white the p*- type GaN-based su pp lementar y layer is included in a structure that electrically connects the p-type GaN-based semiconductor layer and the source electrode to each other in order to fix an electric potential of the p-type GaN-based semiconductor layer at an electric potential of the source electrode, and the n +- type GaN-based semiconductor layer and the p +- type GaN-based supplementary layer form a tunnel junction, and the source electrode and the p-type GaN-based semiconductor layer are electrically connected to each other through the tunnel junction.
A method for producing a vertical GaN-based semiconductor device, the method comprising: a step of forming a p-type GaN-based semiconductor layer on an n- -type GaN-based semiconductor layer; a step of forming a p +- type GaN-based supplementary layer on the p-type GaN-based semiconductor layer; a step of forming an n +- type GaN-based semiconductor layer on the p +- type GaN-based supplementary layer; 5 SVG 13824248.10-24-2014.I₁NXS₈QPPXXIFW3.CLM33526268.1.300.246.2248.331.svg 0.283 6.493 Graph Black and white a step of forming, by etching, an opening that extends from a top layer to the n- -type GaN- based semiconductor layer; a step of epitaxially growing a regrown layer in the opening, the regrown layer including an electron drift layer and an electron source layer; and a step of forming a source electrode around the opening so as to be in contact with the regrown layer and the n +- type GaN-based semiconductor layer, wherein a donor concentration of the n +- type GaN-based semiconductor layer is set to be 1 x 1018 cm⁻³ or more and 5 x 1020 cm⁻³ or less and a p-type impurity concentration of the p +- type GaN- based supplementary layer is set to be 5 x 10ig cm -3 or more and 5 x 1020 cm- 3 or less so that the n +- type GaN-based semiconductor layer and the p +- type GaN-based supplementary layer form a tunnel junction. withdrawn
The method for producing a semiconductor device according to Claim 10, wherein, in the step of forming the p +- type GaN-based supplementary layer on the p-type GaN- based semiconductor layer, the p +- type GaN-based supplementary layer is formed away from the 7 SVG 13824248.10-24-2014.I₁NXS₈QPPXXIFW3.CLM33526270.1.300.246.2248.331.svg 0.283 6.493 Graph Black and white opening by implanting a p-type impurity by ion implantation in a region of the p-type GaN-based semiconductor layer, the region being present at a certain distance from a region constituted by the opening. withdrawn
The method for producing a semiconductor device according to Claim 10, wherein, in the step of forming the p + -type GaN-based supplementary layer on the p-type GaN- based semiconductor layer, the p + -type GaN-based supplementary layer is selectively grown in a region of the p-type GaN-based semiconductor layer, the region being present at a certain distance from a region constituted by the opening. withdrawn
A method for producing a vertical GaN-based semiconductor device including a source electrode on one principal surface and a drain electrode on the other principal surface, the method comprising: a step of forming a p-type GaN-based semiconductor layer on an n- -type GaN-based semiconductor layer; a step of forming a p +- type GaN-based supplementary layer on the p-type GaN-based semiconductor layer; a step of forming an n +- type GaN-based semiconductor layer on the p +- type GaN-based supplementary layer; 6 SVG 13824248.10-24-2014.I₁NXS₈QPPXXIFW3.CLM33526269.1.300.246.2248.331.svg 0.283 6.493 Graph Black and white a step of forming, by etching, an opening that extends from a top layer to the n- -type GaN- based semiconductor layer; a step of epitaxially growing a regrown layer in the opening, the regrown layer including an electron drift layer and an electron source layer; a step of exposing the p +- type GaN-based supplementary layer by selectively removing the n+- type GaN-based semiconductor layer using photolithography and then forming an extended electrode by performing filling with a conductive material; and a step of forming a source electrode so as to be in contact with the extended electrode, the n+- type GaN-based semiconductor layer, and the regrown layer. withdrawn
The method for producing a semiconductor device according to Claim 11, wherein, in the step of forming the extended electrode and the step of forming the source electrode, for the purpose of allowing the source electrode to also serve as the extended electrode, in the photolithography, the n +- type GaN-based semiconductor layer and the regrown layer are selectively removed to expose the p +- type GaN-based supplementary layer and then the source electrode is formed by performing filling with a conductive material so that the source electrode is in contact with the p +- type GaN-based supplementary layer, the n +- type GaN-based semiconductor layer, and the regrown layer. withdrawn
The method for producing a semiconductor device according to Claim 11, wherein, in the step of forming the p + -type GaN-based supplementary layer on the p-type GaN- based semiconductor layer, the p + -type GaN-based supplementary layer is formed away from the opening by implanting a p-type impurity by ion implantation in a region of the p-type GaN-based semiconductor layer, the region being present at a certain distance from a region constituted by the opening. withdrawn
The method for producing a semiconductor device according to claim 11, wherein, in the step of forming the p + -type GaN-based supplementary layer on the p-type GaN- based semiconductor layer, the p + -type GaN-based supplementary layer is selectively grown in a region of the p-type GaN-based semiconductor layer, the region being present at a certain distance from a region constituted by the opening. 8 withdrawn
Layer stacks claimed or described, ordered top of device to substrate.
vertical GaN-based field-effect transistor
Materials described outside the worked examples.
p-type GaN-based semiconductor layer (p-type barrier layer)
n+-type GaN-based semiconductor layer (n+-type source layer)
p+-type GaN-based supplementary layer
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
p+-type GaN-based supplementary layer p-type impurity concentration (claimed range) | 5000000000000000000–500000000000000000000 cm⁻³ | p+-type GaN-based supplementary layer |
n+-type GaN-based semiconductor layer donor concentration (claimed range) |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,969,920Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
canceled
The A vertical semiconductor device according-to Claim 1, whe-em including a GaN-based stacked layer havin g an o penin g, the semiconductor device comprising: a regrown la y er including a channel located so as to cover a wall surface of the opening; a p -type GaN-based semiconductor layer having an end face covered with the regrown la yer at the wall surface of the opening; an n + -type GaN-based semiconductor layer servin g as a top layer of the GaN-based stacked laver; a p+ -type GaN-based su pp lementar y layer containin g a p-type impurity in a concentration higher than that of the p-type GaN-based semiconductor layer, the p + -type GaN-based supp lementar y lay er being located between the p-type GaN-based semiconductor layer and the n +- type GaN-based semiconductor layer; a g ate electrode located on the regrown la y er in the opening; and a source electrode located on the GaN-based stacked layer around the opening so as to be in contact with the regrown la y er and the n + -type GaN-based semiconductor layer, wherein the regrown la y er includes an electron drift la y er and an electron source la yer and the channel is formed of two-dimensional electron gas g enerated in the electron drift la yer at a p osition near an interface between the electron drift la y er and the electron source la y er, and 3 SVG 13824248.10-24-2014.I₁NXS₈QPPXXIFW3.CLM33526266.1.300.246.2248.331.svg 0.283 6.493 Chemistry Black and white the p*- type GaN-based su pp lementar y layer is included in a structure that electrically connects the p-type GaN-based semiconductor layer and the source electrode to each other in order to fix an electric potential of the p-type GaN-based semiconductor layer at an electric potential of the source electrode, and the n +- type GaN-based semiconductor layer and the p +- type GaN-based supplementary layer form a tunnel junction, and the source electrode and the p-type GaN-based semiconductor layer are electrically connected to each other through the tunnel junction.
A method for producing a vertical GaN-based semiconductor device, the method comprising: a step of forming a p-type GaN-based semiconductor layer on an n- -type GaN-based semiconductor layer; a step of forming a p +- type GaN-based supplementary layer on the p-type GaN-based semiconductor layer; a step of forming an n +- type GaN-based semiconductor layer on the p +- type GaN-based supplementary layer; 5 SVG 13824248.10-24-2014.I₁NXS₈QPPXXIFW3.CLM33526268.1.300.246.2248.331.svg 0.283 6.493 Graph Black and white a step of forming, by etching, an opening that extends from a top layer to the n- -type GaN- based semiconductor layer; a step of epitaxially growing a regrown layer in the opening, the regrown layer including an electron drift layer and an electron source layer; and a step of forming a source electrode around the opening so as to be in contact with the regrown layer and the n +- type GaN-based semiconductor layer, wherein a donor concentration of the n +- type GaN-based semiconductor layer is set to be 1 x 1018 cm⁻³ or more and 5 x 1020 cm⁻³ or less and a p-type impurity concentration of the p +- type GaN- based supplementary layer is set to be 5 x 10ig cm -3 or more and 5 x 1020 cm- 3 or less so that the n +- type GaN-based semiconductor layer and the p +- type GaN-based supplementary layer form a tunnel junction. withdrawn
The method for producing a semiconductor device according to Claim 10, wherein, in the step of forming the p +- type GaN-based supplementary layer on the p-type GaN- based semiconductor layer, the p +- type GaN-based supplementary layer is formed away from the 7 SVG 13824248.10-24-2014.I₁NXS₈QPPXXIFW3.CLM33526270.1.300.246.2248.331.svg 0.283 6.493 Graph Black and white opening by implanting a p-type impurity by ion implantation in a region of the p-type GaN-based semiconductor layer, the region being present at a certain distance from a region constituted by the opening. withdrawn
The method for producing a semiconductor device according to Claim 10, wherein, in the step of forming the p + -type GaN-based supplementary layer on the p-type GaN- based semiconductor layer, the p + -type GaN-based supplementary layer is selectively grown in a region of the p-type GaN-based semiconductor layer, the region being present at a certain distance from a region constituted by the opening. withdrawn
A method for producing a vertical GaN-based semiconductor device including a source electrode on one principal surface and a drain electrode on the other principal surface, the method comprising: a step of forming a p-type GaN-based semiconductor layer on an n- -type GaN-based semiconductor layer; a step of forming a p +- type GaN-based supplementary layer on the p-type GaN-based semiconductor layer; a step of forming an n +- type GaN-based semiconductor layer on the p +- type GaN-based supplementary layer; 6 SVG 13824248.10-24-2014.I₁NXS₈QPPXXIFW3.CLM33526269.1.300.246.2248.331.svg 0.283 6.493 Graph Black and white a step of forming, by etching, an opening that extends from a top layer to the n- -type GaN- based semiconductor layer; a step of epitaxially growing a regrown layer in the opening, the regrown layer including an electron drift layer and an electron source layer; a step of exposing the p +- type GaN-based supplementary layer by selectively removing the n+- type GaN-based semiconductor layer using photolithography and then forming an extended electrode by performing filling with a conductive material; and a step of forming a source electrode so as to be in contact with the extended electrode, the n+- type GaN-based semiconductor layer, and the regrown layer. withdrawn
The method for producing a semiconductor device according to Claim 11, wherein, in the step of forming the extended electrode and the step of forming the source electrode, for the purpose of allowing the source electrode to also serve as the extended electrode, in the photolithography, the n +- type GaN-based semiconductor layer and the regrown layer are selectively removed to expose the p +- type GaN-based supplementary layer and then the source electrode is formed by performing filling with a conductive material so that the source electrode is in contact with the p +- type GaN-based supplementary layer, the n +- type GaN-based semiconductor layer, and the regrown layer. withdrawn
The method for producing a semiconductor device according to Claim 11, wherein, in the step of forming the p + -type GaN-based supplementary layer on the p-type GaN- based semiconductor layer, the p + -type GaN-based supplementary layer is formed away from the opening by implanting a p-type impurity by ion implantation in a region of the p-type GaN-based semiconductor layer, the region being present at a certain distance from a region constituted by the opening. withdrawn
The method for producing a semiconductor device according to claim 11, wherein, in the step of forming the p + -type GaN-based supplementary layer on the p-type GaN- based semiconductor layer, the p + -type GaN-based supplementary layer is selectively grown in a region of the p-type GaN-based semiconductor layer, the region being present at a certain distance from a region constituted by the opening. 8 withdrawn
Layer stacks claimed or described, ordered top of device to substrate.
vertical GaN-based field-effect transistor
Materials described outside the worked examples.
p-type GaN-based semiconductor layer (p-type barrier layer)
n+-type GaN-based semiconductor layer (n+-type source layer)
p+-type GaN-based supplementary layer
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
p+-type GaN-based supplementary layer p-type impurity concentration (claimed range) | 5000000000000000000–500000000000000000000 cm⁻³ | p+-type GaN-based supplementary layer |
n+-type GaN-based semiconductor layer donor concentration (claimed range) |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,969,920Patent drawings and their descriptions. Click a drawing to enlarge it.
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
canceled
The A vertical semiconductor device according-to Claim 1, whe-em including a GaN-based stacked layer havin g an o penin g, the semiconductor device comprising: a regrown la y er including a channel located so as to cover a wall surface of the opening; a p -type GaN-based semiconductor layer having an end face covered with the regrown la yer at the wall surface of the opening; an n + -type GaN-based semiconductor layer servin g as a top layer of the GaN-based stacked laver; a p+ -type GaN-based su pp lementar y layer containin g a p-type impurity in a concentration higher than that of the p-type GaN-based semiconductor layer, the p + -type GaN-based supp lementar y lay er being located between the p-type GaN-based semiconductor layer and the n +- type GaN-based semiconductor layer; a g ate electrode located on the regrown la y er in the opening; and a source electrode located on the GaN-based stacked layer around the opening so as to be in contact with the regrown la y er and the n + -type GaN-based semiconductor layer, wherein the regrown la y er includes an electron drift la y er and an electron source la yer and the channel is formed of two-dimensional electron gas g enerated in the electron drift la yer at a p osition near an interface between the electron drift la y er and the electron source la y er, and 3 SVG 13824248.10-24-2014.I₁NXS₈QPPXXIFW3.CLM33526266.1.300.246.2248.331.svg 0.283 6.493 Chemistry Black and white the p*- type GaN-based su pp lementar y layer is included in a structure that electrically connects the p-type GaN-based semiconductor layer and the source electrode to each other in order to fix an electric potential of the p-type GaN-based semiconductor layer at an electric potential of the source electrode, and the n +- type GaN-based semiconductor layer and the p +- type GaN-based supplementary layer form a tunnel junction, and the source electrode and the p-type GaN-based semiconductor layer are electrically connected to each other through the tunnel junction.
A method for producing a vertical GaN-based semiconductor device, the method comprising: a step of forming a p-type GaN-based semiconductor layer on an n- -type GaN-based semiconductor layer; a step of forming a p +- type GaN-based supplementary layer on the p-type GaN-based semiconductor layer; a step of forming an n +- type GaN-based semiconductor layer on the p +- type GaN-based supplementary layer; 5 SVG 13824248.10-24-2014.I₁NXS₈QPPXXIFW3.CLM33526268.1.300.246.2248.331.svg 0.283 6.493 Graph Black and white a step of forming, by etching, an opening that extends from a top layer to the n- -type GaN- based semiconductor layer; a step of epitaxially growing a regrown layer in the opening, the regrown layer including an electron drift layer and an electron source layer; and a step of forming a source electrode around the opening so as to be in contact with the regrown layer and the n +- type GaN-based semiconductor layer, wherein a donor concentration of the n +- type GaN-based semiconductor layer is set to be 1 x 1018 cm⁻³ or more and 5 x 1020 cm⁻³ or less and a p-type impurity concentration of the p +- type GaN- based supplementary layer is set to be 5 x 10ig cm -3 or more and 5 x 1020 cm- 3 or less so that the n +- type GaN-based semiconductor layer and the p +- type GaN-based supplementary layer form a tunnel junction. withdrawn
The method for producing a semiconductor device according to Claim 10, wherein, in the step of forming the p +- type GaN-based supplementary layer on the p-type GaN- based semiconductor layer, the p +- type GaN-based supplementary layer is formed away from the 7 SVG 13824248.10-24-2014.I₁NXS₈QPPXXIFW3.CLM33526270.1.300.246.2248.331.svg 0.283 6.493 Graph Black and white opening by implanting a p-type impurity by ion implantation in a region of the p-type GaN-based semiconductor layer, the region being present at a certain distance from a region constituted by the opening. withdrawn
The method for producing a semiconductor device according to Claim 10, wherein, in the step of forming the p + -type GaN-based supplementary layer on the p-type GaN- based semiconductor layer, the p + -type GaN-based supplementary layer is selectively grown in a region of the p-type GaN-based semiconductor layer, the region being present at a certain distance from a region constituted by the opening. withdrawn
A method for producing a vertical GaN-based semiconductor device including a source electrode on one principal surface and a drain electrode on the other principal surface, the method comprising: a step of forming a p-type GaN-based semiconductor layer on an n- -type GaN-based semiconductor layer; a step of forming a p +- type GaN-based supplementary layer on the p-type GaN-based semiconductor layer; a step of forming an n +- type GaN-based semiconductor layer on the p +- type GaN-based supplementary layer; 6 SVG 13824248.10-24-2014.I₁NXS₈QPPXXIFW3.CLM33526269.1.300.246.2248.331.svg 0.283 6.493 Graph Black and white a step of forming, by etching, an opening that extends from a top layer to the n- -type GaN- based semiconductor layer; a step of epitaxially growing a regrown layer in the opening, the regrown layer including an electron drift layer and an electron source layer; a step of exposing the p +- type GaN-based supplementary layer by selectively removing the n+- type GaN-based semiconductor layer using photolithography and then forming an extended electrode by performing filling with a conductive material; and a step of forming a source electrode so as to be in contact with the extended electrode, the n+- type GaN-based semiconductor layer, and the regrown layer. withdrawn
The method for producing a semiconductor device according to Claim 11, wherein, in the step of forming the extended electrode and the step of forming the source electrode, for the purpose of allowing the source electrode to also serve as the extended electrode, in the photolithography, the n +- type GaN-based semiconductor layer and the regrown layer are selectively removed to expose the p +- type GaN-based supplementary layer and then the source electrode is formed by performing filling with a conductive material so that the source electrode is in contact with the p +- type GaN-based supplementary layer, the n +- type GaN-based semiconductor layer, and the regrown layer. withdrawn
The method for producing a semiconductor device according to Claim 11, wherein, in the step of forming the p + -type GaN-based supplementary layer on the p-type GaN- based semiconductor layer, the p + -type GaN-based supplementary layer is formed away from the opening by implanting a p-type impurity by ion implantation in a region of the p-type GaN-based semiconductor layer, the region being present at a certain distance from a region constituted by the opening. withdrawn
The method for producing a semiconductor device according to claim 11, wherein, in the step of forming the p + -type GaN-based supplementary layer on the p-type GaN- based semiconductor layer, the p + -type GaN-based supplementary layer is selectively grown in a region of the p-type GaN-based semiconductor layer, the region being present at a certain distance from a region constituted by the opening. 8 withdrawn
Layer stacks claimed or described, ordered top of device to substrate.
vertical GaN-based field-effect transistor
Materials described outside the worked examples.
p-type GaN-based semiconductor layer (p-type barrier layer)
n+-type GaN-based semiconductor layer (n+-type source layer)
p+-type GaN-based supplementary layer
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
p+-type GaN-based supplementary layer p-type impurity concentration (claimed range) | 5000000000000000000–500000000000000000000 cm⁻³ | p+-type GaN-based supplementary layer |
n+-type GaN-based semiconductor layer donor concentration (claimed range) |
Related documents with shared materials, methods, properties, or citations.
regrown layer (electron drift layer and electron source layer)
n--type GaN-based semiconductor layer (drift layer)
n+-type GaN-based semiconductor layer (n+-type source layer) |
p+-type GaN-based supplementary layer thickness (claimed range) | 5–100 nm | p+-type GaN-based supplementary layer |
High-Side Gate Driver for Gallium Nitride Integrated Circuits
regrown layer (electron drift layer and electron source layer)
n--type GaN-based semiconductor layer (drift layer)
n+-type GaN-based semiconductor layer (n+-type source layer) |
p+-type GaN-based supplementary layer thickness (claimed range) | 5–100 nm | p+-type GaN-based supplementary layer |
High-Side Gate Driver for Gallium Nitride Integrated Circuits
regrown layer (electron drift layer and electron source layer)
n--type GaN-based semiconductor layer (drift layer)
n+-type GaN-based semiconductor layer (n+-type source layer) |
p+-type GaN-based supplementary layer thickness (claimed range) | 5–100 nm | p+-type GaN-based supplementary layer |
High-Side Gate Driver for Gallium Nitride Integrated Circuits
regrown layer (electron drift layer and electron source layer)
n--type GaN-based semiconductor layer (drift layer)
n+-type GaN-based semiconductor layer (n+-type source layer) |
p+-type GaN-based supplementary layer thickness (claimed range) | 5–100 nm | p+-type GaN-based supplementary layer |