Patent
US 8,933,486GaN Based HEMTs With Buried Field Plates
Yifeng Wu
Cree, Inc.·US
Copyright © 2026 Matter42. All rights reserved.
Patent
Atlas literature
Patent
US 8,933,486Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a sectional view of one embodiment of a HEMT according to the present invention; [0016]
FIG. 2 is a plan view of the embodiment shown in
FIG. 3 is a sectional view of another embodiment of a HEMT according to the present invention; [0018]
FIG. 4 is a sectional view of another embodiment of a HEMT according to the present invention having multiple field plates; [0019]
FIG. 5 is a sectional view of another embodiment of a HEMT according to the present invention having multiple field plates; [0020]
FIG. 6 is a sectional view of another embodiment of a HEMT according to the present invention having multiple field plates; and [0021]
FIG. 7 is a table comparing the operating characteristics of a HEMT according to the present invention compared to a HEMT with no field gate-source field plate; …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A transistor device, comprising: a semiconductor structure comprising an active region, said active region comprising a barrier layer; a source electrode in electrical contact with said semiconductor structure; a drain electrode in electrical contact with said semiconductor structure; and a gate between said source and drain electrodes, said gate comprising a vertical portion and a horizontal portion, said vertical portion in a recessed area of said barrier layer, said horizontal portion on said semiconductor structure and extending toward said drain on one side and toward said source on another side, wherein at least a portion of a space between said gate horizontal portion and said semiconductor structure is filled with air.
The transistor device of claim 1, further comprising a first spacer layer between at least a portion of said gate and said semiconductor structure. SVG 13245579.06-09-2014.HW₇YP₉J₇PXXIFW3.CLM19288250.28.270.2617.2238.2667.svg 0.167 6.56 Chemistry Black and white comprising a field plate electrically connected to said source electrode. Page 2 of 9 SVG 13245579.06-09-2014.HW₇YP₉J₇PXXIFW3.CLM19288251.1.267.141.1333.259.svg 0.393 3.553 Graph Black and white
The transistor device of claim 1, further comprising a substrate, said semiconductor structure on said substrate.
The transistor device of claim 1, wherein said gate is T-shaped. original
(original) The transistor device of claim 1, wherein said semiconductor structure comprises a buffer layer and a barrier layer.
The transistor of claim 1, wherein more than in direct contact with the same layer of said active structure and extending toward said drain on one at least a portion of a space between said structure is filled with air. one surface of said vertical portion of said gate is region. Page 4 of 9
The transistor device of claim 3, wherein said field plate is electrically connected to said source electrode through at least one conductive bus.
The transistor device of claim 3, wherein said field plate is electrically connected to said source electrode through a conductive path that runs outside of the area defined by the footprint of the semiconductor structure.
The transistor device of claim 3, wherein said field plate is electrically connected to said source electrode through at least one conductive via.
The transistor device of claim 3, wherein said field plate is on said spacer layer.
. canceled
A transistor device, comprising: Page 3 of 9 App l. No. 13/245,579 Response to the Office Action of Respon s e Dated: a semiconductor structure comprising an active region, said active region comprising a plurality of layers; a source electrode in electrical contact with said semiconductor structure; a drain electrode in electrical contact with said semiconductor structure; and a gate between said source and drain electrodes, said gate comprising a vertical portion and a horizontal portion, said vertical portion in a recessed area of said semiconductor structure active region, wherein said gate is in direct contact SVG 13245579.06-09-2014.HW₇YP₉J₇PXXIFW3.CLM19288252.14.273.1195.2247.1238.svg 0.143 6.58 Chemistry Black and white semiconductor side and toward said source on another side, wherein gate horizontal portion and said semiconductor
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based HEMT with buried field plate and T-shaped gate
Materials described outside the worked examples.
barrier layer
GaN
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 10–1000 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,933,486Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a sectional view of one embodiment of a HEMT according to the present invention; [0016]
FIG. 2 is a plan view of the embodiment shown in
FIG. 3 is a sectional view of another embodiment of a HEMT according to the present invention; [0018]
FIG. 4 is a sectional view of another embodiment of a HEMT according to the present invention having multiple field plates; [0019]
FIG. 5 is a sectional view of another embodiment of a HEMT according to the present invention having multiple field plates; [0020]
FIG. 6 is a sectional view of another embodiment of a HEMT according to the present invention having multiple field plates; and [0021]
FIG. 7 is a table comparing the operating characteristics of a HEMT according to the present invention compared to a HEMT with no field gate-source field plate; …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A transistor device, comprising: a semiconductor structure comprising an active region, said active region comprising a barrier layer; a source electrode in electrical contact with said semiconductor structure; a drain electrode in electrical contact with said semiconductor structure; and a gate between said source and drain electrodes, said gate comprising a vertical portion and a horizontal portion, said vertical portion in a recessed area of said barrier layer, said horizontal portion on said semiconductor structure and extending toward said drain on one side and toward said source on another side, wherein at least a portion of a space between said gate horizontal portion and said semiconductor structure is filled with air.
The transistor device of claim 1, further comprising a first spacer layer between at least a portion of said gate and said semiconductor structure. SVG 13245579.06-09-2014.HW₇YP₉J₇PXXIFW3.CLM19288250.28.270.2617.2238.2667.svg 0.167 6.56 Chemistry Black and white comprising a field plate electrically connected to said source electrode. Page 2 of 9 SVG 13245579.06-09-2014.HW₇YP₉J₇PXXIFW3.CLM19288251.1.267.141.1333.259.svg 0.393 3.553 Graph Black and white
The transistor device of claim 1, further comprising a substrate, said semiconductor structure on said substrate.
The transistor device of claim 1, wherein said gate is T-shaped. original
(original) The transistor device of claim 1, wherein said semiconductor structure comprises a buffer layer and a barrier layer.
The transistor of claim 1, wherein more than in direct contact with the same layer of said active structure and extending toward said drain on one at least a portion of a space between said structure is filled with air. one surface of said vertical portion of said gate is region. Page 4 of 9
The transistor device of claim 3, wherein said field plate is electrically connected to said source electrode through at least one conductive bus.
The transistor device of claim 3, wherein said field plate is electrically connected to said source electrode through a conductive path that runs outside of the area defined by the footprint of the semiconductor structure.
The transistor device of claim 3, wherein said field plate is electrically connected to said source electrode through at least one conductive via.
The transistor device of claim 3, wherein said field plate is on said spacer layer.
. canceled
A transistor device, comprising: Page 3 of 9 App l. No. 13/245,579 Response to the Office Action of Respon s e Dated: a semiconductor structure comprising an active region, said active region comprising a plurality of layers; a source electrode in electrical contact with said semiconductor structure; a drain electrode in electrical contact with said semiconductor structure; and a gate between said source and drain electrodes, said gate comprising a vertical portion and a horizontal portion, said vertical portion in a recessed area of said semiconductor structure active region, wherein said gate is in direct contact SVG 13245579.06-09-2014.HW₇YP₉J₇PXXIFW3.CLM19288252.14.273.1195.2247.1238.svg 0.143 6.58 Chemistry Black and white semiconductor side and toward said source on another side, wherein gate horizontal portion and said semiconductor
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based HEMT with buried field plate and T-shaped gate
Materials described outside the worked examples.
barrier layer
GaN
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 10–1000 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,933,486Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a sectional view of one embodiment of a HEMT according to the present invention; [0016]
FIG. 2 is a plan view of the embodiment shown in
FIG. 3 is a sectional view of another embodiment of a HEMT according to the present invention; [0018]
FIG. 4 is a sectional view of another embodiment of a HEMT according to the present invention having multiple field plates; [0019]
FIG. 5 is a sectional view of another embodiment of a HEMT according to the present invention having multiple field plates; [0020]
FIG. 6 is a sectional view of another embodiment of a HEMT according to the present invention having multiple field plates; and [0021]
FIG. 7 is a table comparing the operating characteristics of a HEMT according to the present invention compared to a HEMT with no field gate-source field plate; …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A transistor device, comprising: a semiconductor structure comprising an active region, said active region comprising a barrier layer; a source electrode in electrical contact with said semiconductor structure; a drain electrode in electrical contact with said semiconductor structure; and a gate between said source and drain electrodes, said gate comprising a vertical portion and a horizontal portion, said vertical portion in a recessed area of said barrier layer, said horizontal portion on said semiconductor structure and extending toward said drain on one side and toward said source on another side, wherein at least a portion of a space between said gate horizontal portion and said semiconductor structure is filled with air.
The transistor device of claim 1, further comprising a first spacer layer between at least a portion of said gate and said semiconductor structure. SVG 13245579.06-09-2014.HW₇YP₉J₇PXXIFW3.CLM19288250.28.270.2617.2238.2667.svg 0.167 6.56 Chemistry Black and white comprising a field plate electrically connected to said source electrode. Page 2 of 9 SVG 13245579.06-09-2014.HW₇YP₉J₇PXXIFW3.CLM19288251.1.267.141.1333.259.svg 0.393 3.553 Graph Black and white
The transistor device of claim 1, further comprising a substrate, said semiconductor structure on said substrate.
The transistor device of claim 1, wherein said gate is T-shaped. original
(original) The transistor device of claim 1, wherein said semiconductor structure comprises a buffer layer and a barrier layer.
The transistor of claim 1, wherein more than in direct contact with the same layer of said active structure and extending toward said drain on one at least a portion of a space between said structure is filled with air. one surface of said vertical portion of said gate is region. Page 4 of 9
The transistor device of claim 3, wherein said field plate is electrically connected to said source electrode through at least one conductive bus.
The transistor device of claim 3, wherein said field plate is electrically connected to said source electrode through a conductive path that runs outside of the area defined by the footprint of the semiconductor structure.
The transistor device of claim 3, wherein said field plate is electrically connected to said source electrode through at least one conductive via.
The transistor device of claim 3, wherein said field plate is on said spacer layer.
. canceled
A transistor device, comprising: Page 3 of 9 App l. No. 13/245,579 Response to the Office Action of Respon s e Dated: a semiconductor structure comprising an active region, said active region comprising a plurality of layers; a source electrode in electrical contact with said semiconductor structure; a drain electrode in electrical contact with said semiconductor structure; and a gate between said source and drain electrodes, said gate comprising a vertical portion and a horizontal portion, said vertical portion in a recessed area of said semiconductor structure active region, wherein said gate is in direct contact SVG 13245579.06-09-2014.HW₇YP₉J₇PXXIFW3.CLM19288252.14.273.1195.2247.1238.svg 0.143 6.58 Chemistry Black and white semiconductor side and toward said source on another side, wherein gate horizontal portion and said semiconductor
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based HEMT with buried field plate and T-shaped gate
Materials described outside the worked examples.
barrier layer
GaN
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 10–1000 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,933,486Patent drawings and their descriptions. Click a drawing to enlarge it.
FIG. 1 is a sectional view of one embodiment of a HEMT according to the present invention; [0016]
FIG. 2 is a plan view of the embodiment shown in
FIG. 3 is a sectional view of another embodiment of a HEMT according to the present invention; [0018]
FIG. 4 is a sectional view of another embodiment of a HEMT according to the present invention having multiple field plates; [0019]
FIG. 5 is a sectional view of another embodiment of a HEMT according to the present invention having multiple field plates; [0020]
FIG. 6 is a sectional view of another embodiment of a HEMT according to the present invention having multiple field plates; and [0021]
FIG. 7 is a table comparing the operating characteristics of a HEMT according to the present invention compared to a HEMT with no field gate-source field plate; …
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
A transistor device, comprising: a semiconductor structure comprising an active region, said active region comprising a barrier layer; a source electrode in electrical contact with said semiconductor structure; a drain electrode in electrical contact with said semiconductor structure; and a gate between said source and drain electrodes, said gate comprising a vertical portion and a horizontal portion, said vertical portion in a recessed area of said barrier layer, said horizontal portion on said semiconductor structure and extending toward said drain on one side and toward said source on another side, wherein at least a portion of a space between said gate horizontal portion and said semiconductor structure is filled with air.
The transistor device of claim 1, further comprising a first spacer layer between at least a portion of said gate and said semiconductor structure. SVG 13245579.06-09-2014.HW₇YP₉J₇PXXIFW3.CLM19288250.28.270.2617.2238.2667.svg 0.167 6.56 Chemistry Black and white comprising a field plate electrically connected to said source electrode. Page 2 of 9 SVG 13245579.06-09-2014.HW₇YP₉J₇PXXIFW3.CLM19288251.1.267.141.1333.259.svg 0.393 3.553 Graph Black and white
The transistor device of claim 1, further comprising a substrate, said semiconductor structure on said substrate.
The transistor device of claim 1, wherein said gate is T-shaped. original
(original) The transistor device of claim 1, wherein said semiconductor structure comprises a buffer layer and a barrier layer.
The transistor of claim 1, wherein more than in direct contact with the same layer of said active structure and extending toward said drain on one at least a portion of a space between said structure is filled with air. one surface of said vertical portion of said gate is region. Page 4 of 9
The transistor device of claim 3, wherein said field plate is electrically connected to said source electrode through at least one conductive bus.
The transistor device of claim 3, wherein said field plate is electrically connected to said source electrode through a conductive path that runs outside of the area defined by the footprint of the semiconductor structure.
The transistor device of claim 3, wherein said field plate is electrically connected to said source electrode through at least one conductive via.
The transistor device of claim 3, wherein said field plate is on said spacer layer.
. canceled
A transistor device, comprising: Page 3 of 9 App l. No. 13/245,579 Response to the Office Action of Respon s e Dated: a semiconductor structure comprising an active region, said active region comprising a plurality of layers; a source electrode in electrical contact with said semiconductor structure; a drain electrode in electrical contact with said semiconductor structure; and a gate between said source and drain electrodes, said gate comprising a vertical portion and a horizontal portion, said vertical portion in a recessed area of said semiconductor structure active region, wherein said gate is in direct contact SVG 13245579.06-09-2014.HW₇YP₉J₇PXXIFW3.CLM19288252.14.273.1195.2247.1238.svg 0.143 6.58 Chemistry Black and white semiconductor side and toward said source on another side, wherein gate horizontal portion and said semiconductor
Layer stacks claimed or described, ordered top of device to substrate.
GaN-based HEMT with buried field plate and T-shaped gate
Materials described outside the worked examples.
barrier layer
GaN
Performance values and ranges asserted in the specification or claims.
| Property | Value | Material |
|---|---|---|
Thickness | 10–1000 nm | — |
Thickness |
Related documents with shared materials, methods, properties, or citations.
buffer layer
two dimensional electron gas (2DEG)
InGaN
InGa(1-x)N
| — |
Thickness | 0.2–2 um | — |
Thickness | 2–5 um | — |
Thickness | 5-0.5 um. | — |
High-Side Gate Driver for Gallium Nitride Integrated Circuits
buffer layer
two dimensional electron gas (2DEG)
InGaN
InGa(1-x)N
| — |
Thickness | 0.2–2 um | — |
Thickness | 2–5 um | — |
Thickness | 5-0.5 um. | — |
High-Side Gate Driver for Gallium Nitride Integrated Circuits
buffer layer
two dimensional electron gas (2DEG)
InGaN
InGa(1-x)N
| — |
Thickness | 0.2–2 um | — |
Thickness | 2–5 um | — |
Thickness | 5-0.5 um. | — |
High-Side Gate Driver for Gallium Nitride Integrated Circuits
buffer layer
two dimensional electron gas (2DEG)
InGaN
InGa(1-x)N
| — |
Thickness | 0.2–2 um | — |
Thickness | 2–5 um | — |
Thickness | 5-0.5 um. | — |