Patent
US 8,791,560INTERDIGITATED CONDUCTIVE LEAD FRAME OR LAMINATE LEAD FRAME FOR GaN DIE
Kunzhong Hu
US
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Patent
Atlas literature
Patent
US 8,791,560Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 is a top plan view of a G aN die having laterally disposed and alternating drain electrode strips and end gate electrodes. [0007] Figure 2a shows a lead frame constructed in accordance with the invention for receiving the die of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
canceled
(previously presented): The conductive support of claim 1 9, whe r ein said source and drain pads are supported on an insulation support surface. previously presented
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Clai m 19: A conduct i ve support for a GaN semiconductor di e comprising a plurality of parallel spaced and interleaved source and drain electrode stri ps on a surface of said GaN semiconductor die; said conductive support having a source pad and a coplanar drain pad; said source and d i ain pads each hav in g a plura li ty of fingers and an enlarged area; said fingers of said source and drain pads be in g interdigitated and parallel to one another and spaced f r om one another; said f in gers of said sou i ce and d r ain pads being disposed i n alignment with and in contact with respective ones of said source and dra in electrode strips; a second semiconductor die having -tp source and dra in bottom-ehmi electrodes, said dra in bettom-ehmie elect i ode of said second semiconductor die being conductively fixed to one of sai d source o r drain pads, said top-ehm~- ie sou r ce electrode of said second semiconductor d i e and a gate electrode of said GaN semiconductor die being connected to a gate pad of said conductive suppo rt.
The conductive support of claim 19 wherein said gate pad is spaced from and coplanar with said source pad. Pag e 2 PAGE 5118 * RCVD AT 21212014 8 30 54 PM [niR-3O₇ (0NT PAGE₅₁₁ * CVDAT 1212018 3 54PM Eastern Standar dl Tune]' SVR WY -PTOFAX-001 !35'* DNIS 2738300 ' CSID:949 282 1002 DURATION (mm- $S).03-32 02/21/2014 FRI 18 23 FAX 949 282 1002 FARJA bMI & F ARJAbfT LLP -aa- > USPTO @006/018 Attorney Docket No 040028 IC previously presented
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(previously presented): The conductive support of cla im 19, wherein said source and drain pads are part of a th in conductive lead frame previously presented
(canceled) canceled
canceled
A conductive support for a GaN semiconductor die comprising a plurality of parallel spaced and in terleaved source and drain electrode strips on a surface of said GaN semiconductor die; said conductive support having a source pad a coplana r drain pad; Page 3 IR-3073 C ONT PAGE 6 118 * RCVD AT 2/211 2014 8 3 6 54 PM [Eastern Standard Time] * SVR W- PTOFA X-001*3s DNIS:273 8 300 * CSID:949 2 8 2 1002 ' DURATION (mm-ss):03 -32 02/21/2014 FR T 18 24 FAX 949 282 1002 FAR JAMi & F AR JAIlI L LP ->->-> US PTO I 007/018 Attorney Docket No 04002 8 1C said source and drain pads each hav in g a plurality of fingers and an enlarged area; said fingers of said source and drain pads be ing in terdigitated and parallel to one another and spaced from one another; sai d fingers of said source and drain pads being disposed in alignment with and in contact with respective ones of said sou r ce and drain electrode st ri ps; a second se m iconducto r die having t o p sou r ce and drain bottom-ehmie electrodes, said drain bettem-ehm-e electrode of said second semiconductor die being conductively fixed to one of said so ur ce or drain pads, said tep-ei sou r ce electrode of said second semiconductor die and a gate electrode of said GaN semiconductor die being connected to a gate pad of said conductive suppo r t, whe r ein said second semiconductor die is a s -i iee n based-d iede-er MOS gated device.
The conductive support of claim 27 wherein said gate pad is spaced from and coplanar with said source pad. previously presented
The conductive support of claim 27, wherein said source and dra in pads are part of a thin conductive lead frame. previously presented
The conductive support of claim 27, wherein said source and dra in pads are supported on an
(canceled) canceled
(canceled) canceled
Layer stacks claimed or described, ordered top of device to substrate.
conductive support for GaN semiconductor die with interdigitated lead frame
vertical conduction silicon MOSFET on lead frame pad
Materials described outside the worked examples.
GaN
silicon-based MOS gated device
silicon-based MOSFET
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,791,560Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 is a top plan view of a G aN die having laterally disposed and alternating drain electrode strips and end gate electrodes. [0007] Figure 2a shows a lead frame constructed in accordance with the invention for receiving the die of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
canceled
(previously presented): The conductive support of claim 1 9, whe r ein said source and drain pads are supported on an insulation support surface. previously presented
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
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Clai m 19: A conduct i ve support for a GaN semiconductor di e comprising a plurality of parallel spaced and interleaved source and drain electrode stri ps on a surface of said GaN semiconductor die; said conductive support having a source pad and a coplanar drain pad; said source and d i ain pads each hav in g a plura li ty of fingers and an enlarged area; said fingers of said source and drain pads be in g interdigitated and parallel to one another and spaced f r om one another; said f in gers of said sou i ce and d r ain pads being disposed i n alignment with and in contact with respective ones of said source and dra in electrode strips; a second semiconductor die having -tp source and dra in bottom-ehmi electrodes, said dra in bettom-ehmie elect i ode of said second semiconductor die being conductively fixed to one of sai d source o r drain pads, said top-ehm~- ie sou r ce electrode of said second semiconductor d i e and a gate electrode of said GaN semiconductor die being connected to a gate pad of said conductive suppo rt.
The conductive support of claim 19 wherein said gate pad is spaced from and coplanar with said source pad. Pag e 2 PAGE 5118 * RCVD AT 21212014 8 30 54 PM [niR-3O₇ (0NT PAGE₅₁₁ * CVDAT 1212018 3 54PM Eastern Standar dl Tune]' SVR WY -PTOFAX-001 !35'* DNIS 2738300 ' CSID:949 282 1002 DURATION (mm- $S).03-32 02/21/2014 FRI 18 23 FAX 949 282 1002 FARJA bMI & F ARJAbfT LLP -aa- > USPTO @006/018 Attorney Docket No 040028 IC previously presented
(canceled) canceled
(previously presented): The conductive support of cla im 19, wherein said source and drain pads are part of a th in conductive lead frame previously presented
(canceled) canceled
canceled
A conductive support for a GaN semiconductor die comprising a plurality of parallel spaced and in terleaved source and drain electrode strips on a surface of said GaN semiconductor die; said conductive support having a source pad a coplana r drain pad; Page 3 IR-3073 C ONT PAGE 6 118 * RCVD AT 2/211 2014 8 3 6 54 PM [Eastern Standard Time] * SVR W- PTOFA X-001*3s DNIS:273 8 300 * CSID:949 2 8 2 1002 ' DURATION (mm-ss):03 -32 02/21/2014 FR T 18 24 FAX 949 282 1002 FAR JAMi & F AR JAIlI L LP ->->-> US PTO I 007/018 Attorney Docket No 04002 8 1C said source and drain pads each hav in g a plurality of fingers and an enlarged area; said fingers of said source and drain pads be ing in terdigitated and parallel to one another and spaced from one another; sai d fingers of said source and drain pads being disposed in alignment with and in contact with respective ones of said sou r ce and drain electrode st ri ps; a second se m iconducto r die having t o p sou r ce and drain bottom-ehmie electrodes, said drain bettem-ehm-e electrode of said second semiconductor die being conductively fixed to one of said so ur ce or drain pads, said tep-ei sou r ce electrode of said second semiconductor die and a gate electrode of said GaN semiconductor die being connected to a gate pad of said conductive suppo r t, whe r ein said second semiconductor die is a s -i iee n based-d iede-er MOS gated device.
The conductive support of claim 27 wherein said gate pad is spaced from and coplanar with said source pad. previously presented
The conductive support of claim 27, wherein said source and dra in pads are part of a thin conductive lead frame. previously presented
The conductive support of claim 27, wherein said source and dra in pads are supported on an
(canceled) canceled
(canceled) canceled
Layer stacks claimed or described, ordered top of device to substrate.
conductive support for GaN semiconductor die with interdigitated lead frame
vertical conduction silicon MOSFET on lead frame pad
Materials described outside the worked examples.
GaN
silicon-based MOS gated device
silicon-based MOSFET
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,791,560Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 is a top plan view of a G aN die having laterally disposed and alternating drain electrode strips and end gate electrodes. [0007] Figure 2a shows a lead frame constructed in accordance with the invention for receiving the die of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
canceled
(previously presented): The conductive support of claim 1 9, whe r ein said source and drain pads are supported on an insulation support surface. previously presented
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
Clai m 19: A conduct i ve support for a GaN semiconductor di e comprising a plurality of parallel spaced and interleaved source and drain electrode stri ps on a surface of said GaN semiconductor die; said conductive support having a source pad and a coplanar drain pad; said source and d i ain pads each hav in g a plura li ty of fingers and an enlarged area; said fingers of said source and drain pads be in g interdigitated and parallel to one another and spaced f r om one another; said f in gers of said sou i ce and d r ain pads being disposed i n alignment with and in contact with respective ones of said source and dra in electrode strips; a second semiconductor die having -tp source and dra in bottom-ehmi electrodes, said dra in bettom-ehmie elect i ode of said second semiconductor die being conductively fixed to one of sai d source o r drain pads, said top-ehm~- ie sou r ce electrode of said second semiconductor d i e and a gate electrode of said GaN semiconductor die being connected to a gate pad of said conductive suppo rt.
The conductive support of claim 19 wherein said gate pad is spaced from and coplanar with said source pad. Pag e 2 PAGE 5118 * RCVD AT 21212014 8 30 54 PM [niR-3O₇ (0NT PAGE₅₁₁ * CVDAT 1212018 3 54PM Eastern Standar dl Tune]' SVR WY -PTOFAX-001 !35'* DNIS 2738300 ' CSID:949 282 1002 DURATION (mm- $S).03-32 02/21/2014 FRI 18 23 FAX 949 282 1002 FARJA bMI & F ARJAbfT LLP -aa- > USPTO @006/018 Attorney Docket No 040028 IC previously presented
(canceled) canceled
(previously presented): The conductive support of cla im 19, wherein said source and drain pads are part of a th in conductive lead frame previously presented
(canceled) canceled
canceled
A conductive support for a GaN semiconductor die comprising a plurality of parallel spaced and in terleaved source and drain electrode strips on a surface of said GaN semiconductor die; said conductive support having a source pad a coplana r drain pad; Page 3 IR-3073 C ONT PAGE 6 118 * RCVD AT 2/211 2014 8 3 6 54 PM [Eastern Standard Time] * SVR W- PTOFA X-001*3s DNIS:273 8 300 * CSID:949 2 8 2 1002 ' DURATION (mm-ss):03 -32 02/21/2014 FR T 18 24 FAX 949 282 1002 FAR JAMi & F AR JAIlI L LP ->->-> US PTO I 007/018 Attorney Docket No 04002 8 1C said source and drain pads each hav in g a plurality of fingers and an enlarged area; said fingers of said source and drain pads be ing in terdigitated and parallel to one another and spaced from one another; sai d fingers of said source and drain pads being disposed in alignment with and in contact with respective ones of said sou r ce and drain electrode st ri ps; a second se m iconducto r die having t o p sou r ce and drain bottom-ehmie electrodes, said drain bettem-ehm-e electrode of said second semiconductor die being conductively fixed to one of said so ur ce or drain pads, said tep-ei sou r ce electrode of said second semiconductor die and a gate electrode of said GaN semiconductor die being connected to a gate pad of said conductive suppo r t, whe r ein said second semiconductor die is a s -i iee n based-d iede-er MOS gated device.
The conductive support of claim 27 wherein said gate pad is spaced from and coplanar with said source pad. previously presented
The conductive support of claim 27, wherein said source and dra in pads are part of a thin conductive lead frame. previously presented
The conductive support of claim 27, wherein said source and dra in pads are supported on an
(canceled) canceled
(canceled) canceled
Layer stacks claimed or described, ordered top of device to substrate.
conductive support for GaN semiconductor die with interdigitated lead frame
vertical conduction silicon MOSFET on lead frame pad
Materials described outside the worked examples.
GaN
silicon-based MOS gated device
silicon-based MOSFET
Related documents with shared materials, methods, properties, or citations.
Patent
Atlas literature
Patent
US 8,791,560Patent drawings and their descriptions. Click a drawing to enlarge it.
Figure 1 is a top plan view of a G aN die having laterally disposed and alternating drain electrode strips and end gate electrodes. [0007] Figure 2a shows a lead frame constructed in accordance with the invention for receiving the die of
Claims define the patent's legal scope. Independent claims stand alone; dependent claims (nested) narrow them. Click a claim to expand its dependents.
canceled
(previously presented): The conductive support of claim 1 9, whe r ein said source and drain pads are supported on an insulation support surface. previously presented
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
canceled
Clai m 19: A conduct i ve support for a GaN semiconductor di e comprising a plurality of parallel spaced and interleaved source and drain electrode stri ps on a surface of said GaN semiconductor die; said conductive support having a source pad and a coplanar drain pad; said source and d i ain pads each hav in g a plura li ty of fingers and an enlarged area; said fingers of said source and drain pads be in g interdigitated and parallel to one another and spaced f r om one another; said f in gers of said sou i ce and d r ain pads being disposed i n alignment with and in contact with respective ones of said source and dra in electrode strips; a second semiconductor die having -tp source and dra in bottom-ehmi electrodes, said dra in bettom-ehmie elect i ode of said second semiconductor die being conductively fixed to one of sai d source o r drain pads, said top-ehm~- ie sou r ce electrode of said second semiconductor d i e and a gate electrode of said GaN semiconductor die being connected to a gate pad of said conductive suppo rt.
The conductive support of claim 19 wherein said gate pad is spaced from and coplanar with said source pad. Pag e 2 PAGE 5118 * RCVD AT 21212014 8 30 54 PM [niR-3O₇ (0NT PAGE₅₁₁ * CVDAT 1212018 3 54PM Eastern Standar dl Tune]' SVR WY -PTOFAX-001 !35'* DNIS 2738300 ' CSID:949 282 1002 DURATION (mm- $S).03-32 02/21/2014 FRI 18 23 FAX 949 282 1002 FARJA bMI & F ARJAbfT LLP -aa- > USPTO @006/018 Attorney Docket No 040028 IC previously presented
(canceled) canceled
(previously presented): The conductive support of cla im 19, wherein said source and drain pads are part of a th in conductive lead frame previously presented
(canceled) canceled
canceled
A conductive support for a GaN semiconductor die comprising a plurality of parallel spaced and in terleaved source and drain electrode strips on a surface of said GaN semiconductor die; said conductive support having a source pad a coplana r drain pad; Page 3 IR-3073 C ONT PAGE 6 118 * RCVD AT 2/211 2014 8 3 6 54 PM [Eastern Standard Time] * SVR W- PTOFA X-001*3s DNIS:273 8 300 * CSID:949 2 8 2 1002 ' DURATION (mm-ss):03 -32 02/21/2014 FR T 18 24 FAX 949 282 1002 FAR JAMi & F AR JAIlI L LP ->->-> US PTO I 007/018 Attorney Docket No 04002 8 1C said source and drain pads each hav in g a plurality of fingers and an enlarged area; said fingers of said source and drain pads be ing in terdigitated and parallel to one another and spaced from one another; sai d fingers of said source and drain pads being disposed in alignment with and in contact with respective ones of said sou r ce and drain electrode st ri ps; a second se m iconducto r die having t o p sou r ce and drain bottom-ehmie electrodes, said drain bettem-ehm-e electrode of said second semiconductor die being conductively fixed to one of said so ur ce or drain pads, said tep-ei sou r ce electrode of said second semiconductor die and a gate electrode of said GaN semiconductor die being connected to a gate pad of said conductive suppo r t, whe r ein said second semiconductor die is a s -i iee n based-d iede-er MOS gated device.
The conductive support of claim 27 wherein said gate pad is spaced from and coplanar with said source pad. previously presented
The conductive support of claim 27, wherein said source and dra in pads are part of a thin conductive lead frame. previously presented
The conductive support of claim 27, wherein said source and dra in pads are supported on an
(canceled) canceled
(canceled) canceled
Layer stacks claimed or described, ordered top of device to substrate.
conductive support for GaN semiconductor die with interdigitated lead frame
vertical conduction silicon MOSFET on lead frame pad
Materials described outside the worked examples.
GaN
silicon-based MOS gated device
silicon-based MOSFET
Related documents with shared materials, methods, properties, or citations.
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